1 /* Acceleration functions */
2 /* Author:
3 Rudolf Cornelissen 8/2003-11/2004.
4 */
5
6 #define MODULE_BIT 0x00080000
7
8 #include "std.h"
9
10 /*acceleration notes*/
11
12 /*functions Be's app_server uses:
13 fill span (horizontal only)
14 fill rectangle (these 2 are very similar)
15 invert rectangle
16 blit
17 */
18
eng_acc_wait_idle()19 status_t eng_acc_wait_idle()
20 {
21 /* wait until engine completely idle */
22 // while (ACCR(STATUS))
23 while (0)
24 {
25 /* snooze a bit so I do not hammer the bus */
26 snooze (100);
27 }
28
29 return B_OK;
30 }
31
32 /* AFAIK this must be done for every new screenmode.
33 * Engine required init. */
eng_acc_init()34 status_t eng_acc_init()
35 {
36 /*** Set pixel width and format ***/
37 switch(si->dm.space)
38 {
39 case B_CMAP8:
40 break;
41 case B_RGB15_LITTLE:
42 break;
43 case B_RGB16_LITTLE:
44 break;
45 case B_RGB32_LITTLE:case B_RGBA32_LITTLE:
46 break;
47 default:
48 LOG(8,("ACC: init, invalid bit depth\n"));
49 return B_ERROR;
50 }
51
52 /*** setup screen location and pitch ***/
53 switch (si->ps.card_arch)
54 {
55 default:
56 /* location of active screen in framebuffer */
57 // ACCW(OFFSET0, ((uint8*)si->fbc.frame_buffer - (uint8*)si->framebuffer));
58
59 /* setup buffer pitch */
60 // ACCW(PITCH0, (si->fbc.bytes_per_row & 0x0000ffff));
61 break;
62 }
63
64 /* do first actual acceleration engine command:
65 * setup clipping region (workspace size) to 32768 x 32768 pixels:
66 * wait for room in fifo for clipping cmd if needed.
67 * (fifo holds 256 32bit words: count those, not bytes) */
68 // while (((ENG_REG16(RG16_CLP_FIFOFREE)) >> 2) < 2)
69 while (0)
70 {
71 /* snooze a bit so I do not hammer the bus */
72 snooze (10);
73 }
74 /* now setup clipping (writing 2 32bit words) */
75 // ACCW(CLP_TOPLEFT, 0x00000000);
76 // ACCW(CLP_WIDHEIGHT, 0x80008000);
77
78 return B_OK;
79 }
80
81 /* screen to screen blit - i.e. move windows around and scroll within them. */
eng_acc_setup_blit()82 status_t eng_acc_setup_blit()
83 {
84 /* setup solid pattern:
85 * wait for room in fifo for pattern cmd if needed.
86 * (fifo holds 256 32bit words: count those, not bytes) */
87 while (((ENG_REG16(RG16_PAT_FIFOFREE)) >> 2) < 5)
88 {
89 /* snooze a bit so I do not hammer the bus */
90 snooze (10);
91 }
92 /* now setup pattern (writing 5 32bit words) */
93 ACCW(PAT_SHAPE, 0); /* 0 = 8x8, 1 = 64x1, 2 = 1x64 */
94 ACCW(PAT_COLOR0, 0xffffffff);
95 ACCW(PAT_COLOR1, 0xffffffff);
96 ACCW(PAT_MONO1, 0xffffffff);
97 ACCW(PAT_MONO2, 0xffffffff);
98
99 /* ROP3 registers (Raster OPeration):
100 * wait for room in fifo for ROP cmd if needed.
101 * (fifo holds 256 32bit words: count those, not bytes) */
102 while (((ENG_REG16(RG16_ROP_FIFOFREE)) >> 2) < 1)
103 {
104 /* snooze a bit so I do not hammer the bus */
105 snooze (10);
106 }
107 /* now setup ROP (writing 1 32bit word) */
108 ACCW(ROP_ROP3, 0xcc);
109
110 return B_OK;
111 }
112
eng_acc_blit(uint16 xs,uint16 ys,uint16 xd,uint16 yd,uint16 w,uint16 h)113 status_t eng_acc_blit(uint16 xs,uint16 ys,uint16 xd,uint16 yd,uint16 w,uint16 h)
114 {
115 /* Note: blit-copy direction is determined inside riva hardware: no setup needed */
116
117 /* instruct engine what to blit:
118 * wait for room in fifo for blit cmd if needed.
119 * (fifo holds 256 32bit words: count those, not bytes) */
120 while (((ENG_REG16(RG16_BLT_FIFOFREE)) >> 2) < 3)
121 {
122 /* snooze a bit so I do not hammer the bus */
123 snooze (10);
124 }
125 /* now setup blit (writing 3 32bit words) */
126 ACCW(BLT_TOPLFTSRC, ((ys << 16) | xs));
127 ACCW(BLT_TOPLFTDST, ((yd << 16) | xd));
128 ACCW(BLT_SIZE, (((h + 1) << 16) | (w + 1)));
129
130 return B_OK;
131 }
132
133 /* rectangle fill - i.e. workspace and window background color */
134 /* span fill - i.e. (selected) menuitem background color (Dano) */
eng_acc_setup_rectangle(uint32 color)135 status_t eng_acc_setup_rectangle(uint32 color)
136 {
137 /* setup solid pattern:
138 * wait for room in fifo for pattern cmd if needed.
139 * (fifo holds 256 32bit words: count those, not bytes) */
140 while (((ENG_REG16(RG16_PAT_FIFOFREE)) >> 2) < 5)
141 {
142 /* snooze a bit so I do not hammer the bus */
143 snooze (10);
144 }
145 /* now setup pattern (writing 5 32bit words) */
146 ACCW(PAT_SHAPE, 0); /* 0 = 8x8, 1 = 64x1, 2 = 1x64 */
147 ACCW(PAT_COLOR0, 0xffffffff);
148 ACCW(PAT_COLOR1, 0xffffffff);
149 ACCW(PAT_MONO1, 0xffffffff);
150 ACCW(PAT_MONO2, 0xffffffff);
151
152 /* ROP3 registers (Raster OPeration):
153 * wait for room in fifo for ROP cmd if needed.
154 * (fifo holds 256 32bit words: count those, not bytes) */
155 while (((ENG_REG16(RG16_ROP_FIFOFREE)) >> 2) < 1)
156 {
157 /* snooze a bit so I do not hammer the bus */
158 snooze (10);
159 }
160 /* now setup ROP (writing 1 32bit word) for GXcopy */
161 ACCW(ROP_ROP3, 0xcc);
162
163 /* setup fill color:
164 * wait for room in fifo for bitmap cmd if needed.
165 * (fifo holds 256 32bit words: count those, not bytes) */
166 while (((ENG_REG16(RG16_BMP_FIFOFREE)) >> 2) < 1)
167 {
168 /* snooze a bit so I do not hammer the bus */
169 snooze (10);
170 }
171 /* now setup color (writing 1 32bit word) */
172 ACCW(BMP_COLOR1A, color);
173
174 return B_OK;
175 }
176
eng_acc_rectangle(uint32 xs,uint32 xe,uint32 ys,uint32 yl)177 status_t eng_acc_rectangle(uint32 xs,uint32 xe,uint32 ys,uint32 yl)
178 {
179 /* instruct engine what to fill:
180 * wait for room in fifo for bitmap cmd if needed.
181 * (fifo holds 256 32bit words: count those, not bytes) */
182 while (((ENG_REG16(RG16_BMP_FIFOFREE)) >> 2) < 2)
183 {
184 /* snooze a bit so I do not hammer the bus */
185 snooze (10);
186 }
187 /* now setup fill (writing 2 32bit words) */
188 ACCW(BMP_UCRECTL_0, ((xs << 16) | (ys & 0x0000ffff)));
189 ACCW(BMP_UCRECSZ_0, (((xe - xs) << 16) | (yl & 0x0000ffff)));
190
191 return B_OK;
192 }
193
194 /* rectangle invert - i.e. text cursor and text selection */
eng_acc_setup_rect_invert()195 status_t eng_acc_setup_rect_invert()
196 {
197 /* setup solid pattern:
198 * wait for room in fifo for pattern cmd if needed.
199 * (fifo holds 256 32bit words: count those, not bytes) */
200 while (((ENG_REG16(RG16_PAT_FIFOFREE)) >> 2) < 5)
201 {
202 /* snooze a bit so I do not hammer the bus */
203 snooze (10);
204 }
205 /* now setup pattern (writing 5 32bit words) */
206 ACCW(PAT_SHAPE, 0); /* 0 = 8x8, 1 = 64x1, 2 = 1x64 */
207 ACCW(PAT_COLOR0, 0xffffffff);
208 ACCW(PAT_COLOR1, 0xffffffff);
209 ACCW(PAT_MONO1, 0xffffffff);
210 ACCW(PAT_MONO2, 0xffffffff);
211
212 /* ROP3 registers (Raster OPeration):
213 * wait for room in fifo for ROP cmd if needed.
214 * (fifo holds 256 32bit words: count those, not bytes) */
215 while (((ENG_REG16(RG16_ROP_FIFOFREE)) >> 2) < 1)
216 {
217 /* snooze a bit so I do not hammer the bus */
218 snooze (10);
219 }
220 /* now setup ROP (writing 1 32bit word) for GXinvert */
221 ACCW(ROP_ROP3, 0x55);
222
223 /* reset fill color:
224 * wait for room in fifo for bitmap cmd if needed.
225 * (fifo holds 256 32bit words: count those, not bytes) */
226 while (((ENG_REG16(RG16_BMP_FIFOFREE)) >> 2) < 1)
227 {
228 /* snooze a bit so I do not hammer the bus */
229 snooze (10);
230 }
231 /* now reset color (writing 1 32bit word) */
232 ACCW(BMP_COLOR1A, 0);
233
234 return B_OK;
235 }
236
eng_acc_rectangle_invert(uint32 xs,uint32 xe,uint32 ys,uint32 yl)237 status_t eng_acc_rectangle_invert(uint32 xs,uint32 xe,uint32 ys,uint32 yl)
238 {
239 /* instruct engine what to invert:
240 * wait for room in fifo for bitmap cmd if needed.
241 * (fifo holds 256 32bit words: count those, not bytes) */
242 while (((ENG_REG16(RG16_BMP_FIFOFREE)) >> 2) < 2)
243 {
244 /* snooze a bit so I do not hammer the bus */
245 snooze (10);
246 }
247 /* now setup invert (writing 2 32bit words) */
248 ACCW(BMP_UCRECTL_0, ((xs << 16) | (ys & 0x0000ffff)));
249 ACCW(BMP_UCRECSZ_0, (((xe - xs) << 16) | (yl & 0x0000ffff)));
250
251 return B_OK;
252 }
253
254 /* screen to screen tranparent blit */
eng_acc_transparent_blit(uint16 xs,uint16 ys,uint16 xd,uint16 yd,uint16 w,uint16 h,uint32 colour)255 status_t eng_acc_transparent_blit(uint16 xs,uint16 ys,uint16 xd,uint16 yd,uint16 w,uint16 h,uint32 colour)
256 {
257 //fixme: implement.
258
259 return B_ERROR;
260 }
261
262 /* screen to screen scaled filtered blit - i.e. scale video in memory */
eng_acc_video_blit(uint16 xs,uint16 ys,uint16 ws,uint16 hs,uint16 xd,uint16 yd,uint16 wd,uint16 hd)263 status_t eng_acc_video_blit(uint16 xs,uint16 ys,uint16 ws, uint16 hs,
264 uint16 xd,uint16 yd,uint16 wd,uint16 hd)
265 {
266 //fixme: implement.
267
268 return B_ERROR;
269 }
270