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/haiku/src/system/boot/platform/efi/arch/riscv64/
H A Darch_traps.cppfa557843f23498980832cb32871183f247dbb807 Sun Nov 27 15:27:35 UTC 2022 X512 <danger_mail@list.ru> riscv: use atomic CSR bit set/clear operations, refactor

Fix race conditions that cause broken timer interrupts.

Change-Id: I78e13a18d394b1566977e894a1def16a66c9ca5f
Reviewed-on: https://review.haiku-os.org/c/haiku/+/5883
Reviewed-by: X512 <danger_mail@list.ru>
Reviewed-by: Alex von Gluck IV <kallisti5@unixzen.com>
Tested-by: Commit checker robot <no-reply+buildbot@haiku-os.org>
H A Darch_mmu.cppfa557843f23498980832cb32871183f247dbb807 Sun Nov 27 15:27:35 UTC 2022 X512 <danger_mail@list.ru> riscv: use atomic CSR bit set/clear operations, refactor

Fix race conditions that cause broken timer interrupts.

Change-Id: I78e13a18d394b1566977e894a1def16a66c9ca5f
Reviewed-on: https://review.haiku-os.org/c/haiku/+/5883
Reviewed-by: X512 <danger_mail@list.ru>
Reviewed-by: Alex von Gluck IV <kallisti5@unixzen.com>
Tested-by: Commit checker robot <no-reply+buildbot@haiku-os.org>
/haiku/src/system/boot/platform/riscv/
H A Dtraps.cppfa557843f23498980832cb32871183f247dbb807 Sun Nov 27 15:27:35 UTC 2022 X512 <danger_mail@list.ru> riscv: use atomic CSR bit set/clear operations, refactor

Fix race conditions that cause broken timer interrupts.

Change-Id: I78e13a18d394b1566977e894a1def16a66c9ca5f
Reviewed-on: https://review.haiku-os.org/c/haiku/+/5883
Reviewed-by: X512 <danger_mail@list.ru>
Reviewed-by: Alex von Gluck IV <kallisti5@unixzen.com>
Tested-by: Commit checker robot <no-reply+buildbot@haiku-os.org>
H A Dcpu.cppfa557843f23498980832cb32871183f247dbb807 Sun Nov 27 15:27:35 UTC 2022 X512 <danger_mail@list.ru> riscv: use atomic CSR bit set/clear operations, refactor

Fix race conditions that cause broken timer interrupts.

Change-Id: I78e13a18d394b1566977e894a1def16a66c9ca5f
Reviewed-on: https://review.haiku-os.org/c/haiku/+/5883
Reviewed-by: X512 <danger_mail@list.ru>
Reviewed-by: Alex von Gluck IV <kallisti5@unixzen.com>
Tested-by: Commit checker robot <no-reply+buildbot@haiku-os.org>
H A Dmmu.cppfa557843f23498980832cb32871183f247dbb807 Sun Nov 27 15:27:35 UTC 2022 X512 <danger_mail@list.ru> riscv: use atomic CSR bit set/clear operations, refactor

Fix race conditions that cause broken timer interrupts.

Change-Id: I78e13a18d394b1566977e894a1def16a66c9ca5f
Reviewed-on: https://review.haiku-os.org/c/haiku/+/5883
Reviewed-by: X512 <danger_mail@list.ru>
Reviewed-by: Alex von Gluck IV <kallisti5@unixzen.com>
Tested-by: Commit checker robot <no-reply+buildbot@haiku-os.org>
/haiku/headers/private/kernel/arch/riscv64/
H A Darch_int.hfa557843f23498980832cb32871183f247dbb807 Sun Nov 27 15:27:35 UTC 2022 X512 <danger_mail@list.ru> riscv: use atomic CSR bit set/clear operations, refactor

Fix race conditions that cause broken timer interrupts.

Change-Id: I78e13a18d394b1566977e894a1def16a66c9ca5f
Reviewed-on: https://review.haiku-os.org/c/haiku/+/5883
Reviewed-by: X512 <danger_mail@list.ru>
Reviewed-by: Alex von Gluck IV <kallisti5@unixzen.com>
Tested-by: Commit checker robot <no-reply+buildbot@haiku-os.org>
H A Darch_cpu.hfa557843f23498980832cb32871183f247dbb807 Sun Nov 27 15:27:35 UTC 2022 X512 <danger_mail@list.ru> riscv: use atomic CSR bit set/clear operations, refactor

Fix race conditions that cause broken timer interrupts.

Change-Id: I78e13a18d394b1566977e894a1def16a66c9ca5f
Reviewed-on: https://review.haiku-os.org/c/haiku/+/5883
Reviewed-by: X512 <danger_mail@list.ru>
Reviewed-by: Alex von Gluck IV <kallisti5@unixzen.com>
Tested-by: Commit checker robot <no-reply+buildbot@haiku-os.org>
/haiku/src/system/kernel/arch/riscv64/
H A Darch_vm_translation_map.cppfa557843f23498980832cb32871183f247dbb807 Sun Nov 27 15:27:35 UTC 2022 X512 <danger_mail@list.ru> riscv: use atomic CSR bit set/clear operations, refactor

Fix race conditions that cause broken timer interrupts.

Change-Id: I78e13a18d394b1566977e894a1def16a66c9ca5f
Reviewed-on: https://review.haiku-os.org/c/haiku/+/5883
Reviewed-by: X512 <danger_mail@list.ru>
Reviewed-by: Alex von Gluck IV <kallisti5@unixzen.com>
Tested-by: Commit checker robot <no-reply+buildbot@haiku-os.org>
H A Darch_cpu.cppfa557843f23498980832cb32871183f247dbb807 Sun Nov 27 15:27:35 UTC 2022 X512 <danger_mail@list.ru> riscv: use atomic CSR bit set/clear operations, refactor

Fix race conditions that cause broken timer interrupts.

Change-Id: I78e13a18d394b1566977e894a1def16a66c9ca5f
Reviewed-on: https://review.haiku-os.org/c/haiku/+/5883
Reviewed-by: X512 <danger_mail@list.ru>
Reviewed-by: Alex von Gluck IV <kallisti5@unixzen.com>
Tested-by: Commit checker robot <no-reply+buildbot@haiku-os.org>
H A Darch_thread.cppfa557843f23498980832cb32871183f247dbb807 Sun Nov 27 15:27:35 UTC 2022 X512 <danger_mail@list.ru> riscv: use atomic CSR bit set/clear operations, refactor

Fix race conditions that cause broken timer interrupts.

Change-Id: I78e13a18d394b1566977e894a1def16a66c9ca5f
Reviewed-on: https://review.haiku-os.org/c/haiku/+/5883
Reviewed-by: X512 <danger_mail@list.ru>
Reviewed-by: Alex von Gluck IV <kallisti5@unixzen.com>
Tested-by: Commit checker robot <no-reply+buildbot@haiku-os.org>
H A DRISCV64VMTranslationMap.cppfa557843f23498980832cb32871183f247dbb807 Sun Nov 27 15:27:35 UTC 2022 X512 <danger_mail@list.ru> riscv: use atomic CSR bit set/clear operations, refactor

Fix race conditions that cause broken timer interrupts.

Change-Id: I78e13a18d394b1566977e894a1def16a66c9ca5f
Reviewed-on: https://review.haiku-os.org/c/haiku/+/5883
Reviewed-by: X512 <danger_mail@list.ru>
Reviewed-by: Alex von Gluck IV <kallisti5@unixzen.com>
Tested-by: Commit checker robot <no-reply+buildbot@haiku-os.org>
H A Darch_vm.cppfa557843f23498980832cb32871183f247dbb807 Sun Nov 27 15:27:35 UTC 2022 X512 <danger_mail@list.ru> riscv: use atomic CSR bit set/clear operations, refactor

Fix race conditions that cause broken timer interrupts.

Change-Id: I78e13a18d394b1566977e894a1def16a66c9ca5f
Reviewed-on: https://review.haiku-os.org/c/haiku/+/5883
Reviewed-by: X512 <danger_mail@list.ru>
Reviewed-by: Alex von Gluck IV <kallisti5@unixzen.com>
Tested-by: Commit checker robot <no-reply+buildbot@haiku-os.org>
H A Darch_int.cppfa557843f23498980832cb32871183f247dbb807 Sun Nov 27 15:27:35 UTC 2022 X512 <danger_mail@list.ru> riscv: use atomic CSR bit set/clear operations, refactor

Fix race conditions that cause broken timer interrupts.

Change-Id: I78e13a18d394b1566977e894a1def16a66c9ca5f
Reviewed-on: https://review.haiku-os.org/c/haiku/+/5883
Reviewed-by: X512 <danger_mail@list.ru>
Reviewed-by: Alex von Gluck IV <kallisti5@unixzen.com>
Tested-by: Commit checker robot <no-reply+buildbot@haiku-os.org>
/haiku/headers/private/system/arch/riscv64/
H A Darch_cpu_defs.hfa557843f23498980832cb32871183f247dbb807 Sun Nov 27 15:27:35 UTC 2022 X512 <danger_mail@list.ru> riscv: use atomic CSR bit set/clear operations, refactor

Fix race conditions that cause broken timer interrupts.

Change-Id: I78e13a18d394b1566977e894a1def16a66c9ca5f
Reviewed-on: https://review.haiku-os.org/c/haiku/+/5883
Reviewed-by: X512 <danger_mail@list.ru>
Reviewed-by: Alex von Gluck IV <kallisti5@unixzen.com>
Tested-by: Commit checker robot <no-reply+buildbot@haiku-os.org>