| /haiku/headers/private/graphics/radeon/ |
| H A D | pll_access.h | 19 void RADEONPllErrataAfterIndex( vuint8 *regs, radeon_type asic );
24 void RADEONPllErrataAfterData( vuint8 *regs, radeon_type asic );
36 uint32 Radeon_INPLL( vuint8 *regs, radeon_type asic, int addr );
39 void Radeon_OUTPLL( vuint8 *regs, radeon_type asic, uint8 addr, uint32 val );
42 void Radeon_OUTPLLP( vuint8 *regs, radeon_type asic, uint8 addr, uint32 val, uint32 mask );
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| /haiku/src/add-ons/kernel/drivers/graphics/radeon/ |
| H A D | pll_access.c | 16 void RADEONPllErrataAfterIndex( vuint8 *regs, radeon_type asic ) in RADEONPllErrataAfterIndex()
28 void RADEONPllErrataAfterData( vuint8 *regs, radeon_type asic ) in RADEONPllErrataAfterData()
59 uint32 Radeon_INPLL( vuint8 *regs, radeon_type asic, int addr ) in Radeon_INPLL()
71 void Radeon_OUTPLL( vuint8 *regs, radeon_type asic, uint8 addr, uint32 val ) in Radeon_OUTPLL()
84 void Radeon_OUTPLLP( vuint8 *regs, radeon_type asic, uint8 addr, in Radeon_OUTPLLP()
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| H A D | vip.c | 32 vuint8 *regs = di->regs; in do_VIPRead()
99 vuint8 *regs = di->regs; in do_VIPFifoRead()
192 vuint8 *regs = di->regs; in do_VIPWrite()
230 vuint8 *regs = di->regs; in do_VIPFifoWrite()
296 vuint8 *regs = di->regs; in Radeon_VIPReset()
348 vuint8 *regs = di->regs; in Radeon_VIPIdle()
366 vuint8 *regs = di->regs; in RADEON_VIPFifoIdle()
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| H A D | irq.c | 30 Radeon_ThreadInterruptWork(vuint8 *regs, device_info *di, uint32 int_status) in Radeon_ThreadInterruptWork()
71 Radeon_HandleCaptureInterrupt(vuint8 *regs, device_info *di, uint32 cap_status) in Radeon_HandleCaptureInterrupt()
106 vuint8 *regs = di->regs; in Radeon_Interrupt()
154 vuint8 *regs = di->regs; in timer_interrupt_func()
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| H A D | CP_setup.c | 208 vuint8 *regs = di->regs; in Radeon_ResetEngine()
326 vuint8 *regs = di->regs; in initRingBuffer()
377 vuint8 *regs = di->regs; in uninitRingBuffer()
393 vuint8 *regs = di->regs; in initCPFeedback()
434 vuint8 *regs = di->regs; in uninitCPFeedback()
582 vuint8 *regs = di->regs; in Radeon_UninitCP()
642 vuint8 *regs = di->regs; in Radeon_SetDynamicClock()
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| H A D | radeon_driver.h | 103 vuint8 *regs;
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| H A D | mem_controller.c | 140 vuint8 *regs = di->regs; in Radeon_InitMemController()
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| H A D | bios.c | 631 vuint8 *regs = di->regs; in Radeon_RevEnvDFPSize()
649 vuint8 *regs = di->regs; in Radeon_RevEnvDFPTiming()
887 vuint8 *regs = di->regs; in RADEON_GetAccessibleVRAM()
926 vuint8 *regs = di->regs; in Radeon_DetectRAM()
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| /haiku/src/add-ons/accelerants/radeon/ |
| H A D | dpms.c | 59 vuint8 *regs = ai->regs; in Radeon_SetDPMS_LVDS()
97 vuint8 *regs = ai->regs; in Radeon_SetDPMS_DVI()
119 vuint8 *regs = ai->regs; in Radeon_SetDPMS_FP2()
150 vuint8 *regs = ai->regs; in Radeon_SetDPMS_CRT()
172 vuint8 *regs = ai->regs; in Radeon_SetDPMS_TVCRT()
198 vuint8 *regs = ai->regs; in Radeon_SetDPMS_CRTC1()
240 vuint8 *regs = ai->regs; in Radeon_SetDPMS_CRTC2()
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| H A D | internal_tv_out.c | 93 vuint8 *regs = ai->regs; in writeMMIORegList()
129 vuint8 *regs = ai->regs;
161 vuint8 *regs = ai->regs; in Radeon_InternalTVOutWriteFIFO()
233 vuint8 *regs = ai->regs; in readMMIORegList()
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| H A D | flat_panel.c | 23 vuint8 *regs = ai->regs; in Radeon_ReadRMXRegisters()
110 vuint8 *regs = ai->regs; in Radeon_ProgramRMXRegisters()
120 vuint8 *regs = ai->regs; in Radeon_ReadFPRegisters()
254 vuint8 *regs = ai->regs; in Radeon_ProgramFPRegisters()
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| H A D | monitor_detection.c | 40 vuint8 *regs = info->ai->regs; in get_signals()
56 vuint8 *regs = info->ai->regs; in set_signals()
104 vuint8 *regs = ai->regs; in Radeon_DetectCRTInt()
180 vuint8 *regs = ai->regs; in Radeon_DetectTVCRT_RV200()
231 vuint8 *regs = ai->regs; in Radeon_DetectTVCRT_R300()
334 vuint8 *regs = ai->regs; in Radeon_DetectTV_RV200()
419 vuint8 *regs = ai->regs; in Radeon_DetectTV_R300()
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| H A D | radeon_accelerant.h | 44 vuint8 *regs; // pointer to mapped registers
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| H A D | overlay.c | 56 vuint8 *regs = ai->regs; in Radeon_InitOverlay()
162 vuint8 *regs = ai->regs; in Radeon_SetTransform()
317 vuint8 *regs = ai->regs; in Radeon_SetColourKey()
534 vuint8 *regs = ai->regs; in Radeon_ShowOverlay()
965 vuint8 *regs = ai->regs; in Radeon_ReplaceOverlayBuffer()
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| H A D | crtc.c | 22 vuint8 *regs = ai->regs; in Radeon_ProgramCRTCRegisters()
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| H A D | monitor_routing.c | 29 vuint8 *regs = ai->regs; in Radeon_ReadMonitorRoutingRegs()
422 vuint8 *regs = ai->regs; in Radeon_ProgramMonitorRouting()
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| /haiku/src/add-ons/kernel/bus_managers/pci/ |
| H A D | pci_io.cpp | 84 vuint8* ptr = get_io_port_address(mapped_io_addr); in pci_read_io_8()
96 vuint8* ptr = get_io_port_address(mapped_io_addr); in pci_write_io_8()
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| /haiku/src/add-ons/accelerants/intel_810/ |
| H A D | i810_regs.h | 111 #define INREG8(addr) (*((vuint8*)(gInfo.regs + (addr))))
115 #define OUTREG8(addr, val) (*((vuint8*)(gInfo.regs + (addr))) = (val))
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| /haiku/src/add-ons/kernel/busses/pci/ecam/ |
| H A D | ECAMPCIController.cpp | 140 case 1: value = *(vuint8*)address; break; in ReadConfig()
160 case 1: *(vuint8*)address = value; break; in WriteConfig()
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| /haiku/src/add-ons/accelerants/s3/ |
| H A D | register_io.cpp | 17 #define INREG8(addr) *((vuint8*)(gInfo.regs + addr))
21 #define OUTREG8(addr, val) *((vuint8*)(gInfo.regs + addr)) = val
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| /haiku/src/add-ons/accelerants/3dfx/ |
| H A D | accelerant.h | 177 #define INREG8(addr) *((vuint8*)(gInfo.regs + addr))
181 #define OUTREG8(addr, val) *((vuint8*)(gInfo.regs + addr)) = val
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| /haiku/headers/private/graphics/neomagic/ |
| H A D | nm_macros.h | 302 #define NM_REG8(r_) ((vuint8 *)regs)[(r_)]
306 #define NM_2REG8(r_) ((vuint8 *)regs2)[(r_)]
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| /haiku/src/add-ons/accelerants/ati/ |
| H A D | accelerant.h | 236 #define INREG8(addr) *((vuint8*)(gInfo.regs + addr))
240 #define OUTREG8(addr, val) *((vuint8*)(gInfo.regs + addr)) = val
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| /haiku/src/add-ons/accelerants/et6x00/ |
| H A D | Acceleration.c | 201 ((vuint8 *)((uint32)si->memory + srcAddr))[i] = ((uint8 *)&color)[i]; in FILL_RECTANGLE()
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| /haiku/src/add-ons/accelerants/radeon_hd/ |
| H A D | accelerant.h | 54 vuint8* regs;
|