1 /* 2 * Copyright (c) 1992, 1993 3 * The Regents of the University of California. All rights reserved. 4 * 5 * This software was developed by the Computer Systems Engineering group 6 * at Lawrence Berkeley Laboratory under DARPA contract BG 91-66 and 7 * contributed to Berkeley. 8 * 9 * Redistribution and use in source and binary forms, with or without 10 * modification, are permitted provided that the following conditions 11 * are met: 12 * 1. Redistributions of source code must retain the above copyright 13 * notice, this list of conditions and the following disclaimer. 14 * 2. Redistributions in binary form must reproduce the above copyright 15 * notice, this list of conditions and the following disclaimer in the 16 * documentation and/or other materials provided with the distribution. 17 * 4. Neither the name of the University nor the names of its contributors 18 * may be used to endorse or promote products derived from this software 19 * without specific prior written permission. 20 * 21 * THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS ``AS IS'' AND 22 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE 23 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE 24 * ARE DISCLAIMED. IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE 25 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL 26 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS 27 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) 28 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT 29 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY 30 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF 31 * SUCH DAMAGE. 32 * 33 * @(#)fpu_arith.h 8.1 (Berkeley) 6/11/93 34 * $NetBSD: fpu_arith.h,v 1.3 2000/07/24 04:11:03 mycroft Exp $ 35 * $FreeBSD: head/lib/libc/sparc64/fpu/fpu_arith.h 165903 2007-01-09 00:28:16Z imp $ 36 */ 37 38 /* 39 * Extended-precision arithmetic. 40 * 41 * We hold the notion of a `carry register', which may or may not be a 42 * machine carry bit or register. On the SPARC, it is just the machine's 43 * carry bit. 44 * 45 * In the worst case, you can compute the carry from x+y as 46 * (unsigned)(x + y) < (unsigned)x 47 * and from x+y+c as 48 * ((unsigned)(x + y + c) <= (unsigned)x && (y|c) != 0) 49 * for example. 50 */ 51 52 /* set up for extended-precision arithemtic */ 53 #define FPU_DECL_CARRY 54 55 /* 56 * We have three kinds of add: 57 * add with carry: r = x + y + c 58 * add (ignoring current carry) and set carry: c'r = x + y + 0 59 * add with carry and set carry: c'r = x + y + c 60 * The macros use `C' for `use carry' and `S' for `set carry'. 61 * Note that the state of the carry is undefined after ADDC and SUBC, 62 * so if all you have for these is `add with carry and set carry', 63 * that is OK. 64 * 65 * The same goes for subtract, except that we compute x - y - c. 66 * 67 * Finally, we have a way to get the carry into a `regular' variable, 68 * or set it from a value. SET_CARRY turns 0 into no-carry, nonzero 69 * into carry; GET_CARRY sets its argument to 0 or 1. 70 */ 71 #define FPU_ADDC(r, x, y) \ 72 __asm __volatile("addx %1,%2,%0" : "=r"(r) : "r"(x), "r"(y)) 73 #define FPU_ADDS(r, x, y) \ 74 __asm __volatile("addcc %1,%2,%0" : "=r"(r) : "r"(x), "r"(y)) 75 #define FPU_ADDCS(r, x, y) \ 76 __asm __volatile("addxcc %1,%2,%0" : "=r"(r) : "r"(x), "r"(y)) 77 #define FPU_SUBC(r, x, y) \ 78 __asm __volatile("subx %1,%2,%0" : "=r"(r) : "r"(x), "r"(y)) 79 #define FPU_SUBS(r, x, y) \ 80 __asm __volatile("subcc %1,%2,%0" : "=r"(r) : "r"(x), "r"(y)) 81 #define FPU_SUBCS(r, x, y) \ 82 __asm __volatile("subxcc %1,%2,%0" : "=r"(r) : "r"(x), "r"(y)) 83 84 #define FPU_GET_CARRY(r) __asm __volatile("addx %%g0,%%g0,%0" : "=r"(r)) 85 #define FPU_SET_CARRY(v) __asm __volatile("addcc %0,-1,%%g0" : : "r"(v)) 86 87 #define FPU_SHL1_BY_ADD /* shift left 1 faster by ADDC than (a<<1)|(b>>31) */ 88