1OUTPUT_FORMAT("elf32-littlearm", "elf32-littlearm", "elf32-littlearm") 2OUTPUT_ARCH(arm) 3 4ENTRY(_start) 5 6/* XXX: this shouldn't be needed to make kernel_arm have separate text and data segments!!! */ 7PHDRS 8{ 9 headers PT_PHDR PHDRS ; 10 text PT_LOAD FILEHDR PHDRS ; 11 data PT_LOAD ; 12 dynamic PT_DYNAMIC ; 13} 14SECTIONS 15{ 16 . = 0x80000000 + SIZEOF_HEADERS; 17 18 .interp : { *(.interp) } :text 19 .hash : { *(.hash) } 20 .dynsym : { *(.dynsym) } 21 .dynstr : { *(.dynstr) } 22 .rel.text : { *(.rel.text) *(.rel.gnu.linkonce.t*) } 23 .rela.text : { *(.rela.text) *(.rela.gnu.linkonce.t*) } 24 .rel.data : { *(.rel.data) *(.rel.gnu.linkonce.d*) } 25 .rela.data : { *(.rela.data) *(.rela.gnu.linkonce.d*) } 26 .rel.rodata : { *(.rel.rodata) *(.rel.gnu.linkonce.r*) } 27 .rela.rodata : { *(.rela.rodata) *(.rela.gnu.linkonce.r*) } 28 .rel.got : { *(.rel.got) } 29 .rela.got : { *(.rela.got) } 30 .rel.ctors : { *(.rel.ctors) } 31 .rela.ctors : { *(.rela.ctors) } 32 .rel.dtors : { *(.rel.dtors) } 33 .rela.dtors : { *(.rela.dtors) } 34 .rel.init : { *(.rel.init) } 35 .rela.init : { *(.rela.init) } 36 .rel.fini : { *(.rel.fini) } 37 .rela.fini : { *(.rela.fini) } 38 .rel.bss : { *(.rel.bss) } 39 .rela.bss : { *(.rela.bss) } 40 .rel.plt : { *(.rel.plt) } 41 .rela.plt : { *(.rela.plt) } 42 .init : { *(.init) } =0x9090 43 .plt : { *(.plt) } 44 45 /* text/read-only data */ 46 .text : { *(.text .text.* .glue_7* .gnu.linkonce.t.*) } :text =0x9090 47 48 .rodata : { 49 *(.rodata .rodata.* .gnu.linkonce.r.*) 50 . = ALIGN(4); 51 __commands_start = .; 52 KEEP (*(.commands)) 53 __commands_end = .; 54 . = ALIGN(4); 55 __apps_start = .; 56 KEEP (*(.apps)) 57 __apps_end = .; 58 . = ALIGN(4); 59 __rodata_end = . ; 60 } 61 62 /* exception unwinding - should really not be needed! XXX: find the correct place. */ 63 __exidx_start = .; 64 .ARM.exidx : { *(.ARM.exidx* .gnu.linkonce.armexidx.*) } 65 __exidx_end = .; 66 67 68 .dynamic : { *(.dynamic) } :dynamic :data 69 70 71 /* writable data */ 72 __data_start_rom = .; /* in one segment binaries, the rom data address is on top of the ram data address */ 73 __data_start = .; 74 .data : SUBALIGN(4) { *(.data .data.* .gnu.linkonce.d.*) } :data 75 76 __ctor_list = .; 77 .ctors : { *(.ctors) } 78 __ctor_end = .; 79 __dtor_list = .; 80 .dtors : { *(.dtors) } 81 __dtor_end = .; 82 .got : { *(.got.plt) *(.got) } 83 84 __data_end = .; 85 86 /* unintialized data (in same segment as writable data) */ 87 . = ALIGN(4); 88 __bss_start = .; 89 .bss : { *(.bss .bss.*) } 90 91 . = ALIGN(4); 92 _end = .; 93 94/* . = 0x80000000 + %MEMSIZE%; */ 95 _end_of_ram = .; 96 97 /* Strip unnecessary stuff */ 98 /DISCARD/ : { *(.comment .note .eh_frame) } 99} 100