1 /* 2 * Copyright 2010, Ingo Weinhold, ingo_weinhold@gmx.de. 3 * Distributed under the terms of the MIT License. 4 */ 5 #ifndef KERNEL_ARCH_X86_PAGING_PAE_PAGING_H 6 #define KERNEL_ARCH_X86_PAGING_PAE_PAGING_H 7 8 9 #include <SupportDefs.h> 10 11 12 #if B_HAIKU_PHYSICAL_BITS == 64 13 14 15 // page directory pointer table entry bits 16 #define X86_PAE_PDPTE_PRESENT 0x0000000000000001LL 17 #define X86_PAE_PDPTE_WRITE_THROUGH 0x0000000000000008LL 18 #define X86_PAE_PDPTE_CACHING_DISABLED 0x0000000000000010LL 19 #define X86_PAE_PDPTE_ADDRESS_MASK 0x000ffffffffff000LL 20 21 // page directory entry bits 22 #define X86_PAE_PDE_PRESENT 0x0000000000000001LL 23 #define X86_PAE_PDE_WRITABLE 0x0000000000000002LL 24 #define X86_PAE_PDE_USER 0x0000000000000004LL 25 #define X86_PAE_PDE_WRITE_THROUGH 0x0000000000000008LL 26 #define X86_PAE_PDE_CACHING_DISABLED 0x0000000000000010LL 27 #define X86_PAE_PDE_ACCESSED 0x0000000000000020LL 28 #define X86_PAE_PDE_IGNORED1 0x0000000000000040LL 29 #define X86_PAE_PDE_LARGE_PAGE 0x0000000000000080LL 30 #define X86_PAE_PDE_IGNORED2 0x0000000000000100LL 31 #define X86_PAE_PDE_IGNORED3 0x0000000000000200LL 32 #define X86_PAE_PDE_IGNORED4 0x0000000000000400LL 33 #define X86_PAE_PDE_IGNORED5 0x0000000000000800LL 34 #define X86_PAE_PDE_ADDRESS_MASK 0x000ffffffffff000LL 35 #define X86_PAE_PDE_NOT_EXECUTABLE 0x8000000000000000LL 36 37 // page table entry bits 38 #define X86_PAE_PTE_PRESENT 0x0000000000000001LL 39 #define X86_PAE_PTE_WRITABLE 0x0000000000000002LL 40 #define X86_PAE_PTE_USER 0x0000000000000004LL 41 #define X86_PAE_PTE_WRITE_THROUGH 0x0000000000000008LL 42 #define X86_PAE_PTE_CACHING_DISABLED 0x0000000000000010LL 43 #define X86_PAE_PTE_ACCESSED 0x0000000000000020LL 44 #define X86_PAE_PTE_DIRTY 0x0000000000000040LL 45 #define X86_PAE_PTE_PAT 0x0000000000000080LL 46 #define X86_PAE_PTE_GLOBAL 0x0000000000000100LL 47 #define X86_PAE_PTE_IGNORED1 0x0000000000000200LL 48 #define X86_PAE_PTE_IGNORED2 0x0000000000000400LL 49 #define X86_PAE_PTE_IGNORED3 0x0000000000000800LL 50 #define X86_PAE_PTE_ADDRESS_MASK 0x000ffffffffff000LL 51 #define X86_PAE_PTE_NOT_EXECUTABLE 0x8000000000000000LL 52 #define X86_PAE_PTE_PROTECTION_MASK (X86_PAE_PTE_WRITABLE \ 53 | X86_PAE_PTE_USER) 54 #define X86_PAE_PTE_MEMORY_TYPE_MASK (X86_PAE_PTE_WRITE_THROUGH \ 55 | X86_PAE_PTE_CACHING_DISABLED) 56 57 58 typedef uint64 pae_page_directory_pointer_table_entry; 59 typedef uint64 pae_page_directory_entry; 60 typedef uint64 pae_page_table_entry; 61 62 63 #endif // B_HAIKU_PHYSICAL_BITS == 64 64 65 66 #endif // KERNEL_ARCH_X86_PAGING_PAE_PAGING_H 67