1 /* 2 * Copyright 2008-2011, Michael Lotz, mmlr@mlotz.ch. 3 * Distributed under the terms of the MIT License. 4 */ 5 6 #include <arch/x86/ioapic.h> 7 8 #include <int.h> 9 #include <vm/vm.h> 10 11 #include "irq_routing_table.h" 12 13 #include <ACPI.h> 14 #include <AutoDeleter.h> 15 #include <safemode.h> 16 #include <string.h> 17 #include <stdio.h> 18 19 #include <arch/x86/apic.h> 20 #include <arch/x86/arch_int.h> 21 #include <arch/x86/pic.h> 22 23 // to gain access to the ACPICA types 24 #include "acpi.h" 25 26 27 //#define TRACE_IOAPIC 28 #ifdef TRACE_IOAPIC 29 # define TRACE(x) dprintf x 30 #else 31 # define TRACE(x) ; 32 #endif 33 34 35 // ACPI interrupt models 36 #define ACPI_INTERRUPT_MODEL_PIC 0 37 #define ACPI_INTERRUPT_MODEL_APIC 1 38 #define ACPI_INTERRUPT_MODEL_SAPIC 2 39 40 41 // Definitions for a 82093AA IO APIC controller 42 #define IO_APIC_ID 0x00 43 #define IO_APIC_VERSION 0x01 44 #define IO_APIC_ARBITRATION 0x02 45 #define IO_APIC_REDIRECTION_TABLE 0x10 // entry = base + 2 * index 46 47 // Fields for the id register 48 #define IO_APIC_ID_SHIFT 24 49 #define IO_APIC_ID_MASK 0xff 50 51 // Fields for the version register 52 #define IO_APIC_VERSION_SHIFT 0 53 #define IO_APIC_VERSION_MASK 0xff 54 #define IO_APIC_MAX_REDIRECTION_ENTRY_SHIFT 16 55 #define IO_APIC_MAX_REDIRECTION_ENTRY_MASK 0xff 56 57 // Fields of each redirection table entry 58 #define IO_APIC_DESTINATION_FIELD_SHIFT 56 59 #define IO_APIC_DESTINATION_FIELD_MASK 0xff 60 #define IO_APIC_INTERRUPT_MASKED (1 << 16) 61 #define IO_APIC_TRIGGER_MODE_EDGE (0 << 16) 62 #define IO_APIC_TRIGGER_MODE_LEVEL (1 << 15) 63 #define IO_APIC_TRIGGER_MODE_MASK (1 << 15) 64 #define IO_APIC_REMOTE_IRR (1 << 14) 65 #define IO_APIC_PIN_POLARITY_HIGH_ACTIVE (0 << 13) 66 #define IO_APIC_PIN_POLARITY_LOW_ACTIVE (1 << 13) 67 #define IO_APIC_PIN_POLARITY_MASK (1 << 13) 68 #define IO_APIC_DELIVERY_STATUS_PENDING (1 << 12) 69 #define IO_APIC_DESTINATION_MODE_PHYSICAL (0 << 11) 70 #define IO_APIC_DESTINATION_MODE_LOGICAL (1 << 11) 71 #define IO_APIC_DESTINATION_MODE_MASK (1 << 11) 72 #define IO_APIC_DELIVERY_MODE_MASK (7 << 8) 73 #define IO_APIC_DELIVERY_MODE_FIXED (0 << 8) 74 #define IO_APIC_DELIVERY_MODE_LOWEST_PRIO (1 << 8) 75 #define IO_APIC_DELIVERY_MODE_SMI (2 << 8) 76 #define IO_APIC_DELIVERY_MODE_NMI (4 << 8) 77 #define IO_APIC_DELIVERY_MODE_INIT (5 << 8) 78 #define IO_APIC_DELIVERY_MODE_EXT_INT (7 << 8) 79 #define IO_APIC_INTERRUPT_VECTOR_SHIFT 0 80 #define IO_APIC_INTERRUPT_VECTOR_MASK 0xff 81 82 #define MAX_SUPPORTED_REDIRECTION_ENTRIES 64 83 #define ISA_INTERRUPT_COUNT 16 84 85 86 struct ioapic_registers { 87 volatile uint32 io_register_select; 88 uint32 reserved[3]; 89 volatile uint32 io_window_register; 90 }; 91 92 93 struct ioapic { 94 uint8 number; 95 uint8 apic_id; 96 uint32 version; 97 uint8 max_redirection_entry; 98 uint8 global_interrupt_base; 99 uint8 global_interrupt_last; 100 uint64 level_triggered_mask; 101 uint64 nmi_mask; 102 103 area_id register_area; 104 ioapic_registers* registers; 105 106 ioapic* next; 107 }; 108 109 110 static ioapic* sIOAPICs = NULL; 111 static int32 sSourceOverrides[ISA_INTERRUPT_COUNT]; 112 113 114 // #pragma mark - I/O APIC 115 116 117 static void 118 print_ioapic(struct ioapic& ioapic) 119 { 120 dprintf("io-apic %u has range %u-%u, %u entries, version 0x%08lx, " 121 "apic-id %u\n", ioapic.number, ioapic.global_interrupt_base, 122 ioapic.global_interrupt_last, ioapic.max_redirection_entry + 1, 123 ioapic.version, ioapic.apic_id); 124 } 125 126 127 static inline struct ioapic* 128 find_ioapic(int32 gsi) 129 { 130 if (gsi < 0) 131 return NULL; 132 133 struct ioapic* current = sIOAPICs; 134 while (current != NULL) { 135 if (gsi >= current->global_interrupt_base 136 && gsi <= current->global_interrupt_last) { 137 return current; 138 } 139 140 current = current->next; 141 } 142 143 return NULL; 144 } 145 146 147 static inline uint32 148 ioapic_read_32(struct ioapic& ioapic, uint8 registerSelect) 149 { 150 ioapic.registers->io_register_select = registerSelect; 151 return ioapic.registers->io_window_register; 152 } 153 154 155 static inline void 156 ioapic_write_32(struct ioapic& ioapic, uint8 registerSelect, uint32 value) 157 { 158 ioapic.registers->io_register_select = registerSelect; 159 ioapic.registers->io_window_register = value; 160 } 161 162 163 static inline uint64 164 ioapic_read_64(struct ioapic& ioapic, uint8 registerSelect) 165 { 166 ioapic.registers->io_register_select = registerSelect + 1; 167 uint64 result = ioapic.registers->io_window_register; 168 result <<= 32; 169 ioapic.registers->io_register_select = registerSelect; 170 result |= ioapic.registers->io_window_register; 171 return result; 172 } 173 174 175 static inline void 176 ioapic_write_64(struct ioapic& ioapic, uint8 registerSelect, uint64 value, 177 bool maskFirst) 178 { 179 ioapic.registers->io_register_select 180 = registerSelect + (maskFirst ? 0 : 1); 181 ioapic.registers->io_window_register 182 = (uint32)(value >> (maskFirst ? 0 : 32)); 183 ioapic.registers->io_register_select 184 = registerSelect + (maskFirst ? 1 : 0); 185 ioapic.registers->io_window_register 186 = (uint32)(value >> (maskFirst ? 32 : 0)); 187 } 188 189 190 static void 191 ioapic_configure_pin(struct ioapic& ioapic, uint8 pin, uint8 vector, 192 uint8 triggerPolarity, uint16 deliveryMode) 193 { 194 uint64 entry = ioapic_read_64(ioapic, IO_APIC_REDIRECTION_TABLE + pin * 2); 195 entry &= ~(IO_APIC_TRIGGER_MODE_MASK | IO_APIC_PIN_POLARITY_MASK 196 | IO_APIC_INTERRUPT_VECTOR_MASK | IO_APIC_DELIVERY_MODE_MASK); 197 198 if (triggerPolarity & B_LEVEL_TRIGGERED) { 199 entry |= IO_APIC_TRIGGER_MODE_LEVEL; 200 ioapic.level_triggered_mask |= ((uint64)1 << pin); 201 } else { 202 entry |= IO_APIC_TRIGGER_MODE_EDGE; 203 ioapic.level_triggered_mask &= ~((uint64)1 << pin); 204 } 205 206 if (triggerPolarity & B_LOW_ACTIVE_POLARITY) 207 entry |= IO_APIC_PIN_POLARITY_LOW_ACTIVE; 208 else 209 entry |= IO_APIC_PIN_POLARITY_HIGH_ACTIVE; 210 211 entry |= deliveryMode; 212 entry |= (vector + ARCH_INTERRUPT_BASE) << IO_APIC_INTERRUPT_VECTOR_SHIFT; 213 ioapic_write_64(ioapic, IO_APIC_REDIRECTION_TABLE + pin * 2, entry, true); 214 } 215 216 217 static bool 218 ioapic_is_spurious_interrupt(int32 gsi) 219 { 220 // the spurious interrupt vector is initialized to the max value in smp 221 return gsi == 0xff - ARCH_INTERRUPT_BASE; 222 } 223 224 225 static bool 226 ioapic_is_level_triggered_interrupt(int32 gsi) 227 { 228 struct ioapic* ioapic = find_ioapic(gsi); 229 if (ioapic == NULL) 230 return false; 231 232 uint8 pin = gsi - ioapic->global_interrupt_base; 233 return (ioapic->level_triggered_mask & ((uint64)1 << pin)) != 0; 234 } 235 236 237 static bool 238 ioapic_end_of_interrupt(int32 num) 239 { 240 apic_end_of_interrupt(); 241 return true; 242 } 243 244 245 static void 246 ioapic_enable_io_interrupt(int32 gsi) 247 { 248 // If enabling an overriden source is attempted, enable the override entry 249 // instead. An interrupt handler was installed at the override GSI to relay 250 // interrupts to the overriden source. 251 if (gsi < ISA_INTERRUPT_COUNT && sSourceOverrides[gsi] != 0) 252 gsi = sSourceOverrides[gsi]; 253 254 struct ioapic* ioapic = find_ioapic(gsi); 255 if (ioapic == NULL) 256 return; 257 258 uint8 pin = gsi - ioapic->global_interrupt_base; 259 TRACE(("ioapic_enable_io_interrupt: gsi %ld -> io-apic %u pin %u\n", 260 gsi, ioapic->number, pin)); 261 262 uint64 entry = ioapic_read_64(*ioapic, IO_APIC_REDIRECTION_TABLE + pin * 2); 263 entry &= ~IO_APIC_INTERRUPT_MASKED; 264 ioapic_write_64(*ioapic, IO_APIC_REDIRECTION_TABLE + pin * 2, entry, false); 265 } 266 267 268 static void 269 ioapic_disable_io_interrupt(int32 gsi) 270 { 271 struct ioapic* ioapic = find_ioapic(gsi); 272 if (ioapic == NULL) 273 return; 274 275 uint8 pin = gsi - ioapic->global_interrupt_base; 276 TRACE(("ioapic_disable_io_interrupt: gsi %ld -> io-apic %u pin %u\n", 277 gsi, ioapic->number, pin)); 278 279 uint64 entry = ioapic_read_64(*ioapic, IO_APIC_REDIRECTION_TABLE + pin * 2); 280 entry |= IO_APIC_INTERRUPT_MASKED; 281 ioapic_write_64(*ioapic, IO_APIC_REDIRECTION_TABLE + pin * 2, entry, true); 282 } 283 284 285 static void 286 ioapic_configure_io_interrupt(int32 gsi, uint32 config) 287 { 288 struct ioapic* ioapic = find_ioapic(gsi); 289 if (ioapic == NULL) 290 return; 291 292 uint8 pin = gsi - ioapic->global_interrupt_base; 293 TRACE(("ioapic_configure_io_interrupt: gsi %ld -> io-apic %u pin %u; " 294 "config 0x%08lx\n", gsi, ioapic->number, pin, config)); 295 296 ioapic_configure_pin(*ioapic, pin, gsi, config, 297 IO_APIC_DELIVERY_MODE_FIXED); 298 } 299 300 301 static status_t 302 ioapic_map_ioapic(struct ioapic& ioapic, phys_addr_t physicalAddress) 303 { 304 ioapic.register_area = vm_map_physical_memory(B_SYSTEM_TEAM, "io-apic", 305 (void**)&ioapic.registers, ioapic.registers != NULL ? B_EXACT_ADDRESS 306 : B_ANY_KERNEL_ADDRESS, B_PAGE_SIZE, B_KERNEL_READ_AREA 307 | B_KERNEL_WRITE_AREA, physicalAddress, ioapic.registers != NULL); 308 if (ioapic.register_area < 0) { 309 panic("mapping io-apic %u failed", ioapic.number); 310 return ioapic.register_area; 311 } 312 313 TRACE(("mapped io-apic %u to %p\n", ioapic.number, ioapic.registers)); 314 315 ioapic.version = ioapic_read_32(ioapic, IO_APIC_VERSION); 316 if (ioapic.version == 0xffffffff) { 317 dprintf("io-apic %u seems inaccessible, not using it\n", 318 ioapic.number); 319 vm_delete_area(B_SYSTEM_TEAM, ioapic.register_area, true); 320 ioapic.register_area = -1; 321 ioapic.registers = NULL; 322 return B_ERROR; 323 } 324 325 ioapic.max_redirection_entry 326 = ((ioapic.version >> IO_APIC_MAX_REDIRECTION_ENTRY_SHIFT) 327 & IO_APIC_MAX_REDIRECTION_ENTRY_MASK); 328 if (ioapic.max_redirection_entry >= MAX_SUPPORTED_REDIRECTION_ENTRIES) { 329 dprintf("io-apic %u entry count exceeds max supported, only using the " 330 "first %u entries", ioapic.number, 331 (uint8)MAX_SUPPORTED_REDIRECTION_ENTRIES); 332 ioapic.max_redirection_entry = MAX_SUPPORTED_REDIRECTION_ENTRIES - 1; 333 } 334 335 ioapic.global_interrupt_last 336 = ioapic.global_interrupt_base + ioapic.max_redirection_entry; 337 338 ioapic.nmi_mask = 0; 339 340 return B_OK; 341 } 342 343 344 static status_t 345 ioapic_initialize_ioapic(struct ioapic& ioapic, uint8 targetAPIC) 346 { 347 // program the APIC ID 348 ioapic_write_32(ioapic, IO_APIC_ID, ioapic.apic_id << IO_APIC_ID_SHIFT); 349 350 // program the interrupt vectors of the io-apic 351 ioapic.level_triggered_mask = 0; 352 uint8 gsi = ioapic.global_interrupt_base; 353 for (uint8 i = 0; i <= ioapic.max_redirection_entry; i++, gsi++) { 354 // initialize everything to deliver to the boot CPU in physical mode 355 // and masked until explicitly enabled through enable_io_interrupt() 356 uint64 entry = ((uint64)targetAPIC << IO_APIC_DESTINATION_FIELD_SHIFT) 357 | IO_APIC_INTERRUPT_MASKED | IO_APIC_DESTINATION_MODE_PHYSICAL 358 | ((gsi + ARCH_INTERRUPT_BASE) << IO_APIC_INTERRUPT_VECTOR_SHIFT); 359 360 if (gsi == 0) { 361 // make GSI 0 into an external interrupt 362 entry |= IO_APIC_TRIGGER_MODE_EDGE 363 | IO_APIC_PIN_POLARITY_HIGH_ACTIVE 364 | IO_APIC_DELIVERY_MODE_EXT_INT; 365 } else if (gsi < ISA_INTERRUPT_COUNT) { 366 // identity map the legacy ISA interrupts 367 entry |= IO_APIC_TRIGGER_MODE_EDGE 368 | IO_APIC_PIN_POLARITY_HIGH_ACTIVE 369 | IO_APIC_DELIVERY_MODE_FIXED; 370 } else { 371 // and the rest are PCI interrupts 372 entry |= IO_APIC_TRIGGER_MODE_LEVEL 373 | IO_APIC_PIN_POLARITY_LOW_ACTIVE 374 | IO_APIC_DELIVERY_MODE_FIXED; 375 ioapic.level_triggered_mask |= ((uint64)1 << i); 376 } 377 378 ioapic_write_64(ioapic, IO_APIC_REDIRECTION_TABLE + 2 * i, entry, true); 379 } 380 381 return B_OK; 382 } 383 384 385 static int32 386 ioapic_source_override_handler(void* data) 387 { 388 int32 vector = (int32)data; 389 bool levelTriggered = ioapic_is_level_triggered_interrupt(vector); 390 return int_io_interrupt_handler(vector, levelTriggered); 391 } 392 393 394 static status_t 395 acpi_enumerate_ioapics(acpi_table_madt* madt) 396 { 397 struct ioapic* lastIOAPIC = sIOAPICs; 398 399 acpi_subtable_header* apicEntry 400 = (acpi_subtable_header*)((uint8*)madt + sizeof(acpi_table_madt)); 401 void* end = ((uint8*)madt + madt->Header.Length); 402 while (apicEntry < end) { 403 switch (apicEntry->Type) { 404 case ACPI_MADT_TYPE_IO_APIC: 405 { 406 acpi_madt_io_apic* info = (acpi_madt_io_apic*)apicEntry; 407 dprintf("found io-apic with address 0x%08lx, global " 408 "interrupt base %lu, apic-id %u\n", (uint32)info->Address, 409 (uint32)info->GlobalIrqBase, info->Id); 410 411 struct ioapic* ioapic 412 = (struct ioapic*)malloc(sizeof(struct ioapic)); 413 if (ioapic == NULL) { 414 dprintf("ran out of memory while allocating io-apic " 415 "structure\n"); 416 return B_NO_MEMORY; 417 } 418 419 ioapic->number 420 = lastIOAPIC != NULL ? lastIOAPIC->number + 1 : 0; 421 ioapic->apic_id = info->Id; 422 ioapic->global_interrupt_base = info->GlobalIrqBase; 423 ioapic->registers = NULL; 424 ioapic->next = NULL; 425 426 dprintf("mapping io-apic %u at physical address %p\n", 427 ioapic->number, (void*)info->Address); 428 status_t status = ioapic_map_ioapic(*ioapic, info->Address); 429 if (status != B_OK) { 430 free(ioapic); 431 break; 432 } 433 434 print_ioapic(*ioapic); 435 436 if (lastIOAPIC == NULL) 437 sIOAPICs = ioapic; 438 else 439 lastIOAPIC->next = ioapic; 440 441 lastIOAPIC = ioapic; 442 break; 443 } 444 445 case ACPI_MADT_TYPE_NMI_SOURCE: 446 { 447 acpi_madt_nmi_source* info 448 = (acpi_madt_nmi_source*)apicEntry; 449 dprintf("found nmi source global irq %lu, flags 0x%04x\n", 450 (uint32)info->GlobalIrq, (uint16)info->IntiFlags); 451 452 struct ioapic* ioapic = find_ioapic(info->GlobalIrq); 453 if (ioapic == NULL) { 454 dprintf("nmi source for gsi that is not mapped to any " 455 " io-apic\n"); 456 break; 457 } 458 459 uint8 pin = info->GlobalIrq - ioapic->global_interrupt_base; 460 ioapic->nmi_mask |= (uint64)1 << pin; 461 break; 462 } 463 } 464 465 apicEntry 466 = (acpi_subtable_header*)((uint8*)apicEntry + apicEntry->Length); 467 } 468 469 return B_OK; 470 } 471 472 473 static inline uint32 474 acpi_madt_convert_inti_flags(uint16 flags) 475 { 476 uint32 config = 0; 477 switch (flags & ACPI_MADT_POLARITY_MASK) { 478 case ACPI_MADT_POLARITY_ACTIVE_LOW: 479 config = B_LOW_ACTIVE_POLARITY; 480 break; 481 default: 482 dprintf("invalid polarity in inti flags\n"); 483 // fall through and assume active high 484 case ACPI_MADT_POLARITY_ACTIVE_HIGH: 485 case ACPI_MADT_POLARITY_CONFORMS: 486 config = B_HIGH_ACTIVE_POLARITY; 487 break; 488 } 489 490 switch (flags & ACPI_MADT_TRIGGER_MASK) { 491 case ACPI_MADT_TRIGGER_LEVEL: 492 config |= B_LEVEL_TRIGGERED; 493 break; 494 default: 495 dprintf("invalid trigger mode in inti flags\n"); 496 // fall through and assume edge triggered 497 case ACPI_MADT_TRIGGER_CONFORMS: 498 case ACPI_MADT_TRIGGER_EDGE: 499 config |= B_EDGE_TRIGGERED; 500 break; 501 } 502 503 return config; 504 } 505 506 507 static void 508 acpi_configure_source_overrides(acpi_table_madt* madt) 509 { 510 acpi_subtable_header* apicEntry 511 = (acpi_subtable_header*)((uint8*)madt + sizeof(acpi_table_madt)); 512 void* end = ((uint8*)madt + madt->Header.Length); 513 while (apicEntry < end) { 514 switch (apicEntry->Type) { 515 case ACPI_MADT_TYPE_INTERRUPT_OVERRIDE: 516 { 517 acpi_madt_interrupt_override* info 518 = (acpi_madt_interrupt_override*)apicEntry; 519 dprintf("found interrupt override for bus %u, source irq %u, " 520 "global irq %lu, flags 0x%08lx\n", info->Bus, 521 info->SourceIrq, (uint32)info->GlobalIrq, 522 (uint32)info->IntiFlags); 523 524 if (info->SourceIrq >= ISA_INTERRUPT_COUNT) { 525 dprintf("source override exceeds isa interrupt count\n"); 526 break; 527 } 528 529 if (info->SourceIrq != info->GlobalIrq) { 530 // we need a vector mapping 531 install_io_interrupt_handler(info->GlobalIrq, 532 &ioapic_source_override_handler, 533 (void*)(addr_t)info->SourceIrq, B_NO_ENABLE_COUNTER); 534 535 sSourceOverrides[info->SourceIrq] = info->GlobalIrq; 536 } 537 538 // configure non-standard polarity/trigger modes 539 uint32 config = acpi_madt_convert_inti_flags(info->IntiFlags); 540 ioapic_configure_io_interrupt(info->GlobalIrq, config); 541 break; 542 } 543 544 case ACPI_MADT_TYPE_NMI_SOURCE: 545 { 546 acpi_madt_nmi_source* info 547 = (acpi_madt_nmi_source*)apicEntry; 548 dprintf("found nmi source global irq %lu, flags 0x%04x\n", 549 (uint32)info->GlobalIrq, (uint16)info->IntiFlags); 550 551 struct ioapic* ioapic = find_ioapic(info->GlobalIrq); 552 if (ioapic == NULL) 553 break; 554 555 uint8 pin = info->GlobalIrq - ioapic->global_interrupt_base; 556 uint32 config = acpi_madt_convert_inti_flags(info->IntiFlags); 557 ioapic_configure_pin(*ioapic, pin, info->GlobalIrq, config, 558 IO_APIC_DELIVERY_MODE_NMI); 559 break; 560 } 561 562 #ifdef TRACE_IOAPIC 563 case ACPI_MADT_TYPE_LOCAL_APIC: 564 { 565 // purely informational 566 acpi_madt_local_apic* info = (acpi_madt_local_apic*)apicEntry; 567 dprintf("found local apic with id %u, processor id %u, " 568 "flags 0x%08lx\n", info->Id, info->ProcessorId, 569 (uint32)info->LapicFlags); 570 break; 571 } 572 573 case ACPI_MADT_TYPE_LOCAL_APIC_NMI: 574 { 575 // TODO: take these into account, but at apic.cpp 576 acpi_madt_local_apic_nmi* info 577 = (acpi_madt_local_apic_nmi*)apicEntry; 578 dprintf("found local apic nmi source for processor %u, " 579 "flags 0x%04x, local int %u\n", info->ProcessorId, 580 (uint16)info->IntiFlags, info->Lint); 581 break; 582 } 583 584 case ACPI_MADT_TYPE_LOCAL_APIC_OVERRIDE: 585 { 586 // TODO: take these into account, but at apic.cpp 587 acpi_madt_local_apic_override* info 588 = (acpi_madt_local_apic_override*)apicEntry; 589 dprintf("found local apic override with address 0x%016llx\n", 590 (uint64)info->Address); 591 break; 592 } 593 594 default: 595 dprintf("found unhandled subtable of type %u length %u\n", 596 apicEntry->Type, apicEntry->Length); 597 break; 598 #endif 599 } 600 601 apicEntry 602 = (acpi_subtable_header*)((uint8*)apicEntry + apicEntry->Length); 603 } 604 } 605 606 607 static status_t 608 acpi_set_interrupt_model(acpi_module_info* acpiModule, uint32 interruptModel) 609 { 610 acpi_object_type model; 611 model.object_type = ACPI_TYPE_INTEGER; 612 model.data.integer = interruptModel; 613 614 acpi_objects parameter; 615 parameter.count = 1; 616 parameter.pointer = &model; 617 618 dprintf("setting ACPI interrupt model to %s\n", 619 interruptModel == 0 ? "PIC" 620 : (interruptModel == 1 ? "APIC" 621 : (interruptModel == 2 ? "SAPIC" 622 : "unknown"))); 623 624 return acpiModule->evaluate_method(NULL, "\\_PIC", ¶meter, NULL); 625 } 626 627 628 bool 629 ioapic_is_interrupt_available(int32 gsi) 630 { 631 struct ioapic* ioapic = find_ioapic(gsi); 632 if (ioapic == NULL) 633 return false; 634 635 uint8 pin = gsi - ioapic->global_interrupt_base; 636 return (ioapic->nmi_mask & ((uint64)1 << pin)) == 0; 637 } 638 639 640 void 641 ioapic_init(kernel_args* args) 642 { 643 static const interrupt_controller ioapicController = { 644 "82093AA IOAPIC", 645 &ioapic_enable_io_interrupt, 646 &ioapic_disable_io_interrupt, 647 &ioapic_configure_io_interrupt, 648 &ioapic_is_spurious_interrupt, 649 &ioapic_is_level_triggered_interrupt, 650 &ioapic_end_of_interrupt 651 }; 652 653 if (args->arch_args.apic == NULL) 654 return; 655 656 if (args->arch_args.ioapic_phys == 0) { 657 dprintf("no io-apics available, not using io-apics for interrupt " 658 "routing\n"); 659 return; 660 } 661 662 if (get_safemode_boolean(B_SAFEMODE_DISABLE_IOAPIC, false)) { 663 dprintf("io-apics explicitly disabled, not using io-apics for " 664 "interrupt routing\n"); 665 return; 666 } 667 668 // load acpi module 669 status_t status; 670 acpi_module_info* acpiModule; 671 status = get_module(B_ACPI_MODULE_NAME, (module_info**)&acpiModule); 672 if (status != B_OK) { 673 dprintf("acpi module not available, not configuring io-apics\n"); 674 return; 675 } 676 BPrivate::CObjectDeleter<const char, status_t> 677 acpiModulePutter(B_ACPI_MODULE_NAME, put_module); 678 679 acpi_table_madt* madt = NULL; 680 if (acpiModule->get_table(ACPI_SIG_MADT, 0, (void**)&madt) != B_OK) { 681 dprintf("failed to get MADT from ACPI, not configuring io-apics\n"); 682 return; 683 } 684 685 status = acpi_enumerate_ioapics(madt); 686 if (status != B_OK) { 687 // We don't treat this case as fatal just yet. If we are able to 688 // route everything with the available IO-APICs we're fine, if not 689 // we will fail at the routing preparation stage further down. 690 dprintf("failed to enumerate all io-apics, working with what we got\n"); 691 } 692 693 // switch to the APIC interrupt model before retrieving the IRQ routing 694 // table as it will return different settings depending on the model 695 status = acpi_set_interrupt_model(acpiModule, ACPI_INTERRUPT_MODEL_APIC); 696 if (status != B_OK) { 697 dprintf("failed to put ACPI into APIC interrupt model, ignoring\n"); 698 // don't abort, as the _PIC method is optional and as long as there 699 // aren't different routings based on it this is non-fatal 700 } 701 702 IRQRoutingTable table; 703 status = prepare_irq_routing(acpiModule, table, 704 &ioapic_is_interrupt_available); 705 if (status != B_OK) { 706 dprintf("IRQ routing preparation failed, not configuring io-apics\n"); 707 acpi_set_interrupt_model(acpiModule, ACPI_INTERRUPT_MODEL_PIC); 708 // revert to PIC interrupt model just in case 709 return; 710 } 711 712 // use the boot CPU as the target for all interrupts 713 uint8 targetAPIC = args->arch_args.cpu_apic_id[0]; 714 715 struct ioapic* current = sIOAPICs; 716 while (current != NULL) { 717 status = ioapic_initialize_ioapic(*current, targetAPIC); 718 if (status != B_OK) { 719 panic("failed to initialize io-apic %u", current->number); 720 acpi_set_interrupt_model(acpiModule, ACPI_INTERRUPT_MODEL_PIC); 721 return; 722 } 723 724 current = current->next; 725 } 726 727 #ifdef TRACE_IOAPIC 728 dprintf("trying interrupt routing:\n"); 729 print_irq_routing_table(table); 730 #endif 731 732 status = enable_irq_routing(acpiModule, table); 733 if (status != B_OK) { 734 panic("failed to enable IRQ routing"); 735 // if it failed early on it might still work in PIC mode 736 acpi_set_interrupt_model(acpiModule, ACPI_INTERRUPT_MODEL_PIC); 737 return; 738 } 739 740 print_irq_routing_table(table); 741 742 // configure the source overrides, but let the PCI config below override it 743 acpi_configure_source_overrides(madt); 744 745 // configure IO-APIC interrupts from PCI routing table 746 for (int i = 0; i < table.Count(); i++) { 747 irq_routing_entry& entry = table.ElementAt(i); 748 ioapic_configure_io_interrupt(entry.irq, 749 entry.polarity | entry.trigger_mode); 750 } 751 752 // kill the local ints on the local APIC 753 apic_disable_local_ints(); 754 // TODO: This uses the assumption that our init is running on the 755 // boot CPU and only the boot CPU has the local ints configured 756 // because it was running in legacy PIC mode. Possibly the other 757 // local APICs of the other CPUs have them configured as well. It 758 // shouldn't really harm, but should eventually be corrected. 759 760 // disable the legacy PIC 761 uint16 legacyInterrupts; 762 pic_disable(legacyInterrupts); 763 764 // enable previsouly enabled legacy interrupts 765 for (uint8 i = 0; i < 16; i++) { 766 if ((legacyInterrupts & (1 << i)) != 0) 767 ioapic_enable_io_interrupt(i); 768 } 769 770 // mark the interrupt vectors reserved so they aren't used for other stuff 771 current = sIOAPICs; 772 while (current != NULL) { 773 reserve_io_interrupt_vectors(current->max_redirection_entry + 1, 774 current->global_interrupt_base); 775 current = current->next; 776 } 777 778 // prefer the ioapic over the normal pic 779 dprintf("using io-apics for interrupt routing\n"); 780 arch_int_set_interrupt_controller(ioapicController); 781 } 782