1 /* 2 * Copyright 2003-2005, Axel Dörfler, axeld@pinc-software.de. 3 * Distributed under the terms of the MIT License. 4 * 5 * Copyright 2001, Travis Geiselbrecht. All rights reserved. 6 * Distributed under the terms of the NewOS License. 7 */ 8 9 10 #include <KernelExport.h> 11 12 #include <arch_platform.h> 13 #include <arch_thread.h> 14 #include <arch/cpu.h> 15 #include <boot/kernel_args.h> 16 17 static bool sHasTlbia; 18 19 status_t 20 arch_cpu_preboot_init_percpu(kernel_args *args, int curr_cpu) 21 { 22 // enable FPU 23 set_msr(get_msr() | MSR_FP_AVAILABLE); 24 25 // The current thread must be NULL for all CPUs till we have threads. 26 // Some boot code relies on this. 27 arch_thread_set_current_thread(NULL); 28 29 return B_OK; 30 } 31 32 33 status_t 34 arch_cpu_init(kernel_args *args) 35 { 36 // TODO: Let the boot loader put that info into the kernel args 37 // (property "tlbia" in the CPU node). 38 sHasTlbia = false; 39 40 return B_OK; 41 } 42 43 44 status_t 45 arch_cpu_init_post_vm(kernel_args *args) 46 { 47 return B_OK; 48 } 49 50 status_t 51 arch_cpu_init_post_modules(kernel_args *args) 52 { 53 return B_OK; 54 } 55 56 #define CACHELINE 32 57 58 void 59 arch_cpu_sync_icache(void *address, size_t len) 60 { 61 int l, off; 62 char *p; 63 64 off = (unsigned int)address & (CACHELINE - 1); 65 len += off; 66 67 l = len; 68 p = (char *)address - off; 69 do { 70 asm volatile ("dcbst 0,%0" :: "r"(p)); 71 p += CACHELINE; 72 } while ((l -= CACHELINE) > 0); 73 asm volatile ("sync"); 74 75 p = (char *)address - off; 76 do { 77 asm volatile ("icbi 0,%0" :: "r"(p)); 78 p += CACHELINE; 79 } while ((len -= CACHELINE) > 0); 80 asm volatile ("sync"); 81 isync(); 82 } 83 84 85 void 86 arch_cpu_invalidate_TLB_range(addr_t start, addr_t end) 87 { 88 asm volatile("sync"); 89 while (start < end) { 90 asm volatile("tlbie %0" :: "r" (start)); 91 asm volatile("eieio"); 92 asm volatile("sync"); 93 start += B_PAGE_SIZE; 94 } 95 asm volatile("tlbsync"); 96 asm volatile("sync"); 97 } 98 99 100 void 101 arch_cpu_invalidate_TLB_list(addr_t pages[], int num_pages) 102 { 103 int i; 104 105 asm volatile("sync"); 106 for (i = 0; i < num_pages; i++) { 107 asm volatile("tlbie %0" :: "r" (pages[i])); 108 asm volatile("eieio"); 109 asm volatile("sync"); 110 } 111 asm volatile("tlbsync"); 112 asm volatile("sync"); 113 } 114 115 116 void 117 arch_cpu_global_TLB_invalidate(void) 118 { 119 if (sHasTlbia) { 120 ppc_sync(); 121 tlbia(); 122 ppc_sync(); 123 } else { 124 addr_t address = 0; 125 unsigned long i; 126 127 ppc_sync(); 128 for (i = 0; i < 0x100000; i++) { 129 tlbie(address); 130 eieio(); 131 ppc_sync(); 132 133 address += B_PAGE_SIZE; 134 } 135 tlbsync(); 136 ppc_sync(); 137 } 138 } 139 140 141 void 142 arch_cpu_user_TLB_invalidate(void) 143 { 144 arch_cpu_global_TLB_invalidate(); 145 } 146 147 148 status_t 149 arch_cpu_user_memcpy(void *to, const void *from, size_t size, 150 addr_t *faultHandler) 151 { 152 char *tmp = (char *)to; 153 char *s = (char *)from; 154 155 if (ppc_set_fault_handler(faultHandler, (addr_t)&&error)) 156 goto error; 157 158 while (size--) 159 *tmp++ = *s++; 160 161 *faultHandler = 0; 162 return 0; 163 164 error: 165 *faultHandler = 0; 166 return B_BAD_ADDRESS; 167 } 168 169 170 /** \brief Copies at most (\a size - 1) characters from the string in \a from to 171 * the string in \a to, NULL-terminating the result. 172 * 173 * \param to Pointer to the destination C-string. 174 * \param from Pointer to the source C-string. 175 * \param size Size in bytes of the string buffer pointed to by \a to. 176 * 177 * \return strlen(\a from). 178 */ 179 180 ssize_t 181 arch_cpu_user_strlcpy(char *to, const char *from, size_t size, addr_t *faultHandler) 182 { 183 int from_length = 0; 184 185 if (ppc_set_fault_handler(faultHandler, (addr_t)&&error)) 186 goto error; 187 188 if (size > 0) { 189 to[--size] = '\0'; 190 // copy 191 for ( ; size; size--, from_length++, to++, from++) { 192 if ((*to = *from) == '\0') 193 break; 194 } 195 } 196 // count any leftover from chars 197 while (*from++ != '\0') 198 from_length++; 199 200 *faultHandler = 0; 201 return from_length; 202 203 error: 204 *faultHandler = 0; 205 return B_BAD_ADDRESS; 206 } 207 208 209 status_t 210 arch_cpu_user_memset(void *s, char c, size_t count, addr_t *faultHandler) 211 { 212 char *xs = (char *)s; 213 214 if (ppc_set_fault_handler(faultHandler, (addr_t)&&error)) 215 goto error; 216 217 while (count--) 218 *xs++ = c; 219 220 *faultHandler = 0; 221 return 0; 222 223 error: 224 *faultHandler = 0; 225 return B_BAD_ADDRESS; 226 } 227 228 229 status_t 230 arch_cpu_shutdown(bool reboot) 231 { 232 PPCPlatform::Default()->ShutDown(reboot); 233 return B_ERROR; 234 } 235 236 237 void 238 arch_cpu_idle(void) 239 { 240 } 241 242 243 // The purpose of this function is to trick the compiler. When setting the 244 // page_handler to a label that is obviously (to the compiler) never used, 245 // it may reorganize the control flow, so that the labeled part is optimized 246 // away. 247 // By invoking the function like this 248 // 249 // if (ppc_set_fault_handler(faultHandler, (addr_t)&&error)) 250 // goto error; 251 // 252 // the compiler has to keep the labeled code, since it can't guess the return 253 // value of this (non-inlinable) function. At least in my tests it worked that 254 // way, and I hope it will continue to work like this in the future. 255 // 256 bool 257 ppc_set_fault_handler(addr_t *handlerLocation, addr_t handler) 258 { 259 *handlerLocation = handler; 260 return false; 261 } 262