1/* 2 * Copyright 2009, Wischert, johanneswi@gmail.com. 3 * All rights reserved. Distributed under the terms of the MIT License. 4 * 5 * Copyright 2003, Travis Geiselbrecht. All rights reserved. 6 * Distributed under the terms of the NewOS License. 7 */ 8 9#include <arch/arm/arch_cpu.h> 10 11#include <asm_defs.h> 12 13.text 14 15 16 17/* void arch_int_enable_interrupts(void) */ 18FUNCTION(arch_int_enable_interrupts): 19 mrs r0, cpsr 20 bic r0, r0, #(1<<7) /* clear the I bit */ 21 msr cpsr_c, r0 22 bx lr 23FUNCTION_END(arch_int_enable_interrupts) 24 25 26/* int arch_int_disable_interrupts(void) 27 */ 28FUNCTION(arch_int_disable_interrupts): 29 mrs r0, cpsr 30 orr r0, r0, #(1<<7) 31 msr cpsr_c, r0 32 bx lr 33FUNCTION_END(arch_int_disable_interrupts) 34 35 36/* void arch_int_restore_interrupts(int oldState) 37 */ 38FUNCTION(arch_int_restore_interrupts): 39 mrs r1, cpsr 40 orr r0,r0, #(1<<7) 41 bic r1, r1,#(1<<7) 42 orr r1, r1, r0 43 msr cpsr_c, r1 44 bx lr 45FUNCTION_END(arch_int_restore_interrupts) 46 47 48/* bool arch_int_are_interrupts_enabled(void) */ 49FUNCTION(arch_int_are_interrupts_enabled): 50 mrs r0, cpsr 51 and r0, r0, #(1<<7) /*read the I bit*/ 52 cmp r0,#0 53 moveq r0,#1 54 movne r0,#0 55 bx lr 56FUNCTION_END(arch_int_are_interrupts_enabled) 57 58 59