1 /* 2 * Copyright 2021-2022, Oliver Ruiz Dorantes. All rights reserved. 3 * Distributed under the terms of the MIT License. 4 */ 5 #include <boot/platform.h> 6 #include <boot/stage2.h> 7 8 #include "aarch64.h" 9 10 11 void 12 arch_cache_disable() 13 { 14 if (arch_mmu_cache_enabled()) { 15 uint64 sctlr = _arch_mmu_get_sctlr(); 16 sctlr &= ~(SCTLR_M | SCTLR_C | SCTLR_I); 17 _arch_mmu_set_sctlr(sctlr); 18 19 _arch_cache_clean_poc(); 20 _arch_mmu_invalidate_tlb_all(arch_exception_level()); 21 } 22 } 23 24 25 void 26 arch_cache_enable() 27 { 28 if (!arch_mmu_cache_enabled()) { 29 uint64 sctlr = _arch_mmu_get_sctlr(); 30 sctlr |= (SCTLR_M | SCTLR_C | SCTLR_I); 31 _arch_mmu_set_sctlr(sctlr); 32 } 33 } 34