xref: /haiku/src/system/boot/platform/efi/arch/arm/entry.S (revision 9e25244c5e9051f6cd333820d6332397361abd6c)
1/*
2 * Copyright 2011, François Revol <revol@free.fr>.
3 * All rights reserved. Distributed under the terms of the MIT License.
4 */
5
6#include <asm_defs.h>
7
8
9	.text
10
11/*	status_t arch_enter_kernel(uint32_t ttbr, struct kernel_args *kernelArgs,
12		addr_t kernelEntry, addr_t kernelStackTop);
13
14	r0	- ttbr
15	r1	- kernelArgs
16	r2	- kernelEntry
17	r3	- kernelStackTop
18*/
19FUNCTION(arch_enter_kernel):
20
21
22	mov		r5,r0
23	mov		r4,r2
24
25	// set up kernel _start args
26	mov		r0,r1	// kernelArgs
27	mov		r1,#0	// currentCPU=0
28
29	// enable full access for coprocessors P10, P11
30	// by setting the required flags in Access Control Register
31	MRC p15, #0, r9, c1, c0, #2
32	orr r9, r9, #0x00f00000
33	MCR p15, #0, r9, c1, c0, #2
34
35	// flush prefetch buffer
36	mov r9, #0
37	MCR p15, #0, r9, c7, c5, #4
38
39	// enable FPU
40	mov r9, #0x40000000
41	FMXR FPEXC, r9
42
43	// flush TLB
44	MCR p15, 0, r1, c8, c7, 0
45
46	// set TTBR0
47	MCR p15, 0, r5, c2, c0, 0
48
49	// initialize TTBCR to zero (no LPAE, use only TTBR0)
50	MCR p15, 0, r1, c2, c0, 2
51
52	// flush TLB (again)
53	MCR p15, 0, r1, c8, c7, 0
54
55	// write DACR
56	mov r9, #0xffffffff
57	MCR p15, 0, r9, c3, c0, 0
58
59	// enable MMU
60	MRC p15, 0, r9, c1, c0, 0
61	orr r9, r9, #1
62	MCR p15, 0, r9, c1, c0, 0
63
64	// set the kernel stack
65	mov		sp,r3
66
67	// call the kernel
68	mov		pc,r4
69
70	// return
71	mov		r0,#-1	// B_ERROR
72	mov		pc,lr
73
74FUNCTION_END(arch_enter_kernel)
75
76