1 /* $NetBSD: mii_physubr.c,v 1.5 1999/08/03 19:41:49 drochner Exp $ */ 2 3 /*- 4 * Copyright (c) 1998, 1999, 2000, 2001 The NetBSD Foundation, Inc. 5 * All rights reserved. 6 * 7 * This code is derived from software contributed to The NetBSD Foundation 8 * by Jason R. Thorpe of the Numerical Aerospace Simulation Facility, 9 * NASA Ames Research Center. 10 * 11 * Redistribution and use in source and binary forms, with or without 12 * modification, are permitted provided that the following conditions 13 * are met: 14 * 1. Redistributions of source code must retain the above copyright 15 * notice, this list of conditions and the following disclaimer. 16 * 2. Redistributions in binary form must reproduce the above copyright 17 * notice, this list of conditions and the following disclaimer in the 18 * documentation and/or other materials provided with the distribution. 19 * 3. All advertising materials mentioning features or use of this software 20 * must display the following acknowledgement: 21 * This product includes software developed by the NetBSD 22 * Foundation, Inc. and its contributors. 23 * 4. Neither the name of The NetBSD Foundation nor the names of its 24 * contributors may be used to endorse or promote products derived 25 * from this software without specific prior written permission. 26 * 27 * THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS 28 * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED 29 * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR 30 * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS 31 * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR 32 * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF 33 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS 34 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN 35 * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) 36 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE 37 * POSSIBILITY OF SUCH DAMAGE. 38 */ 39 #include <sys/cdefs.h> 40 __FBSDID("$FreeBSD: src/sys/dev/mii/mii_physubr.c,v 1.22.2.2 2006/07/29 08:30:12 oleg Exp $"); 41 42 /* 43 * Subroutines common to all PHYs. 44 */ 45 46 #include <sys/param.h> 47 #include <sys/systm.h> 48 #include <sys/kernel.h> 49 #include <sys/socket.h> 50 #include <sys/errno.h> 51 #include <sys/module.h> 52 #include <sys/bus.h> 53 54 #include <net/if.h> 55 #include <net/if_media.h> 56 57 #include <dev/mii/mii.h> 58 #include <dev/mii/miivar.h> 59 60 #include "miibus_if.h" 61 62 /* 63 * Media to register setting conversion table. Order matters. 64 */ 65 const struct mii_media mii_media_table[MII_NMEDIA] = { 66 /* None */ 67 { BMCR_ISO, ANAR_CSMA, 68 0, }, 69 70 /* 10baseT */ 71 { BMCR_S10, ANAR_CSMA|ANAR_10, 72 0, }, 73 74 /* 10baseT-FDX */ 75 { BMCR_S10|BMCR_FDX, ANAR_CSMA|ANAR_10_FD, 76 0, }, 77 78 /* 100baseT4 */ 79 { BMCR_S100, ANAR_CSMA|ANAR_T4, 80 0, }, 81 82 /* 100baseTX */ 83 { BMCR_S100, ANAR_CSMA|ANAR_TX, 84 0, }, 85 86 /* 100baseTX-FDX */ 87 { BMCR_S100|BMCR_FDX, ANAR_CSMA|ANAR_TX_FD, 88 0, }, 89 90 /* 1000baseX */ 91 { BMCR_S1000, ANAR_CSMA, 92 0, }, 93 94 /* 1000baseX-FDX */ 95 { BMCR_S1000|BMCR_FDX, ANAR_CSMA, 96 0, }, 97 98 /* 1000baseT */ 99 { BMCR_S1000, ANAR_CSMA, 100 GTCR_ADV_1000THDX }, 101 102 /* 1000baseT-FDX */ 103 { BMCR_S1000, ANAR_CSMA, 104 GTCR_ADV_1000TFDX }, 105 }; 106 107 void 108 mii_phy_setmedia(struct mii_softc *sc) 109 { 110 struct mii_data *mii = sc->mii_pdata; 111 struct ifmedia_entry *ife = mii->mii_media.ifm_cur; 112 int bmcr, anar, gtcr; 113 114 if (IFM_SUBTYPE(ife->ifm_media) == IFM_AUTO) { 115 if ((PHY_READ(sc, MII_BMCR) & BMCR_AUTOEN) == 0) 116 (void) mii_phy_auto(sc); 117 return; 118 } 119 120 /* 121 * Table index is stored in the media entry. 122 */ 123 124 KASSERT(ife->ifm_data >=0 && ife->ifm_data < MII_NMEDIA, 125 ("invalid ife->ifm_data (0x%x) in mii_phy_setmedia", 126 ife->ifm_data)); 127 128 anar = mii_media_table[ife->ifm_data].mm_anar; 129 bmcr = mii_media_table[ife->ifm_data].mm_bmcr; 130 gtcr = mii_media_table[ife->ifm_data].mm_gtcr; 131 132 if (mii->mii_media.ifm_media & IFM_ETH_MASTER) { 133 switch (IFM_SUBTYPE(ife->ifm_media)) { 134 case IFM_1000_T: 135 gtcr |= GTCR_MAN_MS|GTCR_ADV_MS; 136 break; 137 138 default: 139 panic("mii_phy_setmedia: MASTER on wrong media"); 140 } 141 } 142 143 if (ife->ifm_media & IFM_LOOP) 144 bmcr |= BMCR_LOOP; 145 146 PHY_WRITE(sc, MII_ANAR, anar); 147 PHY_WRITE(sc, MII_BMCR, bmcr); 148 if (sc->mii_flags & MIIF_HAVE_GTCR) 149 PHY_WRITE(sc, MII_100T2CR, gtcr); 150 } 151 152 int 153 mii_phy_auto(struct mii_softc *sc) 154 { 155 156 /* 157 * Check for 1000BASE-X. Autonegotiation is a bit 158 * different on such devices. 159 */ 160 if (sc->mii_flags & MIIF_IS_1000X) { 161 uint16_t anar = 0; 162 163 if (sc->mii_extcapabilities & EXTSR_1000XFDX) 164 anar |= ANAR_X_FD; 165 if (sc->mii_extcapabilities & EXTSR_1000XHDX) 166 anar |= ANAR_X_HD; 167 168 if (sc->mii_flags & MIIF_DOPAUSE) { 169 /* XXX Asymmetric vs. symmetric? */ 170 anar |= ANLPAR_X_PAUSE_TOWARDS; 171 } 172 173 PHY_WRITE(sc, MII_ANAR, anar); 174 } else { 175 uint16_t anar; 176 177 anar = BMSR_MEDIA_TO_ANAR(sc->mii_capabilities) | 178 ANAR_CSMA; 179 if (sc->mii_flags & MIIF_DOPAUSE) 180 anar |= ANAR_FC; 181 PHY_WRITE(sc, MII_ANAR, anar); 182 if (sc->mii_flags & MIIF_HAVE_GTCR) { 183 uint16_t gtcr = 0; 184 185 if (sc->mii_extcapabilities & EXTSR_1000TFDX) 186 gtcr |= GTCR_ADV_1000TFDX; 187 if (sc->mii_extcapabilities & EXTSR_1000THDX) 188 gtcr |= GTCR_ADV_1000THDX; 189 190 PHY_WRITE(sc, MII_100T2CR, gtcr); 191 } 192 } 193 PHY_WRITE(sc, MII_BMCR, BMCR_AUTOEN | BMCR_STARTNEG); 194 return (EJUSTRETURN); 195 } 196 197 int 198 mii_phy_tick(struct mii_softc *sc) 199 { 200 struct ifmedia_entry *ife = sc->mii_pdata->mii_media.ifm_cur; 201 struct ifnet *ifp = sc->mii_pdata->mii_ifp; 202 int reg; 203 204 /* Just bail now if the interface is down. */ 205 if ((ifp->if_flags & IFF_UP) == 0) 206 return (EJUSTRETURN); 207 208 /* 209 * If we're not doing autonegotiation, we don't need to do 210 * any extra work here. However, we need to check the link 211 * status so we can generate an announcement if the status 212 * changes. 213 */ 214 if (IFM_SUBTYPE(ife->ifm_media) != IFM_AUTO) { 215 sc->mii_ticks = 0; /* reset autonegotiation timer. */ 216 return (0); 217 } 218 219 /* Read the status register twice; BMSR_LINK is latch-low. */ 220 reg = PHY_READ(sc, MII_BMSR) | PHY_READ(sc, MII_BMSR); 221 if (reg & BMSR_LINK) { 222 sc->mii_ticks = 0; /* reset autonegotiation timer. */ 223 /* See above. */ 224 return (0); 225 } 226 227 /* Announce link loss right after it happens */ 228 if (sc->mii_ticks++ == 0) 229 return (0); 230 231 /* XXX: use default value if phy driver did not set mii_anegticks */ 232 if (sc->mii_anegticks == 0) 233 sc->mii_anegticks = MII_ANEGTICKS_GIGE; 234 235 /* Only retry autonegotiation every mii_anegticks ticks. */ 236 if (sc->mii_ticks <= sc->mii_anegticks) 237 return (EJUSTRETURN); 238 239 sc->mii_ticks = 0; 240 mii_phy_reset(sc); 241 mii_phy_auto(sc); 242 return (0); 243 } 244 245 void 246 mii_phy_reset(struct mii_softc *sc) 247 { 248 int reg, i; 249 250 if (sc->mii_flags & MIIF_NOISOLATE) 251 reg = BMCR_RESET; 252 else 253 reg = BMCR_RESET | BMCR_ISO; 254 PHY_WRITE(sc, MII_BMCR, reg); 255 256 /* Wait 100ms for it to complete. */ 257 for (i = 0; i < 100; i++) { 258 reg = PHY_READ(sc, MII_BMCR); 259 if ((reg & BMCR_RESET) == 0) 260 break; 261 DELAY(1000); 262 } 263 264 if (sc->mii_inst != 0 && ((sc->mii_flags & MIIF_NOISOLATE) == 0)) 265 PHY_WRITE(sc, MII_BMCR, reg | BMCR_ISO); 266 } 267 268 void 269 mii_phy_down(struct mii_softc *sc) 270 { 271 272 } 273 274 void 275 mii_phy_update(struct mii_softc *sc, int cmd) 276 { 277 struct mii_data *mii = sc->mii_pdata; 278 279 if (sc->mii_media_active != mii->mii_media_active || 280 cmd == MII_MEDIACHG) { 281 MIIBUS_STATCHG(sc->mii_dev); 282 sc->mii_media_active = mii->mii_media_active; 283 } 284 if (sc->mii_media_status != mii->mii_media_status) { 285 MIIBUS_LINKCHG(sc->mii_dev); 286 sc->mii_media_status = mii->mii_media_status; 287 } 288 } 289 290 /* 291 * Given an ifmedia word, return the corresponding ANAR value. 292 */ 293 int 294 mii_anar(int media) 295 { 296 int rv; 297 298 switch (media & (IFM_TMASK|IFM_NMASK|IFM_FDX)) { 299 case IFM_ETHER|IFM_10_T: 300 rv = ANAR_10|ANAR_CSMA; 301 break; 302 case IFM_ETHER|IFM_10_T|IFM_FDX: 303 rv = ANAR_10_FD|ANAR_CSMA; 304 break; 305 case IFM_ETHER|IFM_100_TX: 306 rv = ANAR_TX|ANAR_CSMA; 307 break; 308 case IFM_ETHER|IFM_100_TX|IFM_FDX: 309 rv = ANAR_TX_FD|ANAR_CSMA; 310 break; 311 case IFM_ETHER|IFM_100_T4: 312 rv = ANAR_T4|ANAR_CSMA; 313 break; 314 default: 315 rv = 0; 316 break; 317 } 318 319 return (rv); 320 } 321 322 /* 323 * Given a BMCR value, return the corresponding ifmedia word. 324 */ 325 int 326 mii_media_from_bmcr(int bmcr) 327 { 328 int rv = IFM_ETHER; 329 330 if (bmcr & BMCR_S100) 331 rv |= IFM_100_TX; 332 else 333 rv |= IFM_10_T; 334 if (bmcr & BMCR_FDX) 335 rv |= IFM_FDX; 336 337 return (rv); 338 } 339 340 /* 341 * Initialize generic PHY media based on BMSR, called when a PHY is 342 * attached. We expect to be set up to print a comma-separated list 343 * of media names. Does not print a newline. 344 */ 345 void 346 mii_add_media(struct mii_softc *sc) 347 { 348 const char *sep = ""; 349 struct mii_data *mii; 350 351 mii = device_get_softc(sc->mii_dev); 352 if ((sc->mii_capabilities & BMSR_MEDIAMASK) == 0) { 353 printf("no media present"); 354 return; 355 } 356 357 #define ADD(m, c) ifmedia_add(&mii->mii_media, (m), (c), NULL) 358 #define PRINT(s) printf("%s%s", sep, s); sep = ", " 359 360 if (sc->mii_capabilities & BMSR_10THDX) { 361 ADD(IFM_MAKEWORD(IFM_ETHER, IFM_10_T, 0, sc->mii_inst), 0); 362 PRINT("10baseT"); 363 } 364 if (sc->mii_capabilities & BMSR_10TFDX) { 365 ADD(IFM_MAKEWORD(IFM_ETHER, IFM_10_T, IFM_FDX, sc->mii_inst), 366 BMCR_FDX); 367 PRINT("10baseT-FDX"); 368 } 369 if (sc->mii_capabilities & BMSR_100TXHDX) { 370 ADD(IFM_MAKEWORD(IFM_ETHER, IFM_100_TX, 0, sc->mii_inst), 371 BMCR_S100); 372 PRINT("100baseTX"); 373 } 374 if (sc->mii_capabilities & BMSR_100TXFDX) { 375 ADD(IFM_MAKEWORD(IFM_ETHER, IFM_100_TX, IFM_FDX, sc->mii_inst), 376 BMCR_S100|BMCR_FDX); 377 PRINT("100baseTX-FDX"); 378 } 379 if (sc->mii_capabilities & BMSR_100T4) { 380 /* 381 * XXX How do you enable 100baseT4? I assume we set 382 * XXX BMCR_S100 and then assume the PHYs will take 383 * XXX watever action is necessary to switch themselves 384 * XXX into T4 mode. 385 */ 386 ADD(IFM_MAKEWORD(IFM_ETHER, IFM_100_T4, 0, sc->mii_inst), 387 BMCR_S100); 388 PRINT("100baseT4"); 389 } 390 if (sc->mii_capabilities & BMSR_ANEG) { 391 ADD(IFM_MAKEWORD(IFM_ETHER, IFM_AUTO, 0, sc->mii_inst), 392 BMCR_AUTOEN); 393 PRINT("auto"); 394 } 395 #undef ADD 396 #undef PRINT 397 } 398 399 /* 400 * Initialize generic PHY media based on BMSR, called when a PHY is 401 * attached. We expect to be set up to print a comma-separated list 402 * of media names. Does not print a newline. 403 */ 404 void 405 mii_phy_add_media(struct mii_softc *sc) 406 { 407 struct mii_data *mii = sc->mii_pdata; 408 const char *sep = ""; 409 410 /* Set aneg timer for 10/100 media. Gigabit media handled below. */ 411 sc->mii_anegticks = MII_ANEGTICKS; 412 413 #define ADD(m, c) ifmedia_add(&mii->mii_media, (m), (c), NULL) 414 #define PRINT(s) printf("%s%s", sep, s); sep = ", " 415 416 if ((sc->mii_flags & MIIF_NOISOLATE) == 0) 417 ADD(IFM_MAKEWORD(IFM_ETHER, IFM_NONE, 0, sc->mii_inst), 418 MII_MEDIA_NONE); 419 420 /* 421 * There are different interpretations for the bits in 422 * HomePNA PHYs. And there is really only one media type 423 * that is supported. 424 */ 425 if (sc->mii_flags & MIIF_IS_HPNA) { 426 if (sc->mii_capabilities & BMSR_10THDX) { 427 ADD(IFM_MAKEWORD(IFM_ETHER, IFM_HPNA_1, 0, 428 sc->mii_inst), 429 MII_MEDIA_10_T); 430 PRINT("HomePNA1"); 431 } 432 return; 433 } 434 435 if (sc->mii_capabilities & BMSR_10THDX) { 436 ADD(IFM_MAKEWORD(IFM_ETHER, IFM_10_T, 0, sc->mii_inst), 437 MII_MEDIA_10_T); 438 PRINT("10baseT"); 439 } 440 if (sc->mii_capabilities & BMSR_10TFDX) { 441 ADD(IFM_MAKEWORD(IFM_ETHER, IFM_10_T, IFM_FDX, sc->mii_inst), 442 MII_MEDIA_10_T_FDX); 443 PRINT("10baseT-FDX"); 444 } 445 if (sc->mii_capabilities & BMSR_100TXHDX) { 446 ADD(IFM_MAKEWORD(IFM_ETHER, IFM_100_TX, 0, sc->mii_inst), 447 MII_MEDIA_100_TX); 448 PRINT("100baseTX"); 449 } 450 if (sc->mii_capabilities & BMSR_100TXFDX) { 451 ADD(IFM_MAKEWORD(IFM_ETHER, IFM_100_TX, IFM_FDX, sc->mii_inst), 452 MII_MEDIA_100_TX_FDX); 453 PRINT("100baseTX-FDX"); 454 } 455 if (sc->mii_capabilities & BMSR_100T4) { 456 ADD(IFM_MAKEWORD(IFM_ETHER, IFM_100_T4, 0, sc->mii_inst), 457 MII_MEDIA_100_T4); 458 PRINT("100baseT4"); 459 } 460 461 if (sc->mii_extcapabilities & EXTSR_MEDIAMASK) { 462 /* 463 * XXX Right now only handle 1000SX and 1000TX. Need 464 * XXX to handle 1000LX and 1000CX some how. 465 */ 466 if (sc->mii_extcapabilities & EXTSR_1000XHDX) { 467 sc->mii_anegticks = MII_ANEGTICKS_GIGE; 468 sc->mii_flags |= MIIF_IS_1000X; 469 ADD(IFM_MAKEWORD(IFM_ETHER, IFM_1000_SX, 0, 470 sc->mii_inst), MII_MEDIA_1000_X); 471 PRINT("1000baseSX"); 472 } 473 if (sc->mii_extcapabilities & EXTSR_1000XFDX) { 474 sc->mii_anegticks = MII_ANEGTICKS_GIGE; 475 sc->mii_flags |= MIIF_IS_1000X; 476 ADD(IFM_MAKEWORD(IFM_ETHER, IFM_1000_SX, IFM_FDX, 477 sc->mii_inst), MII_MEDIA_1000_X_FDX); 478 PRINT("1000baseSX-FDX"); 479 } 480 481 /* 482 * 1000baseT media needs to be able to manipulate 483 * master/slave mode. We set IFM_ETH_MASTER in 484 * the "don't care mask" and filter it out when 485 * the media is set. 486 * 487 * All 1000baseT PHYs have a 1000baseT control register. 488 */ 489 if (sc->mii_extcapabilities & EXTSR_1000THDX) { 490 sc->mii_anegticks = MII_ANEGTICKS_GIGE; 491 sc->mii_flags |= MIIF_HAVE_GTCR; 492 mii->mii_media.ifm_mask |= IFM_ETH_MASTER; 493 ADD(IFM_MAKEWORD(IFM_ETHER, IFM_1000_T, 0, 494 sc->mii_inst), MII_MEDIA_1000_T); 495 PRINT("1000baseT"); 496 } 497 if (sc->mii_extcapabilities & EXTSR_1000TFDX) { 498 sc->mii_anegticks = MII_ANEGTICKS_GIGE; 499 sc->mii_flags |= MIIF_HAVE_GTCR; 500 mii->mii_media.ifm_mask |= IFM_ETH_MASTER; 501 ADD(IFM_MAKEWORD(IFM_ETHER, IFM_1000_T, IFM_FDX, 502 sc->mii_inst), MII_MEDIA_1000_T_FDX); 503 PRINT("1000baseT-FDX"); 504 } 505 } 506 507 if (sc->mii_capabilities & BMSR_ANEG) { 508 ADD(IFM_MAKEWORD(IFM_ETHER, IFM_AUTO, 0, sc->mii_inst), 509 MII_NMEDIA); /* intentionally invalid index */ 510 PRINT("auto"); 511 } 512 #undef ADD 513 #undef PRINT 514 } 515 516 int 517 mii_phy_detach(device_t dev) 518 { 519 struct mii_softc *sc; 520 521 sc = device_get_softc(dev); 522 mii_phy_down(sc); 523 sc->mii_dev = NULL; 524 LIST_REMOVE(sc, mii_list); 525 526 return(0); 527 } 528 529 530 const struct mii_phydesc * 531 mii_phy_match(const struct mii_attach_args *ma, const struct mii_phydesc *mpd) 532 { 533 534 for (; mpd->mpd_name != NULL; mpd++) { 535 if (MII_OUI(ma->mii_id1, ma->mii_id2) == mpd->mpd_oui && 536 MII_MODEL(ma->mii_id2) == mpd->mpd_model) 537 return (mpd); 538 } 539 return (NULL); 540 } 541 542 int 543 mii_phy_dev_probe(device_t dev, const struct mii_phydesc *mpd, int mrv) 544 { 545 546 mpd = mii_phy_match(device_get_ivars(dev), mpd); 547 if (mpd != NULL) { 548 device_set_desc(dev, mpd->mpd_name); 549 return (mrv); 550 } 551 552 return (ENXIO); 553 } 554 /* 555 * Return the flow control status flag from MII_ANAR & MII_ANLPAR. 556 */ 557 u_int 558 mii_phy_flowstatus(struct mii_softc *sc) 559 { 560 int anar, anlpar; 561 562 if ((sc->mii_flags & MIIF_DOPAUSE) == 0) 563 return (0); 564 565 anar = PHY_READ(sc, MII_ANAR); 566 anlpar = PHY_READ(sc, MII_ANLPAR); 567 568 /* 569 * Check for 1000BASE-X. Autonegotiation is a bit 570 * different on such devices. 571 */ 572 if ((sc->mii_flags & MIIF_IS_1000X) != 0) { 573 anar <<= 3; 574 anlpar <<= 3; 575 } 576 577 if ((anar & ANAR_PAUSE_SYM) != 0 && (anlpar & ANLPAR_PAUSE_SYM) != 0) 578 return (IFM_FLOW | IFM_ETH_TXPAUSE | IFM_ETH_RXPAUSE); 579 580 if ((anar & ANAR_PAUSE_SYM) == 0) { 581 if ((anar & ANAR_PAUSE_ASYM) != 0 && 582 (anlpar & ANLPAR_PAUSE_TOWARDS) != 0) 583 return (IFM_FLOW | IFM_ETH_TXPAUSE); 584 else 585 return (0); 586 } 587 588 if ((anar & ANAR_PAUSE_ASYM) == 0) { 589 if ((anlpar & ANLPAR_PAUSE_SYM) != 0) 590 return (IFM_FLOW | IFM_ETH_TXPAUSE | IFM_ETH_RXPAUSE); 591 else 592 return (0); 593 } 594 595 switch ((anlpar & ANLPAR_PAUSE_TOWARDS)) { 596 case ANLPAR_PAUSE_NONE: 597 return (0); 598 case ANLPAR_PAUSE_ASYM: 599 return (IFM_FLOW | IFM_ETH_RXPAUSE); 600 default: 601 return (IFM_FLOW | IFM_ETH_RXPAUSE | IFM_ETH_TXPAUSE); 602 } 603 /* NOTREACHED */ 604 } 605