1 /* $NetBSD: mii_physubr.c,v 1.5 1999/08/03 19:41:49 drochner Exp $ */ 2 3 /*- 4 * Copyright (c) 1998, 1999, 2000, 2001 The NetBSD Foundation, Inc. 5 * All rights reserved. 6 * 7 * This code is derived from software contributed to The NetBSD Foundation 8 * by Jason R. Thorpe of the Numerical Aerospace Simulation Facility, 9 * NASA Ames Research Center. 10 * 11 * Redistribution and use in source and binary forms, with or without 12 * modification, are permitted provided that the following conditions 13 * are met: 14 * 1. Redistributions of source code must retain the above copyright 15 * notice, this list of conditions and the following disclaimer. 16 * 2. Redistributions in binary form must reproduce the above copyright 17 * notice, this list of conditions and the following disclaimer in the 18 * documentation and/or other materials provided with the distribution. 19 * 3. All advertising materials mentioning features or use of this software 20 * must display the following acknowledgement: 21 * This product includes software developed by the NetBSD 22 * Foundation, Inc. and its contributors. 23 * 4. Neither the name of The NetBSD Foundation nor the names of its 24 * contributors may be used to endorse or promote products derived 25 * from this software without specific prior written permission. 26 * 27 * THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS 28 * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED 29 * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR 30 * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS 31 * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR 32 * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF 33 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS 34 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN 35 * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) 36 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE 37 * POSSIBILITY OF SUCH DAMAGE. 38 */ 39 40 #include <sys/cdefs.h> 41 __FBSDID("$FreeBSD: src/sys/dev/mii/mii_physubr.c,v 1.22.2.2 2006/07/29 08:30:12 oleg Exp $"); 42 43 /* 44 * Subroutines common to all PHYs. 45 */ 46 47 #include <sys/param.h> 48 #include <sys/systm.h> 49 #include <sys/kernel.h> 50 #include <sys/socket.h> 51 #include <sys/errno.h> 52 #include <sys/module.h> 53 #include <sys/bus.h> 54 55 56 #include <net/if.h> 57 #include <net/if_media.h> 58 59 #include <dev/mii/mii.h> 60 #include <dev/mii/miivar.h> 61 62 #include "miibus_if.h" 63 64 /* 65 * Media to register setting conversion table. Order matters. 66 */ 67 const struct mii_media mii_media_table[MII_NMEDIA] = { 68 /* None */ 69 { BMCR_ISO, ANAR_CSMA, 70 0, }, 71 72 /* 10baseT */ 73 { BMCR_S10, ANAR_CSMA|ANAR_10, 74 0, }, 75 76 /* 10baseT-FDX */ 77 { BMCR_S10|BMCR_FDX, ANAR_CSMA|ANAR_10_FD, 78 0, }, 79 80 /* 100baseT4 */ 81 { BMCR_S100, ANAR_CSMA|ANAR_T4, 82 0, }, 83 84 /* 100baseTX */ 85 { BMCR_S100, ANAR_CSMA|ANAR_TX, 86 0, }, 87 88 /* 100baseTX-FDX */ 89 { BMCR_S100|BMCR_FDX, ANAR_CSMA|ANAR_TX_FD, 90 0, }, 91 92 /* 1000baseX */ 93 { BMCR_S1000, ANAR_CSMA, 94 0, }, 95 96 /* 1000baseX-FDX */ 97 { BMCR_S1000|BMCR_FDX, ANAR_CSMA, 98 0, }, 99 100 /* 1000baseT */ 101 { BMCR_S1000, ANAR_CSMA, 102 GTCR_ADV_1000THDX }, 103 104 /* 1000baseT-FDX */ 105 { BMCR_S1000, ANAR_CSMA, 106 GTCR_ADV_1000TFDX }, 107 }; 108 109 void 110 mii_phy_setmedia(struct mii_softc *sc) 111 { 112 struct mii_data *mii = sc->mii_pdata; 113 struct ifmedia_entry *ife = mii->mii_media.ifm_cur; 114 int bmcr, anar, gtcr; 115 116 if (IFM_SUBTYPE(ife->ifm_media) == IFM_AUTO) { 117 if ((PHY_READ(sc, MII_BMCR) & BMCR_AUTOEN) == 0) 118 (void) mii_phy_auto(sc); 119 return; 120 } 121 122 /* 123 * Table index is stored in the media entry. 124 */ 125 126 KASSERT(ife->ifm_data >=0 && ife->ifm_data < MII_NMEDIA, 127 ("invalid ife->ifm_data (0x%x) in mii_phy_setmedia", 128 ife->ifm_data)); 129 130 anar = mii_media_table[ife->ifm_data].mm_anar; 131 bmcr = mii_media_table[ife->ifm_data].mm_bmcr; 132 gtcr = mii_media_table[ife->ifm_data].mm_gtcr; 133 134 if (mii->mii_media.ifm_media & IFM_ETH_MASTER) { 135 switch (IFM_SUBTYPE(ife->ifm_media)) { 136 case IFM_1000_T: 137 gtcr |= GTCR_MAN_MS|GTCR_ADV_MS; 138 break; 139 140 default: 141 panic("mii_phy_setmedia: MASTER on wrong media"); 142 } 143 } 144 145 if (ife->ifm_media & IFM_LOOP) 146 bmcr |= BMCR_LOOP; 147 148 PHY_WRITE(sc, MII_ANAR, anar); 149 PHY_WRITE(sc, MII_BMCR, bmcr); 150 if (sc->mii_flags & MIIF_HAVE_GTCR) 151 PHY_WRITE(sc, MII_100T2CR, gtcr); 152 } 153 154 int 155 mii_phy_auto(struct mii_softc *sc) 156 { 157 158 /* 159 * Check for 1000BASE-X. Autonegotiation is a bit 160 * different on such devices. 161 */ 162 if (sc->mii_flags & MIIF_IS_1000X) { 163 uint16_t anar = 0; 164 165 if (sc->mii_extcapabilities & EXTSR_1000XFDX) 166 anar |= ANAR_X_FD; 167 if (sc->mii_extcapabilities & EXTSR_1000XHDX) 168 anar |= ANAR_X_HD; 169 170 if (sc->mii_flags & MIIF_DOPAUSE) { 171 /* XXX Asymmetric vs. symmetric? */ 172 anar |= ANLPAR_X_PAUSE_TOWARDS; 173 } 174 175 PHY_WRITE(sc, MII_ANAR, anar); 176 } else { 177 uint16_t anar; 178 179 anar = BMSR_MEDIA_TO_ANAR(sc->mii_capabilities) | 180 ANAR_CSMA; 181 if (sc->mii_flags & MIIF_DOPAUSE) 182 anar |= ANAR_FC; 183 PHY_WRITE(sc, MII_ANAR, anar); 184 if (sc->mii_flags & MIIF_HAVE_GTCR) { 185 uint16_t gtcr = 0; 186 187 if (sc->mii_extcapabilities & EXTSR_1000TFDX) 188 gtcr |= GTCR_ADV_1000TFDX; 189 if (sc->mii_extcapabilities & EXTSR_1000THDX) 190 gtcr |= GTCR_ADV_1000THDX; 191 192 PHY_WRITE(sc, MII_100T2CR, gtcr); 193 } 194 } 195 PHY_WRITE(sc, MII_BMCR, BMCR_AUTOEN | BMCR_STARTNEG); 196 return (EJUSTRETURN); 197 } 198 199 int 200 mii_phy_tick(struct mii_softc *sc) 201 { 202 struct ifmedia_entry *ife = sc->mii_pdata->mii_media.ifm_cur; 203 struct ifnet *ifp = sc->mii_pdata->mii_ifp; 204 int reg; 205 206 /* Just bail now if the interface is down. */ 207 if ((ifp->if_flags & IFF_UP) == 0) 208 return (EJUSTRETURN); 209 210 /* 211 * If we're not doing autonegotiation, we don't need to do 212 * any extra work here. However, we need to check the link 213 * status so we can generate an announcement if the status 214 * changes. 215 */ 216 if (IFM_SUBTYPE(ife->ifm_media) != IFM_AUTO) { 217 sc->mii_ticks = 0; /* reset autonegotiation timer. */ 218 return (0); 219 } 220 221 /* Read the status register twice; BMSR_LINK is latch-low. */ 222 reg = PHY_READ(sc, MII_BMSR) | PHY_READ(sc, MII_BMSR); 223 if (reg & BMSR_LINK) { 224 sc->mii_ticks = 0; /* reset autonegotiation timer. */ 225 /* See above. */ 226 return (0); 227 } 228 229 /* Announce link loss right after it happens */ 230 if (sc->mii_ticks++ == 0) 231 return (0); 232 233 /* XXX: use default value if phy driver did not set mii_anegticks */ 234 if (sc->mii_anegticks == 0) 235 sc->mii_anegticks = MII_ANEGTICKS_GIGE; 236 237 /* Only retry autonegotiation every mii_anegticks ticks. */ 238 if (sc->mii_ticks <= sc->mii_anegticks) 239 return (EJUSTRETURN); 240 241 sc->mii_ticks = 0; 242 mii_phy_reset(sc); 243 mii_phy_auto(sc); 244 return (0); 245 } 246 247 void 248 mii_phy_reset(struct mii_softc *sc) 249 { 250 int reg, i; 251 252 if (sc->mii_flags & MIIF_NOISOLATE) 253 reg = BMCR_RESET; 254 else 255 reg = BMCR_RESET | BMCR_ISO; 256 PHY_WRITE(sc, MII_BMCR, reg); 257 258 /* Wait 100ms for it to complete. */ 259 for (i = 0; i < 100; i++) { 260 reg = PHY_READ(sc, MII_BMCR); 261 if ((reg & BMCR_RESET) == 0) 262 break; 263 DELAY(1000); 264 } 265 266 if (sc->mii_inst != 0 && ((sc->mii_flags & MIIF_NOISOLATE) == 0)) 267 PHY_WRITE(sc, MII_BMCR, reg | BMCR_ISO); 268 } 269 270 void 271 mii_phy_down(struct mii_softc *sc) 272 { 273 274 } 275 276 void 277 mii_phy_update(struct mii_softc *sc, int cmd) 278 { 279 struct mii_data *mii = sc->mii_pdata; 280 281 if (sc->mii_media_active != mii->mii_media_active || 282 cmd == MII_MEDIACHG) { 283 MIIBUS_STATCHG(sc->mii_dev); 284 sc->mii_media_active = mii->mii_media_active; 285 } 286 if (sc->mii_media_status != mii->mii_media_status) { 287 MIIBUS_LINKCHG(sc->mii_dev); 288 sc->mii_media_status = mii->mii_media_status; 289 } 290 } 291 292 /* 293 * Given an ifmedia word, return the corresponding ANAR value. 294 */ 295 int 296 mii_anar(int media) 297 { 298 int rv; 299 300 switch (media & (IFM_TMASK|IFM_NMASK|IFM_FDX)) { 301 case IFM_ETHER|IFM_10_T: 302 rv = ANAR_10|ANAR_CSMA; 303 break; 304 case IFM_ETHER|IFM_10_T|IFM_FDX: 305 rv = ANAR_10_FD|ANAR_CSMA; 306 break; 307 case IFM_ETHER|IFM_100_TX: 308 rv = ANAR_TX|ANAR_CSMA; 309 break; 310 case IFM_ETHER|IFM_100_TX|IFM_FDX: 311 rv = ANAR_TX_FD|ANAR_CSMA; 312 break; 313 case IFM_ETHER|IFM_100_T4: 314 rv = ANAR_T4|ANAR_CSMA; 315 break; 316 default: 317 rv = 0; 318 break; 319 } 320 321 return (rv); 322 } 323 324 /* 325 * Given a BMCR value, return the corresponding ifmedia word. 326 */ 327 int 328 mii_media_from_bmcr(int bmcr) 329 { 330 int rv = IFM_ETHER; 331 332 if (bmcr & BMCR_S100) 333 rv |= IFM_100_TX; 334 else 335 rv |= IFM_10_T; 336 if (bmcr & BMCR_FDX) 337 rv |= IFM_FDX; 338 339 return (rv); 340 } 341 342 /* 343 * Initialize generic PHY media based on BMSR, called when a PHY is 344 * attached. We expect to be set up to print a comma-separated list 345 * of media names. Does not print a newline. 346 */ 347 void 348 mii_add_media(struct mii_softc *sc) 349 { 350 const char *sep = ""; 351 struct mii_data *mii; 352 353 mii = device_get_softc(sc->mii_dev); 354 if ((sc->mii_capabilities & BMSR_MEDIAMASK) == 0) { 355 printf("no media present"); 356 return; 357 } 358 359 #define ADD(m, c) ifmedia_add(&mii->mii_media, (m), (c), NULL) 360 #define PRINT(s) printf("%s%s", sep, s); sep = ", " 361 362 if (sc->mii_capabilities & BMSR_10THDX) { 363 ADD(IFM_MAKEWORD(IFM_ETHER, IFM_10_T, 0, sc->mii_inst), 0); 364 PRINT("10baseT"); 365 } 366 if (sc->mii_capabilities & BMSR_10TFDX) { 367 ADD(IFM_MAKEWORD(IFM_ETHER, IFM_10_T, IFM_FDX, sc->mii_inst), 368 BMCR_FDX); 369 PRINT("10baseT-FDX"); 370 } 371 if (sc->mii_capabilities & BMSR_100TXHDX) { 372 ADD(IFM_MAKEWORD(IFM_ETHER, IFM_100_TX, 0, sc->mii_inst), 373 BMCR_S100); 374 PRINT("100baseTX"); 375 } 376 if (sc->mii_capabilities & BMSR_100TXFDX) { 377 ADD(IFM_MAKEWORD(IFM_ETHER, IFM_100_TX, IFM_FDX, sc->mii_inst), 378 BMCR_S100|BMCR_FDX); 379 PRINT("100baseTX-FDX"); 380 } 381 if (sc->mii_capabilities & BMSR_100T4) { 382 /* 383 * XXX How do you enable 100baseT4? I assume we set 384 * XXX BMCR_S100 and then assume the PHYs will take 385 * XXX watever action is necessary to switch themselves 386 * XXX into T4 mode. 387 */ 388 ADD(IFM_MAKEWORD(IFM_ETHER, IFM_100_T4, 0, sc->mii_inst), 389 BMCR_S100); 390 PRINT("100baseT4"); 391 } 392 if (sc->mii_capabilities & BMSR_ANEG) { 393 ADD(IFM_MAKEWORD(IFM_ETHER, IFM_AUTO, 0, sc->mii_inst), 394 BMCR_AUTOEN); 395 PRINT("auto"); 396 } 397 398 399 400 #undef ADD 401 #undef PRINT 402 } 403 404 /* 405 * Initialize generic PHY media based on BMSR, called when a PHY is 406 * attached. We expect to be set up to print a comma-separated list 407 * of media names. Does not print a newline. 408 */ 409 void 410 mii_phy_add_media(struct mii_softc *sc) 411 { 412 struct mii_data *mii = sc->mii_pdata; 413 const char *sep = ""; 414 415 /* Set aneg timer for 10/100 media. Gigabit media handled below. */ 416 sc->mii_anegticks = MII_ANEGTICKS; 417 418 #define ADD(m, c) ifmedia_add(&mii->mii_media, (m), (c), NULL) 419 #define PRINT(s) printf("%s%s", sep, s); sep = ", " 420 421 if ((sc->mii_flags & MIIF_NOISOLATE) == 0) 422 ADD(IFM_MAKEWORD(IFM_ETHER, IFM_NONE, 0, sc->mii_inst), 423 MII_MEDIA_NONE); 424 425 /* 426 * There are different interpretations for the bits in 427 * HomePNA PHYs. And there is really only one media type 428 * that is supported. 429 */ 430 if (sc->mii_flags & MIIF_IS_HPNA) { 431 if (sc->mii_capabilities & BMSR_10THDX) { 432 ADD(IFM_MAKEWORD(IFM_ETHER, IFM_HPNA_1, 0, 433 sc->mii_inst), 434 MII_MEDIA_10_T); 435 PRINT("HomePNA1"); 436 } 437 return; 438 } 439 440 if (sc->mii_capabilities & BMSR_10THDX) { 441 ADD(IFM_MAKEWORD(IFM_ETHER, IFM_10_T, 0, sc->mii_inst), 442 MII_MEDIA_10_T); 443 PRINT("10baseT"); 444 } 445 if (sc->mii_capabilities & BMSR_10TFDX) { 446 ADD(IFM_MAKEWORD(IFM_ETHER, IFM_10_T, IFM_FDX, sc->mii_inst), 447 MII_MEDIA_10_T_FDX); 448 PRINT("10baseT-FDX"); 449 } 450 if (sc->mii_capabilities & BMSR_100TXHDX) { 451 ADD(IFM_MAKEWORD(IFM_ETHER, IFM_100_TX, 0, sc->mii_inst), 452 MII_MEDIA_100_TX); 453 PRINT("100baseTX"); 454 } 455 if (sc->mii_capabilities & BMSR_100TXFDX) { 456 ADD(IFM_MAKEWORD(IFM_ETHER, IFM_100_TX, IFM_FDX, sc->mii_inst), 457 MII_MEDIA_100_TX_FDX); 458 PRINT("100baseTX-FDX"); 459 } 460 if (sc->mii_capabilities & BMSR_100T4) { 461 ADD(IFM_MAKEWORD(IFM_ETHER, IFM_100_T4, 0, sc->mii_inst), 462 MII_MEDIA_100_T4); 463 PRINT("100baseT4"); 464 } 465 466 if (sc->mii_extcapabilities & EXTSR_MEDIAMASK) { 467 /* 468 * XXX Right now only handle 1000SX and 1000TX. Need 469 * XXX to handle 1000LX and 1000CX some how. 470 */ 471 if (sc->mii_extcapabilities & EXTSR_1000XHDX) { 472 sc->mii_anegticks = MII_ANEGTICKS_GIGE; 473 sc->mii_flags |= MIIF_IS_1000X; 474 ADD(IFM_MAKEWORD(IFM_ETHER, IFM_1000_SX, 0, 475 sc->mii_inst), MII_MEDIA_1000_X); 476 PRINT("1000baseSX"); 477 } 478 if (sc->mii_extcapabilities & EXTSR_1000XFDX) { 479 sc->mii_anegticks = MII_ANEGTICKS_GIGE; 480 sc->mii_flags |= MIIF_IS_1000X; 481 ADD(IFM_MAKEWORD(IFM_ETHER, IFM_1000_SX, IFM_FDX, 482 sc->mii_inst), MII_MEDIA_1000_X_FDX); 483 PRINT("1000baseSX-FDX"); 484 } 485 486 /* 487 * 1000baseT media needs to be able to manipulate 488 * master/slave mode. We set IFM_ETH_MASTER in 489 * the "don't care mask" and filter it out when 490 * the media is set. 491 * 492 * All 1000baseT PHYs have a 1000baseT control register. 493 */ 494 if (sc->mii_extcapabilities & EXTSR_1000THDX) { 495 sc->mii_anegticks = MII_ANEGTICKS_GIGE; 496 sc->mii_flags |= MIIF_HAVE_GTCR; 497 mii->mii_media.ifm_mask |= IFM_ETH_MASTER; 498 ADD(IFM_MAKEWORD(IFM_ETHER, IFM_1000_T, 0, 499 sc->mii_inst), MII_MEDIA_1000_T); 500 PRINT("1000baseT"); 501 } 502 if (sc->mii_extcapabilities & EXTSR_1000TFDX) { 503 sc->mii_anegticks = MII_ANEGTICKS_GIGE; 504 sc->mii_flags |= MIIF_HAVE_GTCR; 505 mii->mii_media.ifm_mask |= IFM_ETH_MASTER; 506 ADD(IFM_MAKEWORD(IFM_ETHER, IFM_1000_T, IFM_FDX, 507 sc->mii_inst), MII_MEDIA_1000_T_FDX); 508 PRINT("1000baseT-FDX"); 509 } 510 } 511 512 if (sc->mii_capabilities & BMSR_ANEG) { 513 ADD(IFM_MAKEWORD(IFM_ETHER, IFM_AUTO, 0, sc->mii_inst), 514 MII_NMEDIA); /* intentionally invalid index */ 515 PRINT("auto"); 516 } 517 #undef ADD 518 #undef PRINT 519 } 520 521 int 522 mii_phy_detach(device_t dev) 523 { 524 struct mii_softc *sc; 525 526 sc = device_get_softc(dev); 527 mii_phy_down(sc); 528 sc->mii_dev = NULL; 529 LIST_REMOVE(sc, mii_list); 530 531 return(0); 532 } 533 534 const struct mii_phydesc * 535 mii_phy_match(const struct mii_attach_args *ma, const struct mii_phydesc *mpd) 536 { 537 538 for (; mpd->mpd_name != NULL; mpd++) { 539 if (MII_OUI(ma->mii_id1, ma->mii_id2) == mpd->mpd_oui && 540 MII_MODEL(ma->mii_id2) == mpd->mpd_model) 541 return (mpd); 542 } 543 return (NULL); 544 } 545 546 int 547 mii_phy_dev_probe(device_t dev, const struct mii_phydesc *mpd, int mrv) 548 { 549 550 mpd = mii_phy_match(device_get_ivars(dev), mpd); 551 if (mpd != NULL) { 552 device_set_desc(dev, mpd->mpd_name); 553 return (mrv); 554 } 555 556 return (ENXIO); 557 } 558