xref: /haiku/src/libs/compat/freebsd_network/fbsd_mii_physubr.c (revision dba28784c21beab5d397068303881fe024a76859)
1*dba28784SAugustin Cavalier /*	$NetBSD: mii_physubr.c,v 1.5 1999/08/03 19:41:49 drochner Exp $	*/
2*dba28784SAugustin Cavalier 
3*dba28784SAugustin Cavalier /*-
4*dba28784SAugustin Cavalier  * Copyright (c) 1998, 1999, 2000, 2001 The NetBSD Foundation, Inc.
5*dba28784SAugustin Cavalier  * All rights reserved.
6*dba28784SAugustin Cavalier  *
7*dba28784SAugustin Cavalier  * This code is derived from software contributed to The NetBSD Foundation
8*dba28784SAugustin Cavalier  * by Jason R. Thorpe of the Numerical Aerospace Simulation Facility,
9*dba28784SAugustin Cavalier  * NASA Ames Research Center.
10*dba28784SAugustin Cavalier  *
11*dba28784SAugustin Cavalier  * Redistribution and use in source and binary forms, with or without
12*dba28784SAugustin Cavalier  * modification, are permitted provided that the following conditions
13*dba28784SAugustin Cavalier  * are met:
14*dba28784SAugustin Cavalier  * 1. Redistributions of source code must retain the above copyright
15*dba28784SAugustin Cavalier  *    notice, this list of conditions and the following disclaimer.
16*dba28784SAugustin Cavalier  * 2. Redistributions in binary form must reproduce the above copyright
17*dba28784SAugustin Cavalier  *    notice, this list of conditions and the following disclaimer in the
18*dba28784SAugustin Cavalier  *    documentation and/or other materials provided with the distribution.
19*dba28784SAugustin Cavalier  *
20*dba28784SAugustin Cavalier  * THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS
21*dba28784SAugustin Cavalier  * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED
22*dba28784SAugustin Cavalier  * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
23*dba28784SAugustin Cavalier  * PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS
24*dba28784SAugustin Cavalier  * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
25*dba28784SAugustin Cavalier  * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
26*dba28784SAugustin Cavalier  * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
27*dba28784SAugustin Cavalier  * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
28*dba28784SAugustin Cavalier  * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
29*dba28784SAugustin Cavalier  * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
30*dba28784SAugustin Cavalier  * POSSIBILITY OF SUCH DAMAGE.
31*dba28784SAugustin Cavalier  */
32*dba28784SAugustin Cavalier 
33*dba28784SAugustin Cavalier #include <sys/cdefs.h>
34*dba28784SAugustin Cavalier __FBSDID("$FreeBSD$");
35*dba28784SAugustin Cavalier 
36*dba28784SAugustin Cavalier /*
37*dba28784SAugustin Cavalier  * Subroutines common to all PHYs.
38*dba28784SAugustin Cavalier  */
39*dba28784SAugustin Cavalier 
40*dba28784SAugustin Cavalier #include <sys/param.h>
41*dba28784SAugustin Cavalier #include <sys/systm.h>
42*dba28784SAugustin Cavalier #include <sys/kernel.h>
43*dba28784SAugustin Cavalier #include <sys/socket.h>
44*dba28784SAugustin Cavalier #include <sys/errno.h>
45*dba28784SAugustin Cavalier #include <sys/module.h>
46*dba28784SAugustin Cavalier #include <sys/bus.h>
47*dba28784SAugustin Cavalier 
48*dba28784SAugustin Cavalier #include <net/if.h>
49*dba28784SAugustin Cavalier #include <net/if_media.h>
50*dba28784SAugustin Cavalier 
51*dba28784SAugustin Cavalier #include <dev/mii/mii.h>
52*dba28784SAugustin Cavalier #include <dev/mii/miivar.h>
53*dba28784SAugustin Cavalier 
54*dba28784SAugustin Cavalier #include "miibus_if.h"
55*dba28784SAugustin Cavalier 
56*dba28784SAugustin Cavalier /*
57*dba28784SAugustin Cavalier  *
58*dba28784SAugustin Cavalier  * An array of structures to map MII media types to BMCR/ANAR settings.
59*dba28784SAugustin Cavalier  */
60*dba28784SAugustin Cavalier enum {
61*dba28784SAugustin Cavalier 	MII_MEDIA_NONE = 0,
62*dba28784SAugustin Cavalier 	MII_MEDIA_10_T,
63*dba28784SAugustin Cavalier 	MII_MEDIA_10_T_FDX,
64*dba28784SAugustin Cavalier 	MII_MEDIA_100_T4,
65*dba28784SAugustin Cavalier 	MII_MEDIA_100_TX,
66*dba28784SAugustin Cavalier 	MII_MEDIA_100_TX_FDX,
67*dba28784SAugustin Cavalier 	MII_MEDIA_1000_X,
68*dba28784SAugustin Cavalier 	MII_MEDIA_1000_X_FDX,
69*dba28784SAugustin Cavalier 	MII_MEDIA_1000_T,
70*dba28784SAugustin Cavalier 	MII_MEDIA_1000_T_FDX,
71*dba28784SAugustin Cavalier 	MII_NMEDIA,
72*dba28784SAugustin Cavalier };
73*dba28784SAugustin Cavalier 
74*dba28784SAugustin Cavalier static const struct mii_media {
75*dba28784SAugustin Cavalier 	u_int	mm_bmcr;		/* BMCR settings for this media */
76*dba28784SAugustin Cavalier 	u_int	mm_anar;		/* ANAR settings for this media */
77*dba28784SAugustin Cavalier 	u_int	mm_gtcr;		/* 100base-T2 or 1000base-T CR */
78*dba28784SAugustin Cavalier } mii_media_table[MII_NMEDIA] = {
79*dba28784SAugustin Cavalier 	/* None */
80*dba28784SAugustin Cavalier 	{ BMCR_ISO,		ANAR_CSMA,
81*dba28784SAugustin Cavalier 	  0, },
82*dba28784SAugustin Cavalier 
83*dba28784SAugustin Cavalier 	/* 10baseT */
84*dba28784SAugustin Cavalier 	{ BMCR_S10,		ANAR_CSMA|ANAR_10,
85*dba28784SAugustin Cavalier 	  0, },
86*dba28784SAugustin Cavalier 
87*dba28784SAugustin Cavalier 	/* 10baseT-FDX */
88*dba28784SAugustin Cavalier 	{ BMCR_S10|BMCR_FDX,	ANAR_CSMA|ANAR_10_FD,
89*dba28784SAugustin Cavalier 	  0, },
90*dba28784SAugustin Cavalier 
91*dba28784SAugustin Cavalier 	/* 100baseT4 */
92*dba28784SAugustin Cavalier 	{ BMCR_S100,		ANAR_CSMA|ANAR_T4,
93*dba28784SAugustin Cavalier 	  0, },
94*dba28784SAugustin Cavalier 
95*dba28784SAugustin Cavalier 	/* 100baseTX */
96*dba28784SAugustin Cavalier 	{ BMCR_S100,		ANAR_CSMA|ANAR_TX,
97*dba28784SAugustin Cavalier 	  0, },
98*dba28784SAugustin Cavalier 
99*dba28784SAugustin Cavalier 	/* 100baseTX-FDX */
100*dba28784SAugustin Cavalier 	{ BMCR_S100|BMCR_FDX,	ANAR_CSMA|ANAR_TX_FD,
101*dba28784SAugustin Cavalier 	  0, },
102*dba28784SAugustin Cavalier 
103*dba28784SAugustin Cavalier 	/* 1000baseX */
104*dba28784SAugustin Cavalier 	{ BMCR_S1000,		ANAR_CSMA,
105*dba28784SAugustin Cavalier 	  0, },
106*dba28784SAugustin Cavalier 
107*dba28784SAugustin Cavalier 	/* 1000baseX-FDX */
108*dba28784SAugustin Cavalier 	{ BMCR_S1000|BMCR_FDX,	ANAR_CSMA,
109*dba28784SAugustin Cavalier 	  0, },
110*dba28784SAugustin Cavalier 
111*dba28784SAugustin Cavalier 	/* 1000baseT */
112*dba28784SAugustin Cavalier 	{ BMCR_S1000,		ANAR_CSMA,
113*dba28784SAugustin Cavalier 	  GTCR_ADV_1000THDX },
114*dba28784SAugustin Cavalier 
115*dba28784SAugustin Cavalier 	/* 1000baseT-FDX */
116*dba28784SAugustin Cavalier 	{ BMCR_S1000,		ANAR_CSMA,
117*dba28784SAugustin Cavalier 	  GTCR_ADV_1000TFDX },
118*dba28784SAugustin Cavalier };
119*dba28784SAugustin Cavalier 
120*dba28784SAugustin Cavalier void
mii_phy_setmedia(struct mii_softc * sc)121*dba28784SAugustin Cavalier mii_phy_setmedia(struct mii_softc *sc)
122*dba28784SAugustin Cavalier {
123*dba28784SAugustin Cavalier 	struct mii_data *mii = sc->mii_pdata;
124*dba28784SAugustin Cavalier 	struct ifmedia_entry *ife = mii->mii_media.ifm_cur;
125*dba28784SAugustin Cavalier 	int bmcr, anar, gtcr;
126*dba28784SAugustin Cavalier 	int index = -1;
127*dba28784SAugustin Cavalier 
128*dba28784SAugustin Cavalier 	switch (IFM_SUBTYPE(ife->ifm_media)) {
129*dba28784SAugustin Cavalier 	case IFM_AUTO:
130*dba28784SAugustin Cavalier 		/*
131*dba28784SAugustin Cavalier 		 * Force renegotiation if MIIF_DOPAUSE or MIIF_FORCEANEG.
132*dba28784SAugustin Cavalier 		 * The former is necessary as we might switch from flow-
133*dba28784SAugustin Cavalier 		 * control advertisement being off to on or vice versa.
134*dba28784SAugustin Cavalier 		 */
135*dba28784SAugustin Cavalier 		if ((PHY_READ(sc, MII_BMCR) & BMCR_AUTOEN) == 0 ||
136*dba28784SAugustin Cavalier 		    (sc->mii_flags & (MIIF_DOPAUSE | MIIF_FORCEANEG)) != 0)
137*dba28784SAugustin Cavalier 			(void)mii_phy_auto(sc);
138*dba28784SAugustin Cavalier 		return;
139*dba28784SAugustin Cavalier 
140*dba28784SAugustin Cavalier 	case IFM_NONE:
141*dba28784SAugustin Cavalier 		index = MII_MEDIA_NONE;
142*dba28784SAugustin Cavalier 		break;
143*dba28784SAugustin Cavalier 
144*dba28784SAugustin Cavalier 	case IFM_HPNA_1:
145*dba28784SAugustin Cavalier 		index = MII_MEDIA_10_T;
146*dba28784SAugustin Cavalier 		break;
147*dba28784SAugustin Cavalier 
148*dba28784SAugustin Cavalier 	case IFM_10_T:
149*dba28784SAugustin Cavalier 		switch (IFM_OPTIONS(ife->ifm_media)) {
150*dba28784SAugustin Cavalier 		case 0:
151*dba28784SAugustin Cavalier 			index = MII_MEDIA_10_T;
152*dba28784SAugustin Cavalier 			break;
153*dba28784SAugustin Cavalier 		case IFM_FDX:
154*dba28784SAugustin Cavalier 		case (IFM_FDX | IFM_FLOW):
155*dba28784SAugustin Cavalier 			index = MII_MEDIA_10_T_FDX;
156*dba28784SAugustin Cavalier 			break;
157*dba28784SAugustin Cavalier 		}
158*dba28784SAugustin Cavalier 		break;
159*dba28784SAugustin Cavalier 
160*dba28784SAugustin Cavalier 	case IFM_100_TX:
161*dba28784SAugustin Cavalier 	case IFM_100_FX:
162*dba28784SAugustin Cavalier 		switch (IFM_OPTIONS(ife->ifm_media)) {
163*dba28784SAugustin Cavalier 		case 0:
164*dba28784SAugustin Cavalier 			index = MII_MEDIA_100_TX;
165*dba28784SAugustin Cavalier 			break;
166*dba28784SAugustin Cavalier 		case IFM_FDX:
167*dba28784SAugustin Cavalier 		case (IFM_FDX | IFM_FLOW):
168*dba28784SAugustin Cavalier 			index = MII_MEDIA_100_TX_FDX;
169*dba28784SAugustin Cavalier 			break;
170*dba28784SAugustin Cavalier 		}
171*dba28784SAugustin Cavalier 		break;
172*dba28784SAugustin Cavalier 
173*dba28784SAugustin Cavalier 	case IFM_100_T4:
174*dba28784SAugustin Cavalier 		index = MII_MEDIA_100_T4;
175*dba28784SAugustin Cavalier 		break;
176*dba28784SAugustin Cavalier 
177*dba28784SAugustin Cavalier 	case IFM_1000_SX:
178*dba28784SAugustin Cavalier 		switch (IFM_OPTIONS(ife->ifm_media)) {
179*dba28784SAugustin Cavalier 		case 0:
180*dba28784SAugustin Cavalier 			index = MII_MEDIA_1000_X;
181*dba28784SAugustin Cavalier 			break;
182*dba28784SAugustin Cavalier 		case IFM_FDX:
183*dba28784SAugustin Cavalier 		case (IFM_FDX | IFM_FLOW):
184*dba28784SAugustin Cavalier 			index = MII_MEDIA_1000_X_FDX;
185*dba28784SAugustin Cavalier 			break;
186*dba28784SAugustin Cavalier 		}
187*dba28784SAugustin Cavalier 		break;
188*dba28784SAugustin Cavalier 
189*dba28784SAugustin Cavalier 	case IFM_1000_T:
190*dba28784SAugustin Cavalier 		switch (IFM_OPTIONS(ife->ifm_media)) {
191*dba28784SAugustin Cavalier 		case 0:
192*dba28784SAugustin Cavalier 		case IFM_ETH_MASTER:
193*dba28784SAugustin Cavalier 			index = MII_MEDIA_1000_T;
194*dba28784SAugustin Cavalier 			break;
195*dba28784SAugustin Cavalier 		case IFM_FDX:
196*dba28784SAugustin Cavalier 		case (IFM_FDX | IFM_ETH_MASTER):
197*dba28784SAugustin Cavalier 		case (IFM_FDX | IFM_FLOW):
198*dba28784SAugustin Cavalier 		case (IFM_FDX | IFM_FLOW | IFM_ETH_MASTER):
199*dba28784SAugustin Cavalier 			index = MII_MEDIA_1000_T_FDX;
200*dba28784SAugustin Cavalier 			break;
201*dba28784SAugustin Cavalier 		}
202*dba28784SAugustin Cavalier 		break;
203*dba28784SAugustin Cavalier 	}
204*dba28784SAugustin Cavalier 
205*dba28784SAugustin Cavalier 	KASSERT(index != -1, ("%s: failed to map media word %d",
206*dba28784SAugustin Cavalier 	    __func__, ife->ifm_media));
207*dba28784SAugustin Cavalier 
208*dba28784SAugustin Cavalier 	anar = mii_media_table[index].mm_anar;
209*dba28784SAugustin Cavalier 	bmcr = mii_media_table[index].mm_bmcr;
210*dba28784SAugustin Cavalier 	gtcr = mii_media_table[index].mm_gtcr;
211*dba28784SAugustin Cavalier 
212*dba28784SAugustin Cavalier 	if (IFM_SUBTYPE(ife->ifm_media) == IFM_1000_T) {
213*dba28784SAugustin Cavalier 		gtcr |= GTCR_MAN_MS;
214*dba28784SAugustin Cavalier 		if ((ife->ifm_media & IFM_ETH_MASTER) != 0)
215*dba28784SAugustin Cavalier 			gtcr |= GTCR_ADV_MS;
216*dba28784SAugustin Cavalier 	}
217*dba28784SAugustin Cavalier 
218*dba28784SAugustin Cavalier 	if ((ife->ifm_media & IFM_FDX) != 0 &&
219*dba28784SAugustin Cavalier 	    ((ife->ifm_media & IFM_FLOW) != 0 ||
220*dba28784SAugustin Cavalier 	    (sc->mii_flags & MIIF_FORCEPAUSE) != 0)) {
221*dba28784SAugustin Cavalier 		if ((sc->mii_flags & MIIF_IS_1000X) != 0)
222*dba28784SAugustin Cavalier 			anar |= ANAR_X_PAUSE_TOWARDS;
223*dba28784SAugustin Cavalier 		else {
224*dba28784SAugustin Cavalier 			anar |= ANAR_FC;
225*dba28784SAugustin Cavalier 			/* XXX Only 1000BASE-T has PAUSE_ASYM? */
226*dba28784SAugustin Cavalier 			if ((sc->mii_flags & MIIF_HAVE_GTCR) != 0 &&
227*dba28784SAugustin Cavalier 			    (sc->mii_extcapabilities &
228*dba28784SAugustin Cavalier 			    (EXTSR_1000THDX | EXTSR_1000TFDX)) != 0)
229*dba28784SAugustin Cavalier 				anar |= ANAR_X_PAUSE_ASYM;
230*dba28784SAugustin Cavalier 		}
231*dba28784SAugustin Cavalier 	}
232*dba28784SAugustin Cavalier 
233*dba28784SAugustin Cavalier 	PHY_WRITE(sc, MII_ANAR, anar);
234*dba28784SAugustin Cavalier 	PHY_WRITE(sc, MII_BMCR, bmcr);
235*dba28784SAugustin Cavalier 	if ((sc->mii_flags & MIIF_HAVE_GTCR) != 0)
236*dba28784SAugustin Cavalier 		PHY_WRITE(sc, MII_100T2CR, gtcr);
237*dba28784SAugustin Cavalier }
238*dba28784SAugustin Cavalier 
239*dba28784SAugustin Cavalier int
mii_phy_auto(struct mii_softc * sc)240*dba28784SAugustin Cavalier mii_phy_auto(struct mii_softc *sc)
241*dba28784SAugustin Cavalier {
242*dba28784SAugustin Cavalier 	struct ifmedia_entry *ife = sc->mii_pdata->mii_media.ifm_cur;
243*dba28784SAugustin Cavalier 	int anar, gtcr;
244*dba28784SAugustin Cavalier 
245*dba28784SAugustin Cavalier 	/*
246*dba28784SAugustin Cavalier 	 * Check for 1000BASE-X.  Autonegotiation is a bit
247*dba28784SAugustin Cavalier 	 * different on such devices.
248*dba28784SAugustin Cavalier 	 */
249*dba28784SAugustin Cavalier 	if ((sc->mii_flags & MIIF_IS_1000X) != 0) {
250*dba28784SAugustin Cavalier 		anar = 0;
251*dba28784SAugustin Cavalier 		if ((sc->mii_extcapabilities & EXTSR_1000XFDX) != 0)
252*dba28784SAugustin Cavalier 			anar |= ANAR_X_FD;
253*dba28784SAugustin Cavalier 		if ((sc->mii_extcapabilities & EXTSR_1000XHDX) != 0)
254*dba28784SAugustin Cavalier 			anar |= ANAR_X_HD;
255*dba28784SAugustin Cavalier 
256*dba28784SAugustin Cavalier 		if ((ife->ifm_media & IFM_FLOW) != 0 ||
257*dba28784SAugustin Cavalier 		    (sc->mii_flags & MIIF_FORCEPAUSE) != 0)
258*dba28784SAugustin Cavalier 			anar |= ANAR_X_PAUSE_TOWARDS;
259*dba28784SAugustin Cavalier 		PHY_WRITE(sc, MII_ANAR, anar);
260*dba28784SAugustin Cavalier 	} else {
261*dba28784SAugustin Cavalier 		anar = BMSR_MEDIA_TO_ANAR(sc->mii_capabilities) |
262*dba28784SAugustin Cavalier 		    ANAR_CSMA;
263*dba28784SAugustin Cavalier 		if ((ife->ifm_media & IFM_FLOW) != 0 ||
264*dba28784SAugustin Cavalier 		    (sc->mii_flags & MIIF_FORCEPAUSE) != 0) {
265*dba28784SAugustin Cavalier 			if ((sc->mii_capabilities &
266*dba28784SAugustin Cavalier 			    (BMSR_10TFDX | BMSR_100TXFDX)) != 0)
267*dba28784SAugustin Cavalier 				anar |= ANAR_FC;
268*dba28784SAugustin Cavalier 			/* XXX Only 1000BASE-T has PAUSE_ASYM? */
269*dba28784SAugustin Cavalier 			if (((sc->mii_flags & MIIF_HAVE_GTCR) != 0) &&
270*dba28784SAugustin Cavalier 			    (sc->mii_extcapabilities &
271*dba28784SAugustin Cavalier 			    (EXTSR_1000THDX | EXTSR_1000TFDX)) != 0)
272*dba28784SAugustin Cavalier 				anar |= ANAR_X_PAUSE_ASYM;
273*dba28784SAugustin Cavalier 		}
274*dba28784SAugustin Cavalier 		PHY_WRITE(sc, MII_ANAR, anar);
275*dba28784SAugustin Cavalier 		if ((sc->mii_flags & MIIF_HAVE_GTCR) != 0) {
276*dba28784SAugustin Cavalier 			gtcr = 0;
277*dba28784SAugustin Cavalier 			if ((sc->mii_extcapabilities & EXTSR_1000TFDX) != 0)
278*dba28784SAugustin Cavalier 				gtcr |= GTCR_ADV_1000TFDX;
279*dba28784SAugustin Cavalier 			if ((sc->mii_extcapabilities & EXTSR_1000THDX) != 0)
280*dba28784SAugustin Cavalier 				gtcr |= GTCR_ADV_1000THDX;
281*dba28784SAugustin Cavalier 			PHY_WRITE(sc, MII_100T2CR, gtcr);
282*dba28784SAugustin Cavalier 		}
283*dba28784SAugustin Cavalier 	}
284*dba28784SAugustin Cavalier 	PHY_WRITE(sc, MII_BMCR, BMCR_AUTOEN | BMCR_STARTNEG);
285*dba28784SAugustin Cavalier 	return (EJUSTRETURN);
286*dba28784SAugustin Cavalier }
287*dba28784SAugustin Cavalier 
288*dba28784SAugustin Cavalier int
mii_phy_tick(struct mii_softc * sc)289*dba28784SAugustin Cavalier mii_phy_tick(struct mii_softc *sc)
290*dba28784SAugustin Cavalier {
291*dba28784SAugustin Cavalier 	struct ifmedia_entry *ife = sc->mii_pdata->mii_media.ifm_cur;
292*dba28784SAugustin Cavalier 	int reg;
293*dba28784SAugustin Cavalier 
294*dba28784SAugustin Cavalier 	/*
295*dba28784SAugustin Cavalier 	 * If we're not doing autonegotiation, we don't need to do
296*dba28784SAugustin Cavalier 	 * any extra work here.  However, we need to check the link
297*dba28784SAugustin Cavalier 	 * status so we can generate an announcement if the status
298*dba28784SAugustin Cavalier 	 * changes.
299*dba28784SAugustin Cavalier 	 */
300*dba28784SAugustin Cavalier 	if (IFM_SUBTYPE(ife->ifm_media) != IFM_AUTO) {
301*dba28784SAugustin Cavalier 		sc->mii_ticks = 0;	/* reset autonegotiation timer. */
302*dba28784SAugustin Cavalier 		return (0);
303*dba28784SAugustin Cavalier 	}
304*dba28784SAugustin Cavalier 
305*dba28784SAugustin Cavalier 	/* Read the status register twice; BMSR_LINK is latch-low. */
306*dba28784SAugustin Cavalier 	reg = PHY_READ(sc, MII_BMSR) | PHY_READ(sc, MII_BMSR);
307*dba28784SAugustin Cavalier 	if ((reg & BMSR_LINK) != 0) {
308*dba28784SAugustin Cavalier 		sc->mii_ticks = 0;	/* reset autonegotiation timer. */
309*dba28784SAugustin Cavalier 		/* See above. */
310*dba28784SAugustin Cavalier 		return (0);
311*dba28784SAugustin Cavalier 	}
312*dba28784SAugustin Cavalier 
313*dba28784SAugustin Cavalier 	/* Announce link loss right after it happens */
314*dba28784SAugustin Cavalier 	if (sc->mii_ticks++ == 0)
315*dba28784SAugustin Cavalier 		return (0);
316*dba28784SAugustin Cavalier 
317*dba28784SAugustin Cavalier 	/* XXX: use default value if phy driver did not set mii_anegticks */
318*dba28784SAugustin Cavalier 	if (sc->mii_anegticks == 0)
319*dba28784SAugustin Cavalier 		sc->mii_anegticks = MII_ANEGTICKS_GIGE;
320*dba28784SAugustin Cavalier 
321*dba28784SAugustin Cavalier 	/* Only retry autonegotiation every mii_anegticks ticks. */
322*dba28784SAugustin Cavalier 	if (sc->mii_ticks <= sc->mii_anegticks)
323*dba28784SAugustin Cavalier 		return (EJUSTRETURN);
324*dba28784SAugustin Cavalier 
325*dba28784SAugustin Cavalier 	sc->mii_ticks = 0;
326*dba28784SAugustin Cavalier 	PHY_RESET(sc);
327*dba28784SAugustin Cavalier 	mii_phy_auto(sc);
328*dba28784SAugustin Cavalier 	return (0);
329*dba28784SAugustin Cavalier }
330*dba28784SAugustin Cavalier 
331*dba28784SAugustin Cavalier void
mii_phy_reset(struct mii_softc * sc)332*dba28784SAugustin Cavalier mii_phy_reset(struct mii_softc *sc)
333*dba28784SAugustin Cavalier {
334*dba28784SAugustin Cavalier 	struct ifmedia_entry *ife = sc->mii_pdata->mii_media.ifm_cur;
335*dba28784SAugustin Cavalier 	int i, reg;
336*dba28784SAugustin Cavalier 
337*dba28784SAugustin Cavalier 	if ((sc->mii_flags & MIIF_NOISOLATE) != 0)
338*dba28784SAugustin Cavalier 		reg = BMCR_RESET;
339*dba28784SAugustin Cavalier 	else
340*dba28784SAugustin Cavalier 		reg = BMCR_RESET | BMCR_ISO;
341*dba28784SAugustin Cavalier 	PHY_WRITE(sc, MII_BMCR, reg);
342*dba28784SAugustin Cavalier 
343*dba28784SAugustin Cavalier 	/* Wait 100ms for it to complete. */
344*dba28784SAugustin Cavalier 	for (i = 0; i < 100; i++) {
345*dba28784SAugustin Cavalier 		reg = PHY_READ(sc, MII_BMCR);
346*dba28784SAugustin Cavalier 		if ((reg & BMCR_RESET) == 0)
347*dba28784SAugustin Cavalier 			break;
348*dba28784SAugustin Cavalier 		DELAY(1000);
349*dba28784SAugustin Cavalier 	}
350*dba28784SAugustin Cavalier 
351*dba28784SAugustin Cavalier 	/* NB: a PHY may default to being powered down and/or isolated. */
352*dba28784SAugustin Cavalier 	reg &= ~(BMCR_PDOWN | BMCR_ISO);
353*dba28784SAugustin Cavalier 	if ((sc->mii_flags & MIIF_NOISOLATE) == 0 &&
354*dba28784SAugustin Cavalier 	    ((ife == NULL && sc->mii_inst != 0) ||
355*dba28784SAugustin Cavalier 	    (ife != NULL && IFM_INST(ife->ifm_media) != sc->mii_inst)))
356*dba28784SAugustin Cavalier 		reg |= BMCR_ISO;
357*dba28784SAugustin Cavalier 	if (PHY_READ(sc, MII_BMCR) != reg)
358*dba28784SAugustin Cavalier 		PHY_WRITE(sc, MII_BMCR, reg);
359*dba28784SAugustin Cavalier }
360*dba28784SAugustin Cavalier 
361*dba28784SAugustin Cavalier void
mii_phy_update(struct mii_softc * sc,int cmd)362*dba28784SAugustin Cavalier mii_phy_update(struct mii_softc *sc, int cmd)
363*dba28784SAugustin Cavalier {
364*dba28784SAugustin Cavalier 	struct mii_data *mii = sc->mii_pdata;
365*dba28784SAugustin Cavalier 
366*dba28784SAugustin Cavalier 	if (sc->mii_media_active != mii->mii_media_active ||
367*dba28784SAugustin Cavalier 	    cmd == MII_MEDIACHG) {
368*dba28784SAugustin Cavalier 		MIIBUS_STATCHG(sc->mii_dev);
369*dba28784SAugustin Cavalier 		sc->mii_media_active = mii->mii_media_active;
370*dba28784SAugustin Cavalier 	}
371*dba28784SAugustin Cavalier 	if (sc->mii_media_status != mii->mii_media_status) {
372*dba28784SAugustin Cavalier 		MIIBUS_LINKCHG(sc->mii_dev);
373*dba28784SAugustin Cavalier 		sc->mii_media_status = mii->mii_media_status;
374*dba28784SAugustin Cavalier 	}
375*dba28784SAugustin Cavalier }
376*dba28784SAugustin Cavalier 
377*dba28784SAugustin Cavalier /*
378*dba28784SAugustin Cavalier  * Initialize generic PHY media based on BMSR, called when a PHY is
379*dba28784SAugustin Cavalier  * attached.  We expect to be set up to print a comma-separated list
380*dba28784SAugustin Cavalier  * of media names.  Does not print a newline.
381*dba28784SAugustin Cavalier  */
382*dba28784SAugustin Cavalier void
mii_phy_add_media(struct mii_softc * sc)383*dba28784SAugustin Cavalier mii_phy_add_media(struct mii_softc *sc)
384*dba28784SAugustin Cavalier {
385*dba28784SAugustin Cavalier 	struct mii_data *mii = sc->mii_pdata;
386*dba28784SAugustin Cavalier 	const char *sep = "";
387*dba28784SAugustin Cavalier 	int fdx = 0;
388*dba28784SAugustin Cavalier 
389*dba28784SAugustin Cavalier 	if ((sc->mii_capabilities & BMSR_MEDIAMASK) == 0 &&
390*dba28784SAugustin Cavalier 	    (sc->mii_extcapabilities & EXTSR_MEDIAMASK) == 0) {
391*dba28784SAugustin Cavalier 		printf("no media present");
392*dba28784SAugustin Cavalier 		return;
393*dba28784SAugustin Cavalier 	}
394*dba28784SAugustin Cavalier 
395*dba28784SAugustin Cavalier 	/*
396*dba28784SAugustin Cavalier 	 * Set the autonegotiation timer for 10/100 media.  Gigabit media is
397*dba28784SAugustin Cavalier 	 * handled below.
398*dba28784SAugustin Cavalier 	 */
399*dba28784SAugustin Cavalier 	sc->mii_anegticks = MII_ANEGTICKS;
400*dba28784SAugustin Cavalier 
401*dba28784SAugustin Cavalier #define	ADD(m)		ifmedia_add(&mii->mii_media, (m), 0, NULL)
402*dba28784SAugustin Cavalier #define	PRINT(s)	printf("%s%s", sep, s); sep = ", "
403*dba28784SAugustin Cavalier 
404*dba28784SAugustin Cavalier 	if ((sc->mii_flags & MIIF_NOISOLATE) == 0) {
405*dba28784SAugustin Cavalier 		ADD(IFM_MAKEWORD(IFM_ETHER, IFM_NONE, 0, sc->mii_inst));
406*dba28784SAugustin Cavalier 		PRINT("none");
407*dba28784SAugustin Cavalier 	}
408*dba28784SAugustin Cavalier 
409*dba28784SAugustin Cavalier 	/*
410*dba28784SAugustin Cavalier 	 * There are different interpretations for the bits in
411*dba28784SAugustin Cavalier 	 * HomePNA PHYs.  And there is really only one media type
412*dba28784SAugustin Cavalier 	 * that is supported.
413*dba28784SAugustin Cavalier 	 */
414*dba28784SAugustin Cavalier 	if ((sc->mii_flags & MIIF_IS_HPNA) != 0) {
415*dba28784SAugustin Cavalier 		if ((sc->mii_capabilities & BMSR_10THDX) != 0) {
416*dba28784SAugustin Cavalier 			ADD(IFM_MAKEWORD(IFM_ETHER, IFM_HPNA_1, 0,
417*dba28784SAugustin Cavalier 			    sc->mii_inst));
418*dba28784SAugustin Cavalier 			PRINT("HomePNA1");
419*dba28784SAugustin Cavalier 		}
420*dba28784SAugustin Cavalier 		return;
421*dba28784SAugustin Cavalier 	}
422*dba28784SAugustin Cavalier 
423*dba28784SAugustin Cavalier 	if ((sc->mii_capabilities & BMSR_10THDX) != 0) {
424*dba28784SAugustin Cavalier 		ADD(IFM_MAKEWORD(IFM_ETHER, IFM_10_T, 0, sc->mii_inst));
425*dba28784SAugustin Cavalier 		PRINT("10baseT");
426*dba28784SAugustin Cavalier 	}
427*dba28784SAugustin Cavalier 	if ((sc->mii_capabilities & BMSR_10TFDX) != 0) {
428*dba28784SAugustin Cavalier 		ADD(IFM_MAKEWORD(IFM_ETHER, IFM_10_T, IFM_FDX, sc->mii_inst));
429*dba28784SAugustin Cavalier 		PRINT("10baseT-FDX");
430*dba28784SAugustin Cavalier 		if ((sc->mii_flags & MIIF_DOPAUSE) != 0 &&
431*dba28784SAugustin Cavalier 		    (sc->mii_flags & MIIF_NOMANPAUSE) == 0) {
432*dba28784SAugustin Cavalier 			ADD(IFM_MAKEWORD(IFM_ETHER, IFM_10_T,
433*dba28784SAugustin Cavalier 			    IFM_FDX | IFM_FLOW, sc->mii_inst));
434*dba28784SAugustin Cavalier 			PRINT("10baseT-FDX-flow");
435*dba28784SAugustin Cavalier 		}
436*dba28784SAugustin Cavalier 		fdx = 1;
437*dba28784SAugustin Cavalier 	}
438*dba28784SAugustin Cavalier 	if ((sc->mii_capabilities & BMSR_100TXHDX) != 0) {
439*dba28784SAugustin Cavalier 		ADD(IFM_MAKEWORD(IFM_ETHER, IFM_100_TX, 0, sc->mii_inst));
440*dba28784SAugustin Cavalier 		PRINT("100baseTX");
441*dba28784SAugustin Cavalier 	}
442*dba28784SAugustin Cavalier 	if ((sc->mii_capabilities & BMSR_100TXFDX) != 0) {
443*dba28784SAugustin Cavalier 		ADD(IFM_MAKEWORD(IFM_ETHER, IFM_100_TX, IFM_FDX, sc->mii_inst));
444*dba28784SAugustin Cavalier 		PRINT("100baseTX-FDX");
445*dba28784SAugustin Cavalier 		if ((sc->mii_flags & MIIF_DOPAUSE) != 0 &&
446*dba28784SAugustin Cavalier 		    (sc->mii_flags & MIIF_NOMANPAUSE) == 0) {
447*dba28784SAugustin Cavalier 			ADD(IFM_MAKEWORD(IFM_ETHER, IFM_100_TX,
448*dba28784SAugustin Cavalier 			    IFM_FDX | IFM_FLOW, sc->mii_inst));
449*dba28784SAugustin Cavalier 			PRINT("100baseTX-FDX-flow");
450*dba28784SAugustin Cavalier 		}
451*dba28784SAugustin Cavalier 		fdx = 1;
452*dba28784SAugustin Cavalier 	}
453*dba28784SAugustin Cavalier 	if ((sc->mii_capabilities & BMSR_100T4) != 0) {
454*dba28784SAugustin Cavalier 		ADD(IFM_MAKEWORD(IFM_ETHER, IFM_100_T4, 0, sc->mii_inst));
455*dba28784SAugustin Cavalier 		PRINT("100baseT4");
456*dba28784SAugustin Cavalier 	}
457*dba28784SAugustin Cavalier 
458*dba28784SAugustin Cavalier 	if ((sc->mii_extcapabilities & EXTSR_MEDIAMASK) != 0) {
459*dba28784SAugustin Cavalier 		/*
460*dba28784SAugustin Cavalier 		 * XXX Right now only handle 1000SX and 1000TX.  Need
461*dba28784SAugustin Cavalier 		 * XXX to handle 1000LX and 1000CX somehow.
462*dba28784SAugustin Cavalier 		 */
463*dba28784SAugustin Cavalier 		if ((sc->mii_extcapabilities & EXTSR_1000XHDX) != 0) {
464*dba28784SAugustin Cavalier 			sc->mii_anegticks = MII_ANEGTICKS_GIGE;
465*dba28784SAugustin Cavalier 			sc->mii_flags |= MIIF_IS_1000X;
466*dba28784SAugustin Cavalier 			ADD(IFM_MAKEWORD(IFM_ETHER, IFM_1000_SX, 0,
467*dba28784SAugustin Cavalier 			    sc->mii_inst));
468*dba28784SAugustin Cavalier 			PRINT("1000baseSX");
469*dba28784SAugustin Cavalier 		}
470*dba28784SAugustin Cavalier 		if ((sc->mii_extcapabilities & EXTSR_1000XFDX) != 0) {
471*dba28784SAugustin Cavalier 			sc->mii_anegticks = MII_ANEGTICKS_GIGE;
472*dba28784SAugustin Cavalier 			sc->mii_flags |= MIIF_IS_1000X;
473*dba28784SAugustin Cavalier 			ADD(IFM_MAKEWORD(IFM_ETHER, IFM_1000_SX, IFM_FDX,
474*dba28784SAugustin Cavalier 			    sc->mii_inst));
475*dba28784SAugustin Cavalier 			PRINT("1000baseSX-FDX");
476*dba28784SAugustin Cavalier 			if ((sc->mii_flags & MIIF_DOPAUSE) != 0 &&
477*dba28784SAugustin Cavalier 			    (sc->mii_flags & MIIF_NOMANPAUSE) == 0) {
478*dba28784SAugustin Cavalier 				ADD(IFM_MAKEWORD(IFM_ETHER, IFM_1000_SX,
479*dba28784SAugustin Cavalier 				    IFM_FDX | IFM_FLOW, sc->mii_inst));
480*dba28784SAugustin Cavalier 				PRINT("1000baseSX-FDX-flow");
481*dba28784SAugustin Cavalier 			}
482*dba28784SAugustin Cavalier 			fdx = 1;
483*dba28784SAugustin Cavalier 		}
484*dba28784SAugustin Cavalier 
485*dba28784SAugustin Cavalier 		/*
486*dba28784SAugustin Cavalier 		 * 1000baseT media needs to be able to manipulate
487*dba28784SAugustin Cavalier 		 * master/slave mode.
488*dba28784SAugustin Cavalier 		 *
489*dba28784SAugustin Cavalier 		 * All 1000baseT PHYs have a 1000baseT control register.
490*dba28784SAugustin Cavalier 		 */
491*dba28784SAugustin Cavalier 		if ((sc->mii_extcapabilities & EXTSR_1000THDX) != 0) {
492*dba28784SAugustin Cavalier 			sc->mii_anegticks = MII_ANEGTICKS_GIGE;
493*dba28784SAugustin Cavalier 			sc->mii_flags |= MIIF_HAVE_GTCR;
494*dba28784SAugustin Cavalier 			ADD(IFM_MAKEWORD(IFM_ETHER, IFM_1000_T, 0,
495*dba28784SAugustin Cavalier 			    sc->mii_inst));
496*dba28784SAugustin Cavalier 			PRINT("1000baseT");
497*dba28784SAugustin Cavalier 			ADD(IFM_MAKEWORD(IFM_ETHER, IFM_1000_T,
498*dba28784SAugustin Cavalier 			    IFM_ETH_MASTER, sc->mii_inst));
499*dba28784SAugustin Cavalier 			PRINT("1000baseT-master");
500*dba28784SAugustin Cavalier 		}
501*dba28784SAugustin Cavalier 		if ((sc->mii_extcapabilities & EXTSR_1000TFDX) != 0) {
502*dba28784SAugustin Cavalier 			sc->mii_anegticks = MII_ANEGTICKS_GIGE;
503*dba28784SAugustin Cavalier 			sc->mii_flags |= MIIF_HAVE_GTCR;
504*dba28784SAugustin Cavalier 			ADD(IFM_MAKEWORD(IFM_ETHER, IFM_1000_T, IFM_FDX,
505*dba28784SAugustin Cavalier 			    sc->mii_inst));
506*dba28784SAugustin Cavalier 			PRINT("1000baseT-FDX");
507*dba28784SAugustin Cavalier 			ADD(IFM_MAKEWORD(IFM_ETHER, IFM_1000_T,
508*dba28784SAugustin Cavalier 			    IFM_FDX | IFM_ETH_MASTER, sc->mii_inst));
509*dba28784SAugustin Cavalier 			PRINT("1000baseT-FDX-master");
510*dba28784SAugustin Cavalier 			if ((sc->mii_flags & MIIF_DOPAUSE) != 0 &&
511*dba28784SAugustin Cavalier 			    (sc->mii_flags & MIIF_NOMANPAUSE) == 0) {
512*dba28784SAugustin Cavalier 				ADD(IFM_MAKEWORD(IFM_ETHER, IFM_1000_T,
513*dba28784SAugustin Cavalier 				    IFM_FDX | IFM_FLOW, sc->mii_inst));
514*dba28784SAugustin Cavalier 				PRINT("1000baseT-FDX-flow");
515*dba28784SAugustin Cavalier 				ADD(IFM_MAKEWORD(IFM_ETHER, IFM_1000_T,
516*dba28784SAugustin Cavalier 				    IFM_FDX | IFM_FLOW | IFM_ETH_MASTER,
517*dba28784SAugustin Cavalier 				    sc->mii_inst));
518*dba28784SAugustin Cavalier 				PRINT("1000baseT-FDX-flow-master");
519*dba28784SAugustin Cavalier 			}
520*dba28784SAugustin Cavalier 			fdx = 1;
521*dba28784SAugustin Cavalier 		}
522*dba28784SAugustin Cavalier 	}
523*dba28784SAugustin Cavalier 
524*dba28784SAugustin Cavalier 	if ((sc->mii_capabilities & BMSR_ANEG) != 0) {
525*dba28784SAugustin Cavalier 		/* intentionally invalid index */
526*dba28784SAugustin Cavalier 		ADD(IFM_MAKEWORD(IFM_ETHER, IFM_AUTO, 0, sc->mii_inst));
527*dba28784SAugustin Cavalier 		PRINT("auto");
528*dba28784SAugustin Cavalier 		if (fdx != 0 && (sc->mii_flags & MIIF_DOPAUSE) != 0) {
529*dba28784SAugustin Cavalier 			ADD(IFM_MAKEWORD(IFM_ETHER, IFM_AUTO, IFM_FLOW,
530*dba28784SAugustin Cavalier 			    sc->mii_inst));
531*dba28784SAugustin Cavalier 			PRINT("auto-flow");
532*dba28784SAugustin Cavalier 		}
533*dba28784SAugustin Cavalier 	}
534*dba28784SAugustin Cavalier #undef ADD
535*dba28784SAugustin Cavalier #undef PRINT
536*dba28784SAugustin Cavalier }
537*dba28784SAugustin Cavalier 
538*dba28784SAugustin Cavalier int
mii_phy_detach(device_t dev)539*dba28784SAugustin Cavalier mii_phy_detach(device_t dev)
540*dba28784SAugustin Cavalier {
541*dba28784SAugustin Cavalier 	struct mii_softc *sc;
542*dba28784SAugustin Cavalier 
543*dba28784SAugustin Cavalier 	sc = device_get_softc(dev);
544*dba28784SAugustin Cavalier 	sc->mii_dev = NULL;
545*dba28784SAugustin Cavalier 	LIST_REMOVE(sc, mii_list);
546*dba28784SAugustin Cavalier 	return (0);
547*dba28784SAugustin Cavalier }
548*dba28784SAugustin Cavalier 
549*dba28784SAugustin Cavalier const struct mii_phydesc *
mii_phy_match_gen(const struct mii_attach_args * ma,const struct mii_phydesc * mpd,size_t len)550*dba28784SAugustin Cavalier mii_phy_match_gen(const struct mii_attach_args *ma,
551*dba28784SAugustin Cavalier   const struct mii_phydesc *mpd, size_t len)
552*dba28784SAugustin Cavalier {
553*dba28784SAugustin Cavalier 
554*dba28784SAugustin Cavalier 	for (; mpd->mpd_name != NULL;
555*dba28784SAugustin Cavalier 	    mpd = (const struct mii_phydesc *)((const char *)mpd + len)) {
556*dba28784SAugustin Cavalier 		if (MII_OUI(ma->mii_id1, ma->mii_id2) == mpd->mpd_oui &&
557*dba28784SAugustin Cavalier 		    MII_MODEL(ma->mii_id2) == mpd->mpd_model)
558*dba28784SAugustin Cavalier 			return (mpd);
559*dba28784SAugustin Cavalier 	}
560*dba28784SAugustin Cavalier 	return (NULL);
561*dba28784SAugustin Cavalier }
562*dba28784SAugustin Cavalier 
563*dba28784SAugustin Cavalier const struct mii_phydesc *
mii_phy_match(const struct mii_attach_args * ma,const struct mii_phydesc * mpd)564*dba28784SAugustin Cavalier mii_phy_match(const struct mii_attach_args *ma, const struct mii_phydesc *mpd)
565*dba28784SAugustin Cavalier {
566*dba28784SAugustin Cavalier 
567*dba28784SAugustin Cavalier 	return (mii_phy_match_gen(ma, mpd, sizeof(struct mii_phydesc)));
568*dba28784SAugustin Cavalier }
569*dba28784SAugustin Cavalier 
570*dba28784SAugustin Cavalier int
mii_phy_dev_probe(device_t dev,const struct mii_phydesc * mpd,int mrv)571*dba28784SAugustin Cavalier mii_phy_dev_probe(device_t dev, const struct mii_phydesc *mpd, int mrv)
572*dba28784SAugustin Cavalier {
573*dba28784SAugustin Cavalier 
574*dba28784SAugustin Cavalier 	mpd = mii_phy_match(device_get_ivars(dev), mpd);
575*dba28784SAugustin Cavalier 	if (mpd != NULL) {
576*dba28784SAugustin Cavalier 		device_set_desc(dev, mpd->mpd_name);
577*dba28784SAugustin Cavalier 		return (mrv);
578*dba28784SAugustin Cavalier 	}
579*dba28784SAugustin Cavalier 	return (ENXIO);
580*dba28784SAugustin Cavalier }
581*dba28784SAugustin Cavalier 
582*dba28784SAugustin Cavalier void
mii_phy_dev_attach(device_t dev,u_int flags,const struct mii_phy_funcs * mpf,int add_media)583*dba28784SAugustin Cavalier mii_phy_dev_attach(device_t dev, u_int flags, const struct mii_phy_funcs *mpf,
584*dba28784SAugustin Cavalier     int add_media)
585*dba28784SAugustin Cavalier {
586*dba28784SAugustin Cavalier 	struct mii_softc *sc;
587*dba28784SAugustin Cavalier 	struct mii_attach_args *ma;
588*dba28784SAugustin Cavalier 	struct mii_data *mii;
589*dba28784SAugustin Cavalier 
590*dba28784SAugustin Cavalier 	sc = device_get_softc(dev);
591*dba28784SAugustin Cavalier 	ma = device_get_ivars(dev);
592*dba28784SAugustin Cavalier 	sc->mii_dev = device_get_parent(dev);
593*dba28784SAugustin Cavalier 	mii = ma->mii_data;
594*dba28784SAugustin Cavalier 	LIST_INSERT_HEAD(&mii->mii_phys, sc, mii_list);
595*dba28784SAugustin Cavalier 
596*dba28784SAugustin Cavalier 	sc->mii_flags = flags | miibus_get_flags(dev);
597*dba28784SAugustin Cavalier 	sc->mii_mpd_oui = MII_OUI(ma->mii_id1, ma->mii_id2);
598*dba28784SAugustin Cavalier 	sc->mii_mpd_model = MII_MODEL(ma->mii_id2);
599*dba28784SAugustin Cavalier 	sc->mii_mpd_rev = MII_REV(ma->mii_id2);
600*dba28784SAugustin Cavalier 	sc->mii_capmask = ma->mii_capmask;
601*dba28784SAugustin Cavalier 	sc->mii_inst = mii->mii_instance++;
602*dba28784SAugustin Cavalier 	sc->mii_phy = ma->mii_phyno;
603*dba28784SAugustin Cavalier 	sc->mii_offset = ma->mii_offset;
604*dba28784SAugustin Cavalier 	sc->mii_funcs = mpf;
605*dba28784SAugustin Cavalier 	sc->mii_pdata = mii;
606*dba28784SAugustin Cavalier 
607*dba28784SAugustin Cavalier 	if (bootverbose)
608*dba28784SAugustin Cavalier 		device_printf(dev, "OUI 0x%06x, model 0x%04x, rev. %d\n",
609*dba28784SAugustin Cavalier 		    sc->mii_mpd_oui, sc->mii_mpd_model, sc->mii_mpd_rev);
610*dba28784SAugustin Cavalier 
611*dba28784SAugustin Cavalier 	if (add_media == 0)
612*dba28784SAugustin Cavalier 		return;
613*dba28784SAugustin Cavalier 
614*dba28784SAugustin Cavalier 	PHY_RESET(sc);
615*dba28784SAugustin Cavalier 
616*dba28784SAugustin Cavalier 	sc->mii_capabilities = PHY_READ(sc, MII_BMSR) & sc->mii_capmask;
617*dba28784SAugustin Cavalier 	if (sc->mii_capabilities & BMSR_EXTSTAT)
618*dba28784SAugustin Cavalier 		sc->mii_extcapabilities = PHY_READ(sc, MII_EXTSR);
619*dba28784SAugustin Cavalier 	device_printf(dev, " ");
620*dba28784SAugustin Cavalier 	mii_phy_add_media(sc);
621*dba28784SAugustin Cavalier 	printf("\n");
622*dba28784SAugustin Cavalier 
623*dba28784SAugustin Cavalier 	MIIBUS_MEDIAINIT(sc->mii_dev);
624*dba28784SAugustin Cavalier }
625*dba28784SAugustin Cavalier 
626*dba28784SAugustin Cavalier /*
627*dba28784SAugustin Cavalier  * Return the flow control status flag from MII_ANAR & MII_ANLPAR.
628*dba28784SAugustin Cavalier  */
629*dba28784SAugustin Cavalier u_int
mii_phy_flowstatus(struct mii_softc * sc)630*dba28784SAugustin Cavalier mii_phy_flowstatus(struct mii_softc *sc)
631*dba28784SAugustin Cavalier {
632*dba28784SAugustin Cavalier 	int anar, anlpar;
633*dba28784SAugustin Cavalier 
634*dba28784SAugustin Cavalier 	if ((sc->mii_flags & MIIF_DOPAUSE) == 0)
635*dba28784SAugustin Cavalier 		return (0);
636*dba28784SAugustin Cavalier 
637*dba28784SAugustin Cavalier 	anar = PHY_READ(sc, MII_ANAR);
638*dba28784SAugustin Cavalier 	anlpar = PHY_READ(sc, MII_ANLPAR);
639*dba28784SAugustin Cavalier 
640*dba28784SAugustin Cavalier 	/*
641*dba28784SAugustin Cavalier 	 * Check for 1000BASE-X.  Autonegotiation is a bit
642*dba28784SAugustin Cavalier 	 * different on such devices.
643*dba28784SAugustin Cavalier 	 */
644*dba28784SAugustin Cavalier 	if ((sc->mii_flags & MIIF_IS_1000X) != 0) {
645*dba28784SAugustin Cavalier 		anar <<= 3;
646*dba28784SAugustin Cavalier 		anlpar <<= 3;
647*dba28784SAugustin Cavalier 	}
648*dba28784SAugustin Cavalier 
649*dba28784SAugustin Cavalier 	if ((anar & ANAR_PAUSE_SYM) != 0 && (anlpar & ANLPAR_PAUSE_SYM) != 0)
650*dba28784SAugustin Cavalier 		return (IFM_FLOW | IFM_ETH_TXPAUSE | IFM_ETH_RXPAUSE);
651*dba28784SAugustin Cavalier 
652*dba28784SAugustin Cavalier 	if ((anar & ANAR_PAUSE_SYM) == 0) {
653*dba28784SAugustin Cavalier 		if ((anar & ANAR_PAUSE_ASYM) != 0 &&
654*dba28784SAugustin Cavalier 		    (anlpar & ANLPAR_PAUSE_TOWARDS) != 0)
655*dba28784SAugustin Cavalier 			return (IFM_FLOW | IFM_ETH_TXPAUSE);
656*dba28784SAugustin Cavalier 		else
657*dba28784SAugustin Cavalier 			return (0);
658*dba28784SAugustin Cavalier 	}
659*dba28784SAugustin Cavalier 
660*dba28784SAugustin Cavalier 	if ((anar & ANAR_PAUSE_ASYM) == 0) {
661*dba28784SAugustin Cavalier 		if ((anlpar & ANLPAR_PAUSE_SYM) != 0)
662*dba28784SAugustin Cavalier 			return (IFM_FLOW | IFM_ETH_TXPAUSE | IFM_ETH_RXPAUSE);
663*dba28784SAugustin Cavalier 		else
664*dba28784SAugustin Cavalier 			return (0);
665*dba28784SAugustin Cavalier 	}
666*dba28784SAugustin Cavalier 
667*dba28784SAugustin Cavalier 	switch ((anlpar & ANLPAR_PAUSE_TOWARDS)) {
668*dba28784SAugustin Cavalier 	case ANLPAR_PAUSE_NONE:
669*dba28784SAugustin Cavalier 		return (0);
670*dba28784SAugustin Cavalier 	case ANLPAR_PAUSE_ASYM:
671*dba28784SAugustin Cavalier 		return (IFM_FLOW | IFM_ETH_RXPAUSE);
672*dba28784SAugustin Cavalier 	default:
673*dba28784SAugustin Cavalier 		return (IFM_FLOW | IFM_ETH_RXPAUSE | IFM_ETH_TXPAUSE);
674*dba28784SAugustin Cavalier 	}
675*dba28784SAugustin Cavalier 	/* NOTREACHED */
676*dba28784SAugustin Cavalier }
677