1 /* 2 * Copyright 2007-2008, Axel Dörfler, axeld@pinc-software.de. 3 * Distributed under the terms of the MIT License. 4 */ 5 6 #include <dev/pci/pcivar.h> 7 #include <sys/bus.h> 8 #include <sys/malloc.h> 9 #include <sys/rman.h> 10 #include <sys/systm.h> 11 12 #include <machine/bus.h> 13 14 #include <net/if.h> 15 #include <net/if_media.h> 16 17 #include "if_bgereg.h" 18 19 20 HAIKU_FBSD_DRIVER_GLUE(broadcom570x, bge, pci); 21 HAIKU_DRIVER_REQUIREMENTS(0); 22 23 24 extern driver_t *DRIVER_MODULE_NAME(brgphy, miibus); 25 extern driver_t *DRIVER_MODULE_NAME(ukphy, miibus); 26 27 28 driver_t * 29 __haiku_select_miibus_driver(device_t dev) 30 { 31 driver_t *drivers[] = { 32 DRIVER_MODULE_NAME(brgphy, miibus), 33 DRIVER_MODULE_NAME(ukphy, miibus), 34 NULL 35 }; 36 37 return __haiku_probe_miibus(dev, drivers); 38 } 39 40 41 int 42 __haiku_disable_interrupts(device_t dev) 43 { 44 struct bge_softc *sc = device_get_softc(dev); 45 if (sc->bge_flags & BGE_FLAG_MSI) 46 return 1; 47 48 uint32 notInterrupted = pci_read_config(sc->bge_dev, BGE_PCI_PCISTATE, 4) 49 & BGE_PCISTATE_INTR_STATE; 50 // bit of a strange register name. a nonzero actually means 51 // it is _not_ interrupted by the network chip 52 53 if (notInterrupted) 54 return 0; 55 56 BGE_SETBIT(sc, BGE_PCI_MISC_CTL, BGE_PCIMISCCTL_MASK_PCI_INTR); 57 bge_writembx(sc, BGE_MBX_IRQ0_LO, 1); 58 59 return 1; 60 } 61 62 63 void 64 __haiku_reenable_interrupts(device_t dev) 65 { 66 struct bge_softc *sc = device_get_softc(dev); 67 if (sc->bge_flags & BGE_FLAG_MSI) 68 return; 69 70 BGE_SETBIT(sc, BGE_PCI_MISC_CTL, BGE_PCIMISCCTL_CLEAR_INTA); 71 BGE_CLRBIT(sc, BGE_PCI_MISC_CTL, BGE_PCIMISCCTL_MASK_PCI_INTR); 72 bge_writembx(sc, BGE_MBX_IRQ0_LO, 0); 73 } 74