1 /* 2 * Copyright 2006-2010, Haiku, Inc. All Rights Reserved. 3 * Distributed under the terms of the MIT License. 4 * 5 * Authors: 6 * Axel Dörfler, axeld@pinc-software.de 7 * Clemens Zeidler, haiku@clemens-zeidler.de 8 */ 9 #ifndef RADEON_RD_PRIVATE_H 10 #define RADEON_RD_PRIVATE_H 11 12 13 #include <AGP.h> 14 #include <KernelExport.h> 15 #include <PCI.h> 16 17 18 #include "radeon_hd.h" 19 #include "lock.h" 20 21 22 // PCI Base Address Registers 23 #define PCI_BAR_FB 0 24 #define PCI_BAR_MMIO 2 25 26 #define RADEON_BIOS8(adr, v) (adr[v]) 27 #define RADEON_BIOS16(adr, v) ((adr[v]) | (adr[(v) + 1] << 8)) 28 #define RADEON_BIOS32(adr, v) \ 29 ((RADEON_BIOS16(adr, v) | RADEON_BIOS16(adr, v + 2) << 16)) 30 31 32 struct radeon_info { 33 int32 open_count; 34 status_t init_status; 35 int32 id; 36 pci_info* pci; 37 uint8* registers; 38 39 uint8* atom_buffer; // buffer for atombios 40 41 area_id registers_area; 42 area_id framebuffer_area; 43 area_id rom_area; 44 45 struct radeon_shared_info* shared_info; 46 area_id shared_area; 47 48 uint32 pciID; 49 const char* deviceName; 50 uint16 chipsetID; 51 const char* chipsetName; 52 uint32 chipsetFlags; 53 uint8 dceMajor; 54 uint8 dceMinor; 55 }; 56 57 58 status_t mapAtomBIOS(radeon_info &info, uint32 romBase, uint32 romSize); 59 extern status_t radeon_hd_init(radeon_info& info); 60 extern void radeon_hd_uninit(radeon_info& info); 61 62 63 #endif /* RADEON_RD_PRIVATE_H */ 64