xref: /haiku/src/add-ons/kernel/drivers/graphics/radeon/radeon_driver.h (revision 1d9d47fc72028bb71b5f232a877231e59cfe2438)
1 /*
2  * Copyright (c) 2002-2004, Thomas Kurschel
3  * Distributed under the terms of the MIT license.
4  */
5 #ifndef _RADEON_DRIVER_H
6 #define _RADEON_DRIVER_H
7 
8 
9 #include "radeon_interface.h"
10 #include "memory_manager.h"
11 
12 #include <KernelExport.h>
13 #include <GraphicsDefs.h>
14 
15 
16 // logging helpers
17 extern int debug_level_flow;
18 extern int debug_level_info;
19 extern int debug_level_error;
20 
21 /*#define DEBUG_WAIT_ON_MSG 1000000
22 #define DEBUG_WAIT_ON_ERROR 1000000*/
23 
24 #define DEBUG_MSG_PREFIX "Radeon - "
25 #include "debug_ext.h"
26 
27 #include "log_coll.h"
28 
29 
30 #define MAX_DEVICES	8
31 
32 // size of PCI GART;
33 // the only user is the command processor, which needs 1 MB,
34 // so make sure that GART is large enough
35 #define PCI_GART_SIZE 1024*1024
36 
37 // size of CP ring buffer in dwords
38 #define CP_RING_SIZE 2048
39 
40 
41 // GART info (either PCI or AGP)
42 typedef struct {
43 	// data accessed via GART
44 	struct {
45 		area_id area;			// area of data
46 		size_t size;			// size of buffer
47 		void *ptr;				// CPU pointer to data
48 		area_id unaligned_area;	// unaligned address (see PCI_GART.c)
49 	} buffer;
50 
51 	// GATT info (address translation table)
52 	struct {
53 		area_id area;			// area containing GATT
54 		uint32 *ptr;			// CPU pointer to GATT
55 		uint32 phys;			// physical address of GATT
56 	} GATT;
57 } GART_info;
58 
59 // info about graphics RAM
60 typedef struct {
61 	int ml;
62 	int MB;
63 	int Trcd;
64 	int Trp;
65 	int Twr;
66 	int CL;
67 	int Tr2w;
68 	int loop_latency;
69 	int Rloop;
70 } ram_info;
71 
72 // ROM information
73 typedef struct {
74 	area_id		bios_area;		// only mapped during detection
75 
76 	uint32		phys_address;	// physical address of BIOS
77 	uint32		size;			// size in bytes
78 
79 	// the following is only useful if ROM is mapped during detection,
80 	// but the difference if the offset of hw info
81 	uint8		*bios_ptr;		// begin of entire BIOS
82 	uint8		*rom_ptr;		// begin of ROM containing hw info
83 } rom_info;
84 
85 
86 // timer for VBI emulation
87 typedef struct {
88 	timer		te;				/* timer entry for add_timer() */
89 	struct device_info	*di;	/* pointer to the owning device */
90 	bigtime_t	when_target;	/* when we're supposed to wake up */
91 } timer_info;
92 
93 
94 // info about one device
95 typedef struct device_info {
96 	uint32		is_open;
97 	area_id		shared_area;
98 	shared_info	*si;
99 
100 	area_id		virtual_card_area;
101 	virtual_card *vc;
102 	vuint8		*regs;
103 
104 	radeon_type	asic;
105 	uint8 		num_crtc;
106 	tv_chip_type tv_chip;
107 	bool		is_mobility;
108 	bool		new_pll;
109 	bool		has_vip;
110 	bool		is_igp;
111 	//display_type_e disp_type[2];
112 	fp_info		fp_info;
113 
114 	general_pll_info pll;
115 	ram_info	ram;
116 	char		ram_type[32];	// human-readable name of ram type
117 	uint32		local_mem_size;
118 
119 	rom_info	rom;
120 
121 	GART_info	pci_gart;		// PCI GART
122 	GART_info	agp_gart;		// AGP GART (unsupported)
123 	memory_type_e	nonlocal_map;	// default type of non-local memory;
124 
125 	mem_info	*memmgr[mt_last+1];	// memory managers;
126 								// if there is no AGP; the entries for non_local
127 								// and PCI are the same
128 
129 	// VBI data
130 	uint32      interrupt_count;
131 	uint32		vbi_count[2];
132 	// VBI emulation
133 	int32		shutdown_virtual_irq;	// true, to shutdown virtual interrupts
134 	timer_info  ti_a;           /* a pool of two timer managment buffers */
135     timer_info  ti_b;
136     timer_info  *current_timer; /* the timer buffer that's currently in use */
137 
138     // DMA GUI engine
139     sem_id		dma_sem;
140     uint32		dma_desc_max_num;
141     uint32		dma_desc_handle;
142     uint32		dma_desc_offset;
143 
144     // capture engine
145     spinlock	cap_spinlock;	// synchronization for following capture data
146    	sem_id		cap_sem;		// semaphore released on capture interrupt
147 	uint32		cap_int_status;	// content of CAP_INT_STATUS during lost capture irq
148 	uint32		cap_counter;	// counter of capture interrupts
149 	bigtime_t	cap_timestamp;	// timestamp of last capture interrupt
150 
151 	uint32		dac2_cntl;		// original dac2_cntl register content
152 
153 	pci_info	pcii;
154 	char		name[MAX_RADEON_DEVICE_NAME_LENGTH];
155 	char		video_name[MAX_RADEON_DEVICE_NAME_LENGTH];
156 } device_info;
157 
158 
159 // device list and some global data
160 typedef struct {
161 	uint32		count;
162 	benaphore	kernel;
163 	// every device is exported as a graphics and a video card
164 	char		*device_names[2*MAX_DEVICES+1];
165 	device_info	di[MAX_DEVICES];
166 } radeon_devices;
167 
168 
169 extern pci_module_info *pci_bus;
170 extern radeon_devices *devices;
171 
172 
173 // detect.c
174 bool Radeon_CardDetect( void );
175 void Radeon_ProbeDevices( void );
176 
177 
178 // init.c
179 status_t Radeon_FirstOpen( device_info *di );
180 void Radeon_LastClose( device_info *di );
181 status_t Radeon_MapDevice( device_info *di, bool mmio_only );
182 void Radeon_UnmapDevice(device_info *di);
183 
184 
185 // bios.c
186 status_t Radeon_MapBIOS( pci_info *pcii, rom_info *ri );
187 void Radeon_UnmapBIOS( rom_info *ri );
188 status_t Radeon_ReadBIOSData( device_info *di );
189 
190 
191 // PCI_GART.c
192 status_t Radeon_InitPCIGART( device_info *di );
193 void Radeon_CleanupPCIGART( device_info *di );
194 
195 
196 // irq.c
197 status_t Radeon_SetupIRQ( device_info *di, char *buffer );
198 void Radeon_CleanupIRQ( device_info *di );
199 
200 
201 // agp.c
202 void Radeon_Fix_AGP(void);
203 
204 
205 // mem_controller.c
206 void Radeon_InitMemController( device_info *di );
207 
208 
209 // CP_setup.c
210 void Radeon_WaitForIdle( device_info *di, bool acquire_lock, bool keep_lock );
211 void Radeon_WaitForFifo( device_info *di, int entries );
212 void Radeon_ResetEngine( device_info *di );
213 status_t Radeon_InitCP( device_info *di );
214 void Radeon_UninitCP( device_info *di );
215 
216 
217 // vip.c
218 bool Radeon_VIPRead( device_info *di, uint channel, uint address, uint32 *data, bool lock );
219 bool Radeon_VIPWrite( device_info *di, uint8 channel, uint address, uint32 data, bool lock );
220 int Radeon_FindVIPDevice( device_info *di, uint32 device_id );
221 
222 
223 // dma.c
224 status_t Radeon_InitDMA( device_info *di );
225 status_t Radeon_DMACopy(
226 	device_info *di, uint32 src, char *target, size_t size,
227 	bool lock_mem, bool contiguous );
228 
229 #endif
230