1 /* 2 Copyright 1999, Be Incorporated. All Rights Reserved. 3 This file may be used under the terms of the Be Sample Code License. 4 5 Other authors: 6 Mark Watson; 7 Rudolf Cornelissen 3/2002-3/2004. 8 */ 9 10 /* standard kernel driver stuff */ 11 #include <KernelExport.h> 12 #include <PCI.h> 13 #include <OS.h> 14 #include <driver_settings.h> 15 #include <malloc.h> 16 #include <stdlib.h> // for strtoXX 17 18 /* this is for the standardized portion of the driver API */ 19 /* currently only one operation is defined: B_GET_ACCELERANT_SIGNATURE */ 20 #include <graphic_driver.h> 21 22 /* this is for sprintf() */ 23 #include <stdio.h> 24 25 /* this is for string compares */ 26 #include <string.h> 27 28 /* The private interface between the accelerant and the kernel driver. */ 29 #include "DriverInterface.h" 30 #include "nv_macros.h" 31 32 #define get_pci(o, s) (*pci_bus->read_pci_config)(pcii->bus, pcii->device, pcii->function, (o), (s)) 33 #define set_pci(o, s, v) (*pci_bus->write_pci_config)(pcii->bus, pcii->device, pcii->function, (o), (s), (v)) 34 35 #define MAX_DEVICES 8 36 37 #define DEVICE_FORMAT "%04X_%04X_%02X%02X%02X" // apsed 38 39 /* Tell the kernel what revision of the driver API we support */ 40 int32 api_version = B_CUR_DRIVER_API_VERSION; // apsed, was 2, is 2 in R5 41 42 /* these structures are private to the kernel driver */ 43 typedef struct device_info device_info; 44 45 typedef struct { 46 timer te; /* timer entry for add_timer() */ 47 device_info *di; /* pointer to the owning device */ 48 bigtime_t when_target; /* when we're supposed to wake up */ 49 } timer_info; 50 51 struct device_info { 52 uint32 is_open; /* a count of how many times the devices has been opened */ 53 area_id shared_area; /* the area shared between the driver and all of the accelerants */ 54 shared_info *si; /* a pointer to the shared area, for convenience */ 55 vuint32 *regs; /* kernel's pointer to memory mapped registers */ 56 pci_info pcii; /* a convenience copy of the pci info for this device */ 57 char name[B_OS_NAME_LENGTH]; /* where we keep the name of the device for publishing and comparing */ 58 }; 59 60 typedef struct { 61 uint32 count; /* number of devices actually found */ 62 benaphore kernel; /* for serializing opens/closes */ 63 char *device_names[MAX_DEVICES+1]; /* device name pointer storage */ 64 device_info di[MAX_DEVICES]; /* device specific stuff */ 65 } DeviceData; 66 67 /* prototypes for our private functions */ 68 static status_t open_hook (const char* name, uint32 flags, void** cookie); 69 static status_t close_hook (void* dev); 70 static status_t free_hook (void* dev); 71 static status_t read_hook (void* dev, off_t pos, void* buf, size_t* len); 72 static status_t write_hook (void* dev, off_t pos, const void* buf, size_t* len); 73 static status_t control_hook (void* dev, uint32 msg, void *buf, size_t len); 74 static status_t map_device(device_info *di); 75 static void unmap_device(device_info *di); 76 static void probe_devices(void); 77 static int32 nv_interrupt(void *data); 78 79 static DeviceData *pd; 80 static pci_module_info *pci_bus; 81 static device_hooks graphics_device_hooks = { 82 open_hook, 83 close_hook, 84 free_hook, 85 control_hook, 86 read_hook, 87 write_hook, 88 NULL, 89 NULL, 90 NULL, 91 NULL 92 }; 93 94 #define VENDOR_ID_NVIDIA 0x10de /* Nvidia */ 95 #define VENDOR_ID_ELSA 0x1048 /* Elsa GmbH */ 96 #define VENDOR_ID_NVSTBSGS 0x12d2 /* Nvidia STB/SGS-Thompson */ 97 #define VENDOR_ID_VARISYS 0x1888 /* Varisys Limited */ 98 99 static uint16 nvidia_device_list[] = { 100 0x0020, /* Nvidia TNT1 */ 101 0x0028, /* Nvidia TNT2 (pro) */ 102 0x0029, /* Nvidia TNT2 Ultra */ 103 0x002a, /* Nvidia TNT2 */ 104 0x002b, /* Nvidia TNT2 */ 105 0x002c, /* Nvidia Vanta (Lt) */ 106 0x002d, /* Nvidia TNT2-M64 (Pro) */ 107 0x002e, /* Nvidia NV06 Vanta */ 108 0x002f, /* Nvidia NV06 Vanta */ 109 0x00a0, /* Nvidia Aladdin TNT2 */ 110 0x0100, /* Nvidia GeForce256 SDR */ 111 0x0101, /* Nvidia GeForce256 DDR */ 112 0x0102, /* Nvidia GeForce256 Ultra */ 113 0x0103, /* Nvidia Quadro */ 114 0x0110, /* Nvidia GeForce2 MX/MX400 */ 115 0x0111, /* Nvidia GeForce2 MX100/MX200 DDR */ 116 0x0112, /* Nvidia GeForce2 Go */ 117 0x0113, /* Nvidia Quadro2 MXR/EX/Go */ 118 0x0150, /* Nvidia GeForce2 GTS/Pro */ 119 0x0151, /* Nvidia GeForce2 Ti DDR */ 120 0x0152, /* Nvidia GeForce2 Ultra */ 121 0x0153, /* Nvidia Quadro2 Pro */ 122 0x0170, /* Nvidia GeForce4 MX 460 */ 123 0x0171, /* Nvidia GeForce4 MX 440 */ 124 0x0172, /* Nvidia GeForce4 MX 420 */ 125 0x0173, /* Nvidia GeForce4 MX 440SE */ 126 0x0174, /* Nvidia GeForce4 440 Go */ 127 0x0175, /* Nvidia GeForce4 420 Go */ 128 0x0176, /* Nvidia GeForce4 420 Go 32M */ 129 0x0177, /* Nvidia GeForce4 460 Go */ 130 0x0178, /* Nvidia Quadro4 500 XGL/550 XGL */ 131 0x0179, /* Nvidia GeForce4 440 Go 64M (PPC: GeForce4 MX) */ 132 0x017a, /* Nvidia Quadro4 200 NVS/400 NVS */ 133 0x017c, /* Nvidia Quadro4 500 GoGL */ 134 0x017d, /* Nvidia GeForce4 410 Go 16M */ 135 0x0181, /* Nvidia GeForce4 MX 440 AGP8X */ 136 0x0182, /* Nvidia GeForce4 MX 440SE AGP8X */ 137 0x0183, /* Nvidia GeForce4 MX 420 AGP8X */ 138 0x0185, /* Nvidia GeForce4 MX 4000 AGP8X */ 139 0x0186, /* Nvidia GeForce4 448 Go */ 140 0x0187, /* Nvidia GeForce4 488 Go */ 141 0x0188, /* Nvidia Quadro4 580 XGL */ 142 0x0189, /* Nvidia GeForce4 MX AGP8X */ 143 0x018a, /* Nvidia Quadro4 280 NVS AGP8X */ 144 0x018b, /* Nvidia Quadro4 380 XGL */ 145 0x01a0, /* Nvidia GeForce2 Integrated GPU */ 146 0x01f0, /* Nvidia GeForce4 MX Integrated GPU */ 147 0x0200, /* Nvidia GeForce3 */ 148 0x0201, /* Nvidia GeForce3 Ti 200 */ 149 0x0202, /* Nvidia GeForce3 Ti 500 */ 150 0x0203, /* Nvidia Quadro DCC */ 151 0x0250, /* Nvidia GeForce4 Ti 4600 */ 152 0x0251, /* Nvidia GeForce4 Ti 4400 */ 153 0x0252, /* Nvidia GeForce4 Ti 4600 */ 154 0x0253, /* Nvidia GeForce4 Ti 4200 */ 155 0x0258, /* Nvidia Quadro4 900 XGL */ 156 0x0259, /* Nvidia Quadro4 750 XGL */ 157 0x025b, /* Nvidia Quadro4 700 XGL */ 158 0x0280, /* Nvidia GeForce4 Ti 4800 AGP8X */ 159 0x0281, /* Nvidia GeForce4 Ti 4200 AGP8X */ 160 0x0282, /* Nvidia GeForce4 Ti 4800SE */ 161 0x0286, /* Nvidia GeForce4 4200 Go */ 162 0x0288, /* Nvidia Quadro4 980 XGL */ 163 0x0289, /* Nvidia Quadro4 780 XGL */ 164 0x028c, /* Nvidia Quadro4 700 GoGL */ 165 0x02a0, /* Nvidia GeForce3 Integrated GPU */ 166 0x0301, /* Nvidia GeForce FX 5800 Ultra */ 167 0x0302, /* Nvidia GeForce FX 5800 */ 168 0x0308, /* Nvidia Quadro FX 2000 */ 169 0x0309, /* Nvidia Quadro FX 1000 */ 170 0x0311, /* Nvidia GeForce FX 5600 Ultra */ 171 0x0312, /* Nvidia GeForce FX 5600 */ 172 0x0313, /* Nvidia unknown FX */ 173 0x0314, /* Nvidia GeForce FX 5600XT */ 174 0x0316, /* Nvidia unknown FX Go */ 175 0x0317, /* Nvidia unknown FX Go */ 176 0x031a, /* Nvidia GeForce FX 5600 Go */ 177 0x031b, /* Nvidia GeForce FX 5650 Go */ 178 0x031c, /* Nvidia Quadro FX 700 Go */ 179 0x031d, /* Nvidia unknown FX Go */ 180 0x031e, /* Nvidia unknown FX Go */ 181 0x031f, /* Nvidia unknown FX Go */ 182 0x0321, /* Nvidia GeForce FX 5200 Ultra */ 183 0x0322, /* Nvidia GeForce FX 5200 */ 184 0x0323, /* Nvidia GeForce FX 5200SE */ 185 0x0324, /* Nvidia GeForce FX 5200 Go */ 186 0x0325, /* Nvidia GeForce FX 5250 Go */ 187 0x0326, /* Nvidia GeForce FX 5500 */ 188 0x0328, /* Nvidia GeForce FX 5200 Go 32M/64M */ 189 0x0329, /* Nvidia GeForce FX 5200 (PPC) */ 190 0x032a, /* Nvidia Quadro NVS 280 PCI */ 191 0x032b, /* Nvidia Quadro FX 500 */ 192 0x032c, /* Nvidia GeForce FX 5300 Go */ 193 0x032d, /* Nvidia GeForce FX 5100 Go */ 194 0x032e, /* Nvidia unknown FX Go */ 195 0x032f, /* Nvidia unknown FX Go */ 196 0x0330, /* Nvidia GeForce FX 5900 Ultra */ 197 0x0331, /* Nvidia GeForce FX 5900 */ 198 0x0332, /* Nvidia GeForce FX 5900 XT */ 199 0x0333, /* Nvidia GeForce FX 5950 Ultra */ 200 0x0334, /* Nvidia unknown FX Go(?) */ 201 0x0338, /* Nvidia Quadro FX 3000 */ 202 0x0341, /* Nvidia GeForce FX 5700 Ultra */ 203 0x0342, /* Nvidia GeForce FX 5700 */ 204 0x0343, /* Nvidia GeForce FX 5700LE */ 205 0x0344, /* Nvidia GeForce FX 5700VE */ 206 0x034e, /* Nvidia Quadro FX 1100 */ 207 0x034f, /* Nvidia unknown FX */ 208 0 209 }; 210 /* 211 not yet included nVidia ID's that are unknown, but used apparantly: 212 0x0347 213 0x0348 214 0x0349 215 0x034b 216 0x034c. 217 218 BTW: assuming (for the moment) NV40 cards will start at ID 0x0350. 219 */ 220 221 static uint16 elsa_device_list[] = { 222 0x0c60, /* Elsa Gladiac Geforce2 MX */ 223 0 224 }; 225 226 static uint16 nvstbsgs_device_list[] = { 227 0x0020, /* Nvidia STB/SGS-Thompson TNT1 */ 228 0x0028, /* Nvidia STB/SGS-Thompson TNT2 (pro) */ 229 0x0029, /* Nvidia STB/SGS-Thompson TNT2 Ultra */ 230 0x002a, /* Nvidia STB/SGS-Thompson TNT2 */ 231 0x002b, /* Nvidia STB/SGS-Thompson TNT2 */ 232 0x002c, /* Nvidia STB/SGS-Thompson Vanta (Lt) */ 233 0x002d, /* Nvidia STB/SGS-Thompson TNT2-M64 (Pro) */ 234 0x002e, /* Nvidia STB/SGS-Thompson NV06 Vanta */ 235 0x002f, /* Nvidia STB/SGS-Thompson NV06 Vanta */ 236 0x00a0, /* Nvidia STB/SGS-Thompson Aladdin TNT2 */ 237 0 238 }; 239 240 static uint16 varisys_device_list[] = { 241 0x3503, /* Varisys GeForce4 MX440 */ 242 0x3505, /* Varisys GeForce4 Ti 4200 */ 243 0 244 }; 245 246 static struct { 247 uint16 vendor; 248 uint16 *devices; 249 } SupportedDevices[] = { 250 {VENDOR_ID_NVIDIA, nvidia_device_list}, 251 {VENDOR_ID_ELSA, elsa_device_list}, 252 {VENDOR_ID_NVSTBSGS, nvstbsgs_device_list}, 253 {VENDOR_ID_VARISYS, varisys_device_list}, 254 {0x0000, NULL} 255 }; 256 257 static settings current_settings = { // see comments in nv.settings 258 // for driver 259 DRIVER_PREFIX ".accelerant", 260 false, // dumprom 261 // for accelerant 262 0x00000000, // logmask 263 0, // memory 264 false, // usebios 265 false, // hardcursor 266 false, // greensync 267 }; 268 269 static void dumprom (void *rom, size_t size) 270 { 271 int fd = open ("/boot/home/" DRIVER_PREFIX ".rom", O_WRONLY | O_CREAT, 0666); 272 if (fd < 0) return; 273 write (fd, rom, size); 274 close (fd); 275 } 276 277 /* return 1 if vblank interrupt has occured */ 278 static int caused_vbi(vuint32 * regs) 279 { 280 return (NV_REG32(NV32_CRTC_INTS) & 0x00000001); 281 } 282 283 /* clear the vblank interrupt */ 284 static void clear_vbi(vuint32 * regs) 285 { 286 NV_REG32(NV32_CRTC_INTS) = 0x00000001; 287 } 288 289 static void enable_vbi(vuint32 * regs) 290 { 291 /* clear the vblank interrupt */ 292 NV_REG32(NV32_CRTC_INTS) = 0x00000001; 293 /* enable nVidia interrupt source vblank */ 294 NV_REG32(NV32_CRTC_INTE) |= 0x00000001; 295 /* enable nVidia interrupt system hardware (b0-1) */ 296 NV_REG32(NV32_MAIN_INTE) = 0x00000001; 297 } 298 299 static void disable_vbi(vuint32 * regs) 300 { 301 /* disable nVidia interrupt source vblank */ 302 NV_REG32(NV32_CRTC_INTE) &= 0xfffffffe; 303 /* clear the vblank interrupt */ 304 NV_REG32(NV32_CRTC_INTS) = 0x00000001; 305 /* disable nVidia interrupt system hardware (b0-1) */ 306 NV_REG32(NV32_MAIN_INTE) = 0x00000000; 307 } 308 309 /* 310 init_hardware() - Returns B_OK if one is 311 found, otherwise returns B_ERROR so the driver will be unloaded. 312 */ 313 status_t 314 init_hardware(void) { 315 long pci_index = 0; 316 pci_info pcii; 317 bool found_one = FALSE; 318 319 /* choke if we can't find the PCI bus */ 320 if (get_module(B_PCI_MODULE_NAME, (module_info **)&pci_bus) != B_OK) 321 return B_ERROR; 322 323 /* while there are more pci devices */ 324 while ((*pci_bus->get_nth_pci_info)(pci_index, &pcii) == B_NO_ERROR) { 325 int vendor = 0; 326 327 /* if we match a supported vendor */ 328 while (SupportedDevices[vendor].vendor) { 329 if (SupportedDevices[vendor].vendor == pcii.vendor_id) { 330 uint16 *devices = SupportedDevices[vendor].devices; 331 /* while there are more supported devices */ 332 while (*devices) { 333 /* if we match a supported device */ 334 if (*devices == pcii.device_id ) { 335 336 found_one = TRUE; 337 goto done; 338 } 339 /* next supported device */ 340 devices++; 341 } 342 } 343 vendor++; 344 } 345 /* next pci_info struct, please */ 346 pci_index++; 347 } 348 349 done: 350 /* put away the module manager */ 351 put_module(B_PCI_MODULE_NAME); 352 return (found_one ? B_OK : B_ERROR); 353 } 354 355 status_t 356 init_driver(void) { 357 void *settings_handle; 358 359 // get driver/accelerant settings, apsed 360 settings_handle = load_driver_settings (DRIVER_PREFIX ".settings"); 361 if (settings_handle != NULL) { 362 const char *item; 363 char *end; 364 uint32 value; 365 366 // for driver 367 item = get_driver_parameter (settings_handle, "accelerant", "", ""); 368 if ((strlen (item) > 0) && (strlen (item) < sizeof (current_settings.accelerant) - 1)) { 369 strcpy (current_settings.accelerant, item); 370 } 371 current_settings.dumprom = get_driver_boolean_parameter (settings_handle, "dumprom", false, false); 372 373 // for accelerant 374 item = get_driver_parameter (settings_handle, "logmask", "0x00000000", "0x00000000"); 375 value = strtoul (item, &end, 0); 376 if (*end == '\0') current_settings.logmask = value; 377 378 item = get_driver_parameter (settings_handle, "memory", "0", "0"); 379 value = strtoul (item, &end, 0); 380 if (*end == '\0') current_settings.memory = value; 381 382 current_settings.hardcursor = get_driver_boolean_parameter (settings_handle, "hardcursor", false, false); 383 current_settings.usebios = get_driver_boolean_parameter (settings_handle, "usebios", false, false); 384 current_settings.greensync = get_driver_boolean_parameter (settings_handle, "greensync", false, false); 385 386 unload_driver_settings (settings_handle); 387 } 388 389 /* get a handle for the pci bus */ 390 if (get_module(B_PCI_MODULE_NAME, (module_info **)&pci_bus) != B_OK) 391 return B_ERROR; 392 393 /* driver private data */ 394 pd = (DeviceData *)calloc(1, sizeof(DeviceData)); 395 if (!pd) { 396 put_module(B_PCI_MODULE_NAME); 397 return B_ERROR; 398 } 399 /* initialize the benaphore */ 400 INIT_BEN(pd->kernel); 401 /* find all of our supported devices */ 402 probe_devices(); 403 return B_OK; 404 } 405 406 const char ** 407 publish_devices(void) { 408 /* return the list of supported devices */ 409 return (const char **)pd->device_names; 410 } 411 412 device_hooks * 413 find_device(const char *name) { 414 int index = 0; 415 while (pd->device_names[index]) { 416 if (strcmp(name, pd->device_names[index]) == 0) 417 return &graphics_device_hooks; 418 index++; 419 } 420 return NULL; 421 422 } 423 424 void uninit_driver(void) { 425 426 /* free the driver data */ 427 DELETE_BEN(pd->kernel); 428 free(pd); 429 pd = NULL; 430 431 /* put the pci module away */ 432 put_module(B_PCI_MODULE_NAME); 433 } 434 435 static status_t map_device(device_info *di) 436 { 437 char buffer[B_OS_NAME_LENGTH]; /*memory for device name*/ 438 shared_info *si = di->si; 439 uint32 tmpUlong; 440 pci_info *pcii = &(di->pcii); 441 system_info sysinfo; 442 443 /*storage for the physical to virtual table (used for dma buffer)*/ 444 // physical_entry physical_memory[2]; 445 // #define G400_DMA_BUFFER_SIZE 1024*1024 446 447 /*variables for making copy of ROM*/ 448 char * rom_temp; 449 area_id rom_area; 450 451 /* Nvidia cards have registers in [0] and framebuffer in [1] */ 452 int registers = 0; 453 int frame_buffer = 1; 454 // int pseudo_dma = 2; 455 456 /* enable memory mapped IO, disable VGA I/O - this is standard*/ 457 tmpUlong = get_pci(PCI_command, 4); 458 /* enable PCI access */ 459 tmpUlong |= PCI_command_memory; 460 /* enable busmastering */ 461 tmpUlong |= PCI_command_master; 462 /* disable ISA I/O access */ 463 tmpUlong &= ~PCI_command_io; 464 set_pci(PCI_command, 4, tmpUlong); 465 466 /*work out which version of BeOS is running*/ 467 get_system_info(&sysinfo); 468 if (sysinfo.kernel_build_date[0]=='J')/*FIXME - better ID version*/ 469 { 470 si->use_clone_bugfix = 1; 471 } 472 else 473 { 474 si->use_clone_bugfix = 0; 475 } 476 477 /* work out a name for the register mapping */ 478 sprintf(buffer, DEVICE_FORMAT " regs", 479 di->pcii.vendor_id, di->pcii.device_id, 480 di->pcii.bus, di->pcii.device, di->pcii.function); 481 482 /* get a virtual memory address for the registers*/ 483 si->regs_area = map_physical_memory( 484 buffer, 485 /* WARNING: Nvidia needs to map regs as viewed from PCI space! */ 486 (void *) di->pcii.u.h0.base_registers_pci[registers], 487 di->pcii.u.h0.base_register_sizes[registers], 488 B_ANY_KERNEL_ADDRESS, 489 (si->use_clone_bugfix ? B_READ_AREA|B_WRITE_AREA : 0), 490 (void **)&(di->regs)); 491 si->clone_bugfix_regs = (uint32 *) di->regs; 492 493 /* if mapping registers to vmem failed then pass on error */ 494 if (si->regs_area < 0) return si->regs_area; 495 496 /* work out a name for the ROM mapping*/ 497 sprintf(buffer, DEVICE_FORMAT " rom", 498 di->pcii.vendor_id, di->pcii.device_id, 499 di->pcii.bus, di->pcii.device, di->pcii.function); 500 501 /*place ROM over the fbspace (this is definately safe)*/ 502 tmpUlong = di->pcii.u.h0.base_registers[frame_buffer]; 503 tmpUlong |= 0x00000001; 504 set_pci(PCI_rom_base, 4, tmpUlong); 505 506 rom_area = map_physical_memory( 507 buffer, 508 (void *)di->pcii.u.h0.base_registers[frame_buffer], 509 32768, 510 B_ANY_KERNEL_ADDRESS, 511 B_READ_AREA, 512 (void **)&(rom_temp) 513 ); 514 515 /* if mapping ROM to vmem failed then clean up and pass on error */ 516 if (rom_area < 0) { 517 delete_area(si->regs_area); 518 si->regs_area = -1; 519 return rom_area; 520 } 521 522 /* make a copy of ROM for future reference*/ 523 memcpy (si->rom_mirror, rom_temp, 32768); 524 if (current_settings.dumprom) dumprom (rom_temp, 32768); 525 526 /*disable ROM and delete the area*/ 527 set_pci(PCI_rom_base,4,0); 528 delete_area(rom_area); 529 530 /* work out a name for the framebuffer mapping*/ 531 sprintf(buffer, DEVICE_FORMAT " framebuffer", 532 di->pcii.vendor_id, di->pcii.device_id, 533 di->pcii.bus, di->pcii.device, di->pcii.function); 534 535 /* map the framebuffer into vmem, using Write Combining*/ 536 si->fb_area = map_physical_memory( 537 buffer, 538 /* WARNING: Nvidia needs to map framebuffer as viewed from PCI space! */ 539 (void *) di->pcii.u.h0.base_registers_pci[frame_buffer], 540 di->pcii.u.h0.base_register_sizes[frame_buffer], 541 B_ANY_KERNEL_BLOCK_ADDRESS | B_MTR_WC, 542 B_READ_AREA + B_WRITE_AREA, 543 &(si->framebuffer)); 544 545 /*if failed with write combining try again without*/ 546 if (si->fb_area < 0) { 547 si->fb_area = map_physical_memory( 548 buffer, 549 /* WARNING: Nvidia needs to map framebuffer as viewed from PCI space! */ 550 (void *) di->pcii.u.h0.base_registers_pci[frame_buffer], 551 di->pcii.u.h0.base_register_sizes[frame_buffer], 552 B_ANY_KERNEL_BLOCK_ADDRESS, 553 B_READ_AREA + B_WRITE_AREA, 554 &(si->framebuffer)); 555 } 556 557 /* if there was an error, delete our other areas and pass on error*/ 558 if (si->fb_area < 0) 559 { 560 delete_area(si->regs_area); 561 si->regs_area = -1; 562 return si->fb_area; 563 } 564 //fixme: retest for card coldstart and PCI/virt_mem mapping!! 565 /* remember the DMA address of the frame buffer for BDirectWindow?? purposes */ 566 si->framebuffer_pci = (void *) di->pcii.u.h0.base_registers_pci[frame_buffer]; 567 568 // remember settings for use here and in accelerant 569 si->settings = current_settings; 570 571 /* in any case, return the result */ 572 return si->fb_area; 573 } 574 575 static void unmap_device(device_info *di) { 576 shared_info *si = di->si; 577 uint32 tmpUlong; 578 pci_info *pcii = &(di->pcii); 579 580 /* disable memory mapped IO */ 581 tmpUlong = get_pci(PCI_command, 4); 582 tmpUlong &= 0xfffffffc; 583 set_pci(PCI_command, 4, tmpUlong); 584 /* delete the areas */ 585 if (si->regs_area >= 0) delete_area(si->regs_area); 586 if (si->fb_area >= 0) delete_area(si->fb_area); 587 si->regs_area = si->fb_area = -1; 588 si->framebuffer = NULL; 589 di->regs = NULL; 590 } 591 592 static void probe_devices(void) { 593 uint32 pci_index = 0; 594 uint32 count = 0; 595 device_info *di = pd->di; 596 597 /* while there are more pci devices */ 598 while ((count < MAX_DEVICES) && ((*pci_bus->get_nth_pci_info)(pci_index, &(di->pcii)) == B_NO_ERROR)) { 599 int vendor = 0; 600 601 /* if we match a supported vendor */ 602 while (SupportedDevices[vendor].vendor) { 603 if (SupportedDevices[vendor].vendor == di->pcii.vendor_id) { 604 uint16 *devices = SupportedDevices[vendor].devices; 605 /* while there are more supported devices */ 606 while (*devices) { 607 /* if we match a supported device */ 608 if (*devices == di->pcii.device_id ) { 609 /* publish the device name */ 610 sprintf(di->name, "graphics/" DEVICE_FORMAT, 611 di->pcii.vendor_id, di->pcii.device_id, 612 di->pcii.bus, di->pcii.device, di->pcii.function); 613 614 /* remember the name */ 615 pd->device_names[count] = di->name; 616 /* mark the driver as available for R/W open */ 617 di->is_open = 0; 618 /* mark areas as not yet created */ 619 di->shared_area = -1; 620 /* mark pointer to shared data as invalid */ 621 di->si = NULL; 622 /* inc pointer to device info */ 623 di++; 624 /* inc count */ 625 count++; 626 /* break out of these while loops */ 627 goto next_device; 628 } 629 /* next supported device */ 630 devices++; 631 } 632 } 633 vendor++; 634 } 635 next_device: 636 /* next pci_info struct, please */ 637 pci_index++; 638 } 639 /* propagate count */ 640 pd->count = count; 641 /* terminate list of device names with a null pointer */ 642 pd->device_names[pd->count] = NULL; 643 } 644 645 static uint32 thread_interrupt_work(int32 *flags, vuint32 *regs, shared_info *si) { 646 uint32 handled = B_HANDLED_INTERRUPT; 647 /* release the vblank semaphore */ 648 if (si->vblank >= 0) { 649 int32 blocked; 650 if ((get_sem_count(si->vblank, &blocked) == B_OK) && (blocked < 0)) { 651 release_sem_etc(si->vblank, -blocked, B_DO_NOT_RESCHEDULE); 652 handled = B_INVOKE_SCHEDULER; 653 } 654 } 655 return handled; 656 } 657 658 static int32 659 nv_interrupt(void *data) 660 { 661 int32 handled = B_UNHANDLED_INTERRUPT; 662 device_info *di = (device_info *)data; 663 shared_info *si = di->si; 664 int32 *flags = &(si->flags); 665 vuint32 *regs; 666 667 /* is someone already handling an interrupt for this device? */ 668 if (atomic_or(flags, SKD_HANDLER_INSTALLED) & SKD_HANDLER_INSTALLED) { 669 goto exit0; 670 } 671 /* get regs */ 672 regs = di->regs; 673 674 /* was it a VBI? */ 675 if (caused_vbi(regs)) { 676 /*clear the interrupt*/ 677 clear_vbi(regs); 678 /*release the semaphore*/ 679 handled = thread_interrupt_work(flags, regs, si); 680 } 681 682 /* note that we're not in the handler any more */ 683 atomic_and(flags, ~SKD_HANDLER_INSTALLED); 684 685 exit0: 686 return handled; 687 } 688 689 static status_t open_hook (const char* name, uint32 flags, void** cookie) { 690 int32 index = 0; 691 device_info *di; 692 shared_info *si; 693 thread_id thid; 694 thread_info thinfo; 695 status_t result = B_OK; 696 vuint32 *regs; 697 char shared_name[B_OS_NAME_LENGTH]; 698 699 /* find the device name in the list of devices */ 700 /* we're never passed a name we didn't publish */ 701 while (pd->device_names[index] && (strcmp(name, pd->device_names[index]) != 0)) index++; 702 703 /* for convienience */ 704 di = &(pd->di[index]); 705 706 /* make sure no one else has write access to the common data */ 707 AQUIRE_BEN(pd->kernel); 708 709 /* if it's already open for writing */ 710 if (di->is_open) { 711 /* mark it open another time */ 712 goto mark_as_open; 713 } 714 /* create the shared area */ 715 sprintf(shared_name, DEVICE_FORMAT " shared", 716 di->pcii.vendor_id, di->pcii.device_id, 717 di->pcii.bus, di->pcii.device, di->pcii.function); 718 /* create this area with NO user-space read or write permissions, to prevent accidental dammage */ 719 di->shared_area = create_area(shared_name, (void **)&(di->si), B_ANY_KERNEL_ADDRESS, ((sizeof(shared_info) + (B_PAGE_SIZE - 1)) & ~(B_PAGE_SIZE - 1)), B_FULL_LOCK, 0); 720 if (di->shared_area < 0) { 721 /* return the error */ 722 result = di->shared_area; 723 goto done; 724 } 725 726 /* save a few dereferences */ 727 si = di->si; 728 729 /* save the vendor and device IDs */ 730 si->vendor_id = di->pcii.vendor_id; 731 si->device_id = di->pcii.device_id; 732 si->revision = di->pcii.revision; 733 734 /* map the device */ 735 result = map_device(di); 736 if (result < 0) goto free_shared; 737 result = B_OK; 738 739 /* create a semaphore for vertical blank management */ 740 si->vblank = create_sem(0, di->name); 741 if (si->vblank < 0) { 742 result = si->vblank; 743 goto unmap; 744 } 745 746 /* change the owner of the semaphores to the opener's team */ 747 /* this is required because apps can't aquire kernel semaphores */ 748 thid = find_thread(NULL); 749 get_thread_info(thid, &thinfo); 750 set_sem_owner(si->vblank, thinfo.team); 751 752 /* assign local regs pointer for SAMPLExx() macros */ 753 regs = di->regs; 754 755 /* disable and clear any pending interrupts */ 756 disable_vbi(regs); 757 758 /* If there is a valid interrupt line assigned then set up interrupts */ 759 if ((di->pcii.u.h0.interrupt_pin == 0x00) || 760 (di->pcii.u.h0.interrupt_line == 0xff) || /* no IRQ assigned */ 761 (di->pcii.u.h0.interrupt_line <= 0x02)) /* system IRQ assigned */ 762 { 763 /* we are aborting! */ 764 /* Note: the R4 graphics driver kit lacks this statement!! */ 765 result = B_ERROR; 766 /* interrupt does not exist so exit without installing our handler */ 767 goto delete_the_sem; 768 } 769 else 770 { 771 /* otherwise install our interrupt handler */ 772 result = install_io_interrupt_handler(di->pcii.u.h0.interrupt_line, nv_interrupt, (void *)di, 0); 773 /* bail if we couldn't install the handler */ 774 if (result != B_OK) goto delete_the_sem; 775 } 776 777 mark_as_open: 778 /* mark the device open */ 779 di->is_open++; 780 781 /* send the cookie to the opener */ 782 *cookie = di; 783 784 goto done; 785 786 787 delete_the_sem: 788 delete_sem(si->vblank); 789 790 unmap: 791 unmap_device(di); 792 793 free_shared: 794 /* clean up our shared area */ 795 delete_area(di->shared_area); 796 di->shared_area = -1; 797 di->si = NULL; 798 799 done: 800 /* end of critical section */ 801 RELEASE_BEN(pd->kernel); 802 803 /* all done, return the status */ 804 return result; 805 } 806 807 /* ---------- 808 read_hook - does nothing, gracefully 809 ----- */ 810 static status_t 811 read_hook (void* dev, off_t pos, void* buf, size_t* len) 812 { 813 *len = 0; 814 return B_NOT_ALLOWED; 815 } 816 817 818 /* ---------- 819 write_hook - does nothing, gracefully 820 ----- */ 821 static status_t 822 write_hook (void* dev, off_t pos, const void* buf, size_t* len) 823 { 824 *len = 0; 825 return B_NOT_ALLOWED; 826 } 827 828 /* ---------- 829 close_hook - does nothing, gracefully 830 ----- */ 831 static status_t 832 close_hook (void* dev) 833 { 834 /* we don't do anything on close: there might be dup'd fd */ 835 return B_NO_ERROR; 836 } 837 838 /* ----------- 839 free_hook - close down the device 840 ----------- */ 841 static status_t 842 free_hook (void* dev) { 843 device_info *di = (device_info *)dev; 844 shared_info *si = di->si; 845 vuint32 *regs = di->regs; 846 847 /* lock the driver */ 848 AQUIRE_BEN(pd->kernel); 849 850 /* if opened multiple times, decrement the open count and exit */ 851 if (di->is_open > 1) 852 goto unlock_and_exit; 853 854 /* disable and clear any pending interrupts */ 855 disable_vbi(regs); 856 857 /* remove interrupt handler */ 858 remove_io_interrupt_handler(di->pcii.u.h0.interrupt_line, nv_interrupt, di); 859 860 /* delete the semaphores, ignoring any errors ('cause the owning team may have died on us) */ 861 delete_sem(si->vblank); 862 si->vblank = -1; 863 864 /* free regs and framebuffer areas */ 865 unmap_device(di); 866 867 /* clean up our shared area */ 868 delete_area(di->shared_area); 869 di->shared_area = -1; 870 di->si = NULL; 871 872 unlock_and_exit: 873 /* mark the device available */ 874 di->is_open--; 875 /* unlock the driver */ 876 RELEASE_BEN(pd->kernel); 877 /* all done */ 878 return B_OK; 879 } 880 881 /* ----------- 882 control_hook - where the real work is done 883 ----------- */ 884 static status_t 885 control_hook (void* dev, uint32 msg, void *buf, size_t len) { 886 device_info *di = (device_info *)dev; 887 status_t result = B_DEV_INVALID_IOCTL; 888 889 switch (msg) { 890 /* the only PUBLIC ioctl */ 891 case B_GET_ACCELERANT_SIGNATURE: { 892 char *sig = (char *)buf; 893 strcpy(sig, current_settings.accelerant); 894 result = B_OK; 895 } break; 896 897 /* PRIVATE ioctl from here on */ 898 case NV_GET_PRIVATE_DATA: { 899 nv_get_private_data *gpd = (nv_get_private_data *)buf; 900 if (gpd->magic == NV_PRIVATE_DATA_MAGIC) { 901 gpd->shared_info_area = di->shared_area; 902 result = B_OK; 903 } 904 } break; 905 case NV_GET_PCI: { 906 nv_get_set_pci *gsp = (nv_get_set_pci *)buf; 907 if (gsp->magic == NV_PRIVATE_DATA_MAGIC) { 908 pci_info *pcii = &(di->pcii); 909 gsp->value = get_pci(gsp->offset, gsp->size); 910 result = B_OK; 911 } 912 } break; 913 case NV_SET_PCI: { 914 nv_get_set_pci *gsp = (nv_get_set_pci *)buf; 915 if (gsp->magic == NV_PRIVATE_DATA_MAGIC) { 916 pci_info *pcii = &(di->pcii); 917 set_pci(gsp->offset, gsp->size, gsp->value); 918 result = B_OK; 919 } 920 } break; 921 case NV_DEVICE_NAME: { // apsed 922 nv_device_name *dn = (nv_device_name *)buf; 923 if (dn->magic == NV_PRIVATE_DATA_MAGIC) { 924 strcpy(dn->name, di->name); 925 result = B_OK; 926 } 927 } break; 928 case NV_RUN_INTERRUPTS: { 929 nv_set_bool_state *ri = (nv_set_bool_state *)buf; 930 if (ri->magic == NV_PRIVATE_DATA_MAGIC) { 931 vuint32 *regs = di->regs; 932 if (ri->do_it) { 933 enable_vbi(regs); 934 } else { 935 disable_vbi(regs); 936 } 937 result = B_OK; 938 } 939 } break; 940 } 941 return result; 942 } 943 944