1 /* 2 * Copyright 2006-2009, Haiku, Inc. All Rights Reserved. 3 * Distributed under the terms of the MIT License. 4 * 5 * Authors: 6 * Axel Dörfler, axeld@pinc-software.de 7 */ 8 9 10 #include "driver.h" 11 #include "device.h" 12 #include "lock.h" 13 14 #include <stdlib.h> 15 #include <stdio.h> 16 #include <string.h> 17 18 #include <AGP.h> 19 #include <KernelExport.h> 20 #include <OS.h> 21 #include <PCI.h> 22 #include <SupportDefs.h> 23 24 25 #define TRACE_DRIVER 26 #ifdef TRACE_DRIVER 27 # define TRACE(x...) dprintf("intel_extreme: " x) 28 #else 29 # define TRACE(x) ; 30 #endif 31 32 #define ERROR(x...) dprintf("intel_extreme: " x) 33 #define CALLED(x...) TRACE("CALLED %s\n", __PRETTY_FUNCTION__) 34 35 36 #define MAX_CARDS 4 37 38 39 // list of supported devices 40 const struct supported_device { 41 uint32 device_id; 42 int32 type; 43 const char* name; 44 } kSupportedDevices[] = { 45 {0x3577, INTEL_GROUP_83x, "i830GM"}, 46 {0x2562, INTEL_GROUP_83x, "i845G"}, 47 48 {0x2572, INTEL_GROUP_85x, "i865G"}, 49 {0x3582, INTEL_GROUP_85x, "i855G"}, 50 {0x358e, INTEL_GROUP_85x, "i855G"}, 51 52 {0x2582, INTEL_MODEL_915, "i915G"}, 53 {0x258a, INTEL_MODEL_915, "i915"}, 54 {0x2592, INTEL_MODEL_915M, "i915GM"}, 55 {0x2792, INTEL_MODEL_915, "i910"}, 56 {0x2772, INTEL_MODEL_945, "i945G"}, 57 {0x27a2, INTEL_MODEL_945M, "i945GM"}, 58 {0x27ae, INTEL_MODEL_945M, "i945GME"}, 59 {0x2972, INTEL_MODEL_965, "i946G"}, 60 {0x2982, INTEL_MODEL_965, "G35"}, 61 {0x2992, INTEL_MODEL_965, "i965Q"}, 62 {0x29a2, INTEL_MODEL_965, "i965G"}, 63 {0x2a02, INTEL_MODEL_965M, "i965GM"}, 64 {0x2a12, INTEL_MODEL_965M, "i965GME"}, 65 {0x29b2, INTEL_MODEL_G33, "G33G"}, 66 {0x29c2, INTEL_MODEL_G33, "Q35G"}, 67 {0x29d2, INTEL_MODEL_G33, "Q33G"}, 68 69 {0x2a42, INTEL_MODEL_GM45, "GM45"}, 70 {0x2e02, INTEL_MODEL_G45, "IGD"}, 71 {0x2e12, INTEL_MODEL_G45, "Q45"}, 72 {0x2e22, INTEL_MODEL_G45, "G45"}, 73 {0x2e32, INTEL_MODEL_G45, "G41"}, 74 {0x2e42, INTEL_MODEL_G45, "B43"}, 75 {0x2e92, INTEL_MODEL_G45, "B43"}, 76 77 {0xa001, INTEL_MODEL_PINE, "Atom D4xx"}, 78 {0xa002, INTEL_MODEL_PINE, "Atom D5xx"}, 79 {0xa011, INTEL_MODEL_PINEM, "Atom N4xx"}, 80 {0xa012, INTEL_MODEL_PINEM, "Atom N5xx"}, 81 82 {0x0042, INTEL_MODEL_ILKG, "IronLake Desktop"}, 83 {0x0046, INTEL_MODEL_ILKGM, "IronLake Mobile"}, 84 {0x0046, INTEL_MODEL_ILKGM, "IronLake Mobile"}, 85 {0x0046, INTEL_MODEL_ILKGM, "IronLake Mobile"}, 86 87 {0x0102, INTEL_MODEL_SNBG, "SandyBridge Desktop GT1"}, 88 {0x0112, INTEL_MODEL_SNBG, "SandyBridge Desktop GT2"}, 89 {0x0122, INTEL_MODEL_SNBG, "SandyBridge Desktop GT2+"}, 90 {0x0106, INTEL_MODEL_SNBGM, "SandyBridge Mobile GT1"}, 91 {0x0116, INTEL_MODEL_SNBGM, "SandyBridge Mobile GT2"}, 92 {0x0126, INTEL_MODEL_SNBGM, "SandyBridge Mobile GT2+"}, 93 {0x010a, INTEL_MODEL_SNBGS, "SandyBridge Server"}, 94 95 {0x0152, INTEL_MODEL_IVBG, "IvyBridge Desktop GT1"}, 96 {0x0162, INTEL_MODEL_IVBG, "IvyBridge Desktop GT2"}, 97 {0x0156, INTEL_MODEL_IVBGM, "IvyBridge Mobile GT1"}, 98 {0x0166, INTEL_MODEL_IVBGM, "IvyBridge Mobile GT2"}, 99 {0x0152, INTEL_MODEL_IVBGS, "IvyBridge Server"}, 100 {0x015a, INTEL_MODEL_IVBGS, "IvyBridge Server GT1"}, 101 {0x016a, INTEL_MODEL_IVBGS, "IvyBridge Server GT2"}, 102 103 {0x0a06, INTEL_MODEL_HASM, "Haswell ULT GT1 Mobile"}, 104 {0x0412, INTEL_MODEL_HAS, "Haswell GT2 Desktop"}, 105 {0x0416, INTEL_MODEL_HASM, "Haswell GT2 Mobile"}, 106 {0x0a16, INTEL_MODEL_HASM, "Haswell ULT GT2 Mobile"}, 107 {0x0d26, INTEL_MODEL_HASM, "Haswell CRW GT3 Mobile"}, 108 109 #if 0 110 {0x0f30, INTEL_MODEL_VLVM, "ValleyView Mobile"}, 111 {0x0f31, INTEL_MODEL_VLVM, "ValleyView Mobile"}, 112 {0x0f32, INTEL_MODEL_VLVM, "ValleyView Mobile"}, 113 {0x0f33, INTEL_MODEL_VLVM, "ValleyView Mobile"}, 114 #endif 115 116 {0x1606, INTEL_MODEL_BDWM, "Broadwell GT1 ULT"}, 117 {0x160b, INTEL_MODEL_BDWM, "Broadwell GT1 Iris"}, 118 {0x160e, INTEL_MODEL_BDWM, "Broadwell GT1 ULX"}, 119 {0x1602, INTEL_MODEL_BDWM, "Broadwell GT1 ULT"}, 120 {0x160a, INTEL_MODEL_BDWS, "Broadwell GT1 Server"}, 121 {0x160d, INTEL_MODEL_BDW, "Broadwell GT1 Workstation"}, 122 {0x1616, INTEL_MODEL_BDWM, "Broadwell GT2 ULT"}, 123 {0x161b, INTEL_MODEL_BDWM, "Broadwell GT2 ULT"}, 124 {0x161e, INTEL_MODEL_BDWM, "Broadwell GT2 ULX"}, 125 {0x1612, INTEL_MODEL_BDWM, "Broadwell GT2 Halo"}, 126 {0x161a, INTEL_MODEL_BDWS, "Broadwell GT2 Server"}, 127 {0x161d, INTEL_MODEL_BDW, "Broadwell GT2 Workstation"}, 128 {0x1626, INTEL_MODEL_BDWM, "Broadwell GT3 ULT"}, 129 {0x162b, INTEL_MODEL_BDWM, "Broadwell GT3 Iris"}, 130 {0x162e, INTEL_MODEL_BDWM, "Broadwell GT3 ULX"}, 131 {0x1622, INTEL_MODEL_BDWM, "Broadwell GT3 ULT"}, 132 {0x162a, INTEL_MODEL_BDWS, "Broadwell GT3 Server"}, 133 {0x162d, INTEL_MODEL_BDW, "Broadwell GT3 Workstation"}, 134 135 {0x1902, INTEL_MODEL_SKY, "Skylake GT1"}, 136 {0x1906, INTEL_MODEL_SKYM, "Skylake GT1"}, 137 {0x190a, INTEL_MODEL_SKYS, "Skylake GT1"}, 138 {0x190b, INTEL_MODEL_SKY, "Skylake GT1"}, 139 {0x190e, INTEL_MODEL_SKYM, "Skylake GT1"}, 140 {0x1912, INTEL_MODEL_SKY, "Skylake GT2"}, //confirmed OK 141 {0x1916, INTEL_MODEL_SKYM, "Skylake GT2"}, //confirmed native mode panel OK 142 {0x191a, INTEL_MODEL_SKYS, "Skylake GT2"}, 143 {0x191b, INTEL_MODEL_SKY, "Skylake GT2"}, 144 {0x191d, INTEL_MODEL_SKY, "Skylake GT2"}, 145 {0x191e, INTEL_MODEL_SKYM, "Skylake GT2"}, 146 {0x1921, INTEL_MODEL_SKYM, "Skylake GT2F"}, 147 {0x1926, INTEL_MODEL_SKYM, "Skylake GT3"}, 148 {0x192a, INTEL_MODEL_SKYS, "Skylake GT3"}, 149 {0x192b, INTEL_MODEL_SKY, "Skylake GT3"}, 150 151 {0x5906, INTEL_MODEL_KBY, "Kabylake ULT GT1"}, 152 {0x5902, INTEL_MODEL_KBY, "Kabylake DT GT1"}, 153 {0x5916, INTEL_MODEL_KBYM, "Kabylake ULT GT2"}, 154 {0x5921, INTEL_MODEL_KBYM, "Kabylake ULT GT2F"}, 155 {0x591c, INTEL_MODEL_KBY, "Kabylake ULX GT2"}, 156 {0x591e, INTEL_MODEL_KBY, "Kabylake ULX GT2"}, 157 {0x5912, INTEL_MODEL_KBY, "Kabylake DT GT2"}, 158 {0x5917, INTEL_MODEL_KBYM, "Kabylake Mobile GT2"}, 159 {0x591b, INTEL_MODEL_KBYM, "Kabylake Halo GT2"}, 160 {0x591d, INTEL_MODEL_KBY, "Kabylake WKS GT2"}, 161 {0x5926, INTEL_MODEL_KBY, "Kabylake ULT GT3"}, 162 {0x5927, INTEL_MODEL_KBY, "Kabylake ULT GT3"}, 163 164 {0x3e90, INTEL_MODEL_CFL, "CoffeeLake GT1"}, 165 {0x3e93, INTEL_MODEL_CFL, "CoffeeLake GT1"}, 166 {0x3e91, INTEL_MODEL_CFL, "CoffeeLake GT2"}, 167 {0x3e92, INTEL_MODEL_CFL, "CoffeeLake GT2"}, 168 {0x3e96, INTEL_MODEL_CFL, "CoffeeLake GT2"}, 169 {0x3e98, INTEL_MODEL_CFL, "CoffeeLake GT2"}, 170 {0x3e9a, INTEL_MODEL_CFL, "CoffeeLake GT2"}, 171 {0x3e9b, INTEL_MODEL_CFLM, "CoffeeLake Halo GT2"}, 172 {0x3eab, INTEL_MODEL_CFLM, "CoffeeLake Halo GT2"}, 173 {0x3ea5, INTEL_MODEL_CFL, "CoffeeLake GT3"}, 174 {0x3ea6, INTEL_MODEL_CFL, "CoffeeLake GT3"}, 175 176 {0x9ba4, INTEL_MODEL_CML, "CometLake GT1"}, 177 {0x9ba8, INTEL_MODEL_CML, "CometLake GT1"}, 178 {0x9b21, INTEL_MODEL_CMLM, "CometLake U GT1"}, 179 {0x9baa, INTEL_MODEL_CMLM, "CometLake U GT1"}, 180 {0x9bc4, INTEL_MODEL_CML, "CometLake GT2"}, 181 {0x9bc5, INTEL_MODEL_CML, "CometLake GT2"}, 182 {0x9bc6, INTEL_MODEL_CML, "CometLake GT2"}, 183 {0x9bc8, INTEL_MODEL_CML, "CometLake GT2"}, 184 {0x9be6, INTEL_MODEL_CML, "CometLake GT2"}, 185 {0x9bf6, INTEL_MODEL_CML, "CometLake GT2"}, 186 {0x9b41, INTEL_MODEL_CMLM, "CometLake U GT2"}, 187 {0x9bca, INTEL_MODEL_CMLM, "CometLake U GT2"}, 188 {0x9bcc, INTEL_MODEL_CMLM, "CometLake U GT2"}, 189 190 {0x4e55, INTEL_MODEL_JSL, "JasperLake"}, 191 {0x4e61, INTEL_MODEL_JSL, "JasperLake"}, 192 {0x4e71, INTEL_MODEL_JSLM, "JasperLake"}, 193 194 {0x9a49, INTEL_MODEL_TGLM, "TigerLake"}, 195 }; 196 197 int32 api_version = B_CUR_DRIVER_API_VERSION; 198 199 char* gDeviceNames[MAX_CARDS + 1]; 200 intel_info* gDeviceInfo[MAX_CARDS]; 201 pci_module_info* gPCI; 202 pci_x86_module_info* gPCIx86Module = NULL; 203 agp_gart_module_info* gGART; 204 mutex gLock; 205 206 207 static status_t 208 get_next_intel_extreme(int32* _cookie, pci_info &info, uint32 &type) 209 { 210 int32 index = *_cookie; 211 212 // find devices 213 214 for (; gPCI->get_nth_pci_info(index, &info) == B_OK; index++) { 215 // check vendor 216 if (info.vendor_id != VENDOR_ID_INTEL 217 || info.class_base != PCI_display 218 || (info.class_sub != PCI_vga && info.class_sub != PCI_display_other)) 219 continue; 220 221 // check device 222 for (uint32 i = 0; i < sizeof(kSupportedDevices) 223 / sizeof(kSupportedDevices[0]); i++) { 224 if (info.device_id == kSupportedDevices[i].device_id) { 225 type = i; 226 *_cookie = index + 1; 227 ERROR("%s: Intel gfx deviceID: 0x%04x\n", __func__, info.device_id); 228 return B_OK; 229 } 230 } 231 } 232 233 return B_ENTRY_NOT_FOUND; 234 } 235 236 237 static enum pch_info 238 detect_intel_pch() 239 { 240 pci_info info; 241 242 // find devices 243 for (int32 i = 0; gPCI->get_nth_pci_info(i, &info) == B_OK; i++) { 244 // check vendor 245 if (info.vendor_id != VENDOR_ID_INTEL 246 || info.class_base != PCI_bridge 247 || info.class_sub != PCI_isa) { 248 continue; 249 } 250 251 // check device 252 unsigned short id = info.device_id & INTEL_PCH_DEVICE_ID_MASK; 253 ERROR("%s: Intel PCH deviceID: 0x%04x\n", __func__, info.device_id); 254 switch(id) { 255 case INTEL_PCH_IBX_DEVICE_ID: 256 ERROR("%s: Found Ibex Peak PCH\n", __func__); 257 return INTEL_PCH_IBX; 258 case INTEL_PCH_CPT_DEVICE_ID: 259 ERROR("%s: Found CougarPoint PCH\n", __func__); 260 return INTEL_PCH_CPT; 261 case INTEL_PCH_PPT_DEVICE_ID: 262 ERROR("%s: Found PantherPoint PCH\n", __func__); 263 return INTEL_PCH_CPT; 264 case INTEL_PCH_LPT_DEVICE_ID: 265 case INTEL_PCH_LPT_LP_DEVICE_ID: 266 ERROR("%s: Found LynxPoint PCH\n", __func__); 267 return INTEL_PCH_LPT; 268 case INTEL_PCH_WPT_DEVICE_ID: 269 case INTEL_PCH_WPT_LP_DEVICE_ID: 270 ERROR("%s: Found WildcatPoint PCH\n", __func__); 271 return INTEL_PCH_LPT; 272 case INTEL_PCH_SPT_DEVICE_ID: 273 case INTEL_PCH_SPT_LP_DEVICE_ID: 274 ERROR("%s: Found SunrisePoint PCH\n", __func__); 275 return INTEL_PCH_SPT; 276 case INTEL_PCH_KBP_DEVICE_ID: 277 ERROR("%s: Found Kaby Lake PCH\n", __func__); 278 return INTEL_PCH_SPT; 279 case INTEL_PCH_CNP_DEVICE_ID: 280 case INTEL_PCH_CNP_LP_DEVICE_ID: 281 ERROR("%s: Found Cannon Lake PCH\n", __func__); 282 return INTEL_PCH_CNP; 283 case INTEL_PCH_CMP_DEVICE_ID: 284 case INTEL_PCH_CMP2_DEVICE_ID: 285 ERROR("%s: Found Comet Lake PCH\n", __func__); 286 return INTEL_PCH_CNP; 287 case INTEL_PCH_CMP_V_DEVICE_ID: 288 ERROR("%s: Found Comet Lake V PCH\n", __func__); 289 return INTEL_PCH_SPT; 290 case INTEL_PCH_ICP_DEVICE_ID: 291 case INTEL_PCH_ICP2_DEVICE_ID: 292 ERROR("%s: Found Ice Lake PCH\n", __func__); 293 return INTEL_PCH_ICP; 294 case INTEL_PCH_MCC_DEVICE_ID: 295 ERROR("%s: Found Mule Creek Canyon PCH\n", __func__); 296 return INTEL_PCH_MCC; 297 case INTEL_PCH_TGP_DEVICE_ID: 298 case INTEL_PCH_TGP2_DEVICE_ID: 299 ERROR("%s: Found Tiger Lake PCH\n", __func__); 300 return INTEL_PCH_TGP; 301 case INTEL_PCH_JSP_DEVICE_ID: 302 ERROR("%s: Found Jasper Lake PCH\n", __func__); 303 return INTEL_PCH_JSP; 304 case INTEL_PCH_ADP_DEVICE_ID: 305 case INTEL_PCH_ADP2_DEVICE_ID: 306 case INTEL_PCH_ADP3_DEVICE_ID: 307 case INTEL_PCH_ADP4_DEVICE_ID: 308 ERROR("%s: Found Alder Lake PCH\n", __func__); 309 return INTEL_PCH_ADP; 310 } 311 } 312 313 ERROR("%s: No PCH detected.\n", __func__); 314 return INTEL_PCH_NONE; 315 } 316 317 318 extern "C" const char** 319 publish_devices(void) 320 { 321 CALLED(); 322 return (const char**)gDeviceNames; 323 } 324 325 326 extern "C" status_t 327 init_hardware(void) 328 { 329 CALLED(); 330 331 status_t status = get_module(B_PCI_MODULE_NAME,(module_info**)&gPCI); 332 if (status != B_OK) { 333 ERROR("pci module unavailable\n"); 334 return status; 335 } 336 337 int32 cookie = 0; 338 uint32 type; 339 pci_info info; 340 status = get_next_intel_extreme(&cookie, info, type); 341 342 put_module(B_PCI_MODULE_NAME); 343 return status; 344 } 345 346 347 extern "C" status_t 348 init_driver(void) 349 { 350 CALLED(); 351 352 status_t status = get_module(B_PCI_MODULE_NAME, (module_info**)&gPCI); 353 if (status != B_OK) { 354 ERROR("pci module unavailable\n"); 355 return status; 356 } 357 358 status = get_module(B_AGP_GART_MODULE_NAME, (module_info**)&gGART); 359 if (status != B_OK) { 360 ERROR("AGP GART module unavailable\n"); 361 put_module(B_PCI_MODULE_NAME); 362 return status; 363 } 364 365 mutex_init(&gLock, "intel extreme ksync"); 366 367 // Try to get the PCI x86 module as well so we can enable possible MSIs. 368 if (get_module(B_PCI_X86_MODULE_NAME, 369 (module_info **)&gPCIx86Module) != B_OK) { 370 ERROR("failed to get pci x86 module\n"); 371 gPCIx86Module = NULL; 372 } 373 374 // find the PCH device (if any) 375 enum pch_info pchInfo = detect_intel_pch(); 376 377 // find devices 378 379 int32 found = 0; 380 381 for (int32 cookie = 0; found < MAX_CARDS;) { 382 pci_info* info = (pci_info*)malloc(sizeof(pci_info)); 383 if (info == NULL) 384 break; 385 386 uint32 type; 387 status = get_next_intel_extreme(&cookie, *info, type); 388 if (status < B_OK) { 389 free(info); 390 break; 391 } 392 393 // create device names & allocate device info structure 394 395 char name[64]; 396 sprintf(name, "graphics/intel_extreme_%02x%02x%02x", 397 info->bus, info->device, 398 info->function); 399 400 gDeviceNames[found] = strdup(name); 401 if (gDeviceNames[found] == NULL) 402 break; 403 404 gDeviceInfo[found] = (intel_info*)malloc(sizeof(intel_info)); 405 if (gDeviceInfo[found] == NULL) { 406 free(gDeviceNames[found]); 407 break; 408 } 409 410 // initialize the structure for later use 411 412 memset(gDeviceInfo[found], 0, sizeof(intel_info)); 413 gDeviceInfo[found]->init_status = B_NO_INIT; 414 gDeviceInfo[found]->id = found; 415 gDeviceInfo[found]->pci = info; 416 gDeviceInfo[found]->registers = info->u.h0.base_registers[0]; 417 gDeviceInfo[found]->device_identifier = kSupportedDevices[type].name; 418 gDeviceInfo[found]->device_type = kSupportedDevices[type].type; 419 gDeviceInfo[found]->pch_info = pchInfo; 420 421 dprintf(DEVICE_NAME ": (%" B_PRId32 ") %s, revision = 0x%x\n", found, 422 kSupportedDevices[type].name, info->revision); 423 424 found++; 425 } 426 427 gDeviceNames[found] = NULL; 428 429 if (found == 0) { 430 mutex_destroy(&gLock); 431 put_module(B_AGP_GART_MODULE_NAME); 432 put_module(B_PCI_MODULE_NAME); 433 if (gPCIx86Module != NULL) { 434 gPCIx86Module = NULL; 435 put_module(B_PCI_X86_MODULE_NAME); 436 } 437 return ENODEV; 438 } 439 440 return B_OK; 441 } 442 443 444 extern "C" void 445 uninit_driver(void) 446 { 447 CALLED(); 448 449 mutex_destroy(&gLock); 450 451 // free device related structures 452 char* name; 453 for (int32 index = 0; (name = gDeviceNames[index]) != NULL; index++) { 454 free(gDeviceInfo[index]); 455 free(name); 456 } 457 458 put_module(B_AGP_GART_MODULE_NAME); 459 put_module(B_PCI_MODULE_NAME); 460 if (gPCIx86Module != NULL) { 461 gPCIx86Module = NULL; 462 put_module(B_PCI_X86_MODULE_NAME); 463 } 464 } 465 466 467 extern "C" device_hooks* 468 find_device(const char* name) 469 { 470 CALLED(); 471 472 int index; 473 for (index = 0; gDeviceNames[index] != NULL; index++) { 474 if (!strcmp(name, gDeviceNames[index])) 475 return &gDeviceHooks; 476 } 477 478 return NULL; 479 } 480