1*af4a03dfSAugustin Cavalier /*-
2*af4a03dfSAugustin Cavalier * BSD LICENSE
3*af4a03dfSAugustin Cavalier *
4*af4a03dfSAugustin Cavalier * Copyright (c) Intel Corporation. All rights reserved.
5*af4a03dfSAugustin Cavalier * Copyright (c) 2017, Western Digital Corporation or its affiliates.
6*af4a03dfSAugustin Cavalier *
7*af4a03dfSAugustin Cavalier * Redistribution and use in source and binary forms, with or without
8*af4a03dfSAugustin Cavalier * modification, are permitted provided that the following conditions
9*af4a03dfSAugustin Cavalier * are met:
10*af4a03dfSAugustin Cavalier *
11*af4a03dfSAugustin Cavalier * * Redistributions of source code must retain the above copyright
12*af4a03dfSAugustin Cavalier * notice, this list of conditions and the following disclaimer.
13*af4a03dfSAugustin Cavalier * * Redistributions in binary form must reproduce the above copyright
14*af4a03dfSAugustin Cavalier * notice, this list of conditions and the following disclaimer in
15*af4a03dfSAugustin Cavalier * the documentation and/or other materials provided with the
16*af4a03dfSAugustin Cavalier * distribution.
17*af4a03dfSAugustin Cavalier * * Neither the name of Intel Corporation nor the names of its
18*af4a03dfSAugustin Cavalier * contributors may be used to endorse or promote products derived
19*af4a03dfSAugustin Cavalier * from this software without specific prior written permission.
20*af4a03dfSAugustin Cavalier *
21*af4a03dfSAugustin Cavalier * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
22*af4a03dfSAugustin Cavalier * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
23*af4a03dfSAugustin Cavalier * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
24*af4a03dfSAugustin Cavalier * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
25*af4a03dfSAugustin Cavalier * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
26*af4a03dfSAugustin Cavalier * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
27*af4a03dfSAugustin Cavalier * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
28*af4a03dfSAugustin Cavalier * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
29*af4a03dfSAugustin Cavalier * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
30*af4a03dfSAugustin Cavalier * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
31*af4a03dfSAugustin Cavalier * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
32*af4a03dfSAugustin Cavalier */
33*af4a03dfSAugustin Cavalier
34*af4a03dfSAugustin Cavalier #include "nvme_internal.h"
35*af4a03dfSAugustin Cavalier #include "nvme_pci.h"
36*af4a03dfSAugustin Cavalier
37*af4a03dfSAugustin Cavalier struct nvme_quirk {
38*af4a03dfSAugustin Cavalier struct pci_id id;
39*af4a03dfSAugustin Cavalier unsigned int flags;
40*af4a03dfSAugustin Cavalier };
41*af4a03dfSAugustin Cavalier
42*af4a03dfSAugustin Cavalier static const struct nvme_quirk nvme_quirks[] = {
43*af4a03dfSAugustin Cavalier {
44*af4a03dfSAugustin Cavalier { NVME_PCI_VID_INTEL, 0x0953, NVME_PCI_VID_INTEL, 0x3702 },
45*af4a03dfSAugustin Cavalier NVME_INTEL_QUIRK_READ_LATENCY | NVME_INTEL_QUIRK_WRITE_LATENCY
46*af4a03dfSAugustin Cavalier },
47*af4a03dfSAugustin Cavalier {
48*af4a03dfSAugustin Cavalier { NVME_PCI_VID_INTEL, 0x0953, NVME_PCI_VID_INTEL, 0x3703 },
49*af4a03dfSAugustin Cavalier NVME_INTEL_QUIRK_READ_LATENCY | NVME_INTEL_QUIRK_WRITE_LATENCY
50*af4a03dfSAugustin Cavalier },
51*af4a03dfSAugustin Cavalier {
52*af4a03dfSAugustin Cavalier { NVME_PCI_VID_INTEL, 0x0953, NVME_PCI_VID_INTEL, 0x3704 },
53*af4a03dfSAugustin Cavalier NVME_INTEL_QUIRK_READ_LATENCY | NVME_INTEL_QUIRK_WRITE_LATENCY
54*af4a03dfSAugustin Cavalier },
55*af4a03dfSAugustin Cavalier {
56*af4a03dfSAugustin Cavalier { NVME_PCI_VID_INTEL, 0x0953, NVME_PCI_VID_INTEL, 0x3705 },
57*af4a03dfSAugustin Cavalier NVME_INTEL_QUIRK_READ_LATENCY | NVME_INTEL_QUIRK_WRITE_LATENCY
58*af4a03dfSAugustin Cavalier },
59*af4a03dfSAugustin Cavalier {
60*af4a03dfSAugustin Cavalier { NVME_PCI_VID_INTEL, 0x0953, NVME_PCI_VID_INTEL, 0x3709 },
61*af4a03dfSAugustin Cavalier NVME_INTEL_QUIRK_READ_LATENCY | NVME_INTEL_QUIRK_WRITE_LATENCY
62*af4a03dfSAugustin Cavalier },
63*af4a03dfSAugustin Cavalier {
64*af4a03dfSAugustin Cavalier { NVME_PCI_VID_INTEL, 0x0953, NVME_PCI_VID_INTEL, 0x370a },
65*af4a03dfSAugustin Cavalier NVME_INTEL_QUIRK_READ_LATENCY | NVME_INTEL_QUIRK_WRITE_LATENCY
66*af4a03dfSAugustin Cavalier },
67*af4a03dfSAugustin Cavalier {
68*af4a03dfSAugustin Cavalier { NVME_PCI_VID_MEMBLAZE, 0x0540, NVME_PCI_ANY_ID, NVME_PCI_ANY_ID },
69*af4a03dfSAugustin Cavalier NVME_QUIRK_DELAY_BEFORE_CHK_RDY
70*af4a03dfSAugustin Cavalier },
71*af4a03dfSAugustin Cavalier {
72*af4a03dfSAugustin Cavalier { NVME_PCI_VID_INTEL, 0x0953, NVME_PCI_VID_INTEL, 0x370d },
73*af4a03dfSAugustin Cavalier NVME_QUIRK_DELAY_AFTER_RDY
74*af4a03dfSAugustin Cavalier },
75*af4a03dfSAugustin Cavalier {
76*af4a03dfSAugustin Cavalier { 0x0000, 0x0000, 0x0000, 0x0000 },
77*af4a03dfSAugustin Cavalier 0
78*af4a03dfSAugustin Cavalier }
79*af4a03dfSAugustin Cavalier };
80*af4a03dfSAugustin Cavalier
81*af4a03dfSAugustin Cavalier /*
82*af4a03dfSAugustin Cavalier * Compare each field. NVME_PCI_ANY_ID in s1 matches everything.
83*af4a03dfSAugustin Cavalier */
nvme_quirks_pci_id_match(const struct pci_id * id,struct pci_device * pdev)84*af4a03dfSAugustin Cavalier static bool nvme_quirks_pci_id_match(const struct pci_id *id,
85*af4a03dfSAugustin Cavalier struct pci_device *pdev)
86*af4a03dfSAugustin Cavalier {
87*af4a03dfSAugustin Cavalier if ((id->vendor_id == NVME_PCI_ANY_ID ||
88*af4a03dfSAugustin Cavalier id->vendor_id == pdev->vendor_id) &&
89*af4a03dfSAugustin Cavalier (id->device_id == NVME_PCI_ANY_ID ||
90*af4a03dfSAugustin Cavalier id->device_id == pdev->device_id) &&
91*af4a03dfSAugustin Cavalier (id->subvendor_id == NVME_PCI_ANY_ID ||
92*af4a03dfSAugustin Cavalier id->subvendor_id == pdev->subvendor_id) &&
93*af4a03dfSAugustin Cavalier (id->subdevice_id == NVME_PCI_ANY_ID ||
94*af4a03dfSAugustin Cavalier id->subdevice_id == pdev->subdevice_id))
95*af4a03dfSAugustin Cavalier return true;
96*af4a03dfSAugustin Cavalier
97*af4a03dfSAugustin Cavalier return false;
98*af4a03dfSAugustin Cavalier }
99*af4a03dfSAugustin Cavalier
nvme_ctrlr_get_quirks(struct pci_device * pdev)100*af4a03dfSAugustin Cavalier unsigned int nvme_ctrlr_get_quirks(struct pci_device *pdev)
101*af4a03dfSAugustin Cavalier {
102*af4a03dfSAugustin Cavalier const struct nvme_quirk *quirk = nvme_quirks;
103*af4a03dfSAugustin Cavalier
104*af4a03dfSAugustin Cavalier while (quirk->id.vendor_id) {
105*af4a03dfSAugustin Cavalier if (nvme_quirks_pci_id_match(&quirk->id, pdev))
106*af4a03dfSAugustin Cavalier return quirk->flags;
107*af4a03dfSAugustin Cavalier quirk++;
108*af4a03dfSAugustin Cavalier }
109*af4a03dfSAugustin Cavalier
110*af4a03dfSAugustin Cavalier return 0;
111*af4a03dfSAugustin Cavalier }
112