1 /* 2 * ice1712 BeOS/Haiku Driver for VIA - VT1712 Multi Channel Audio Controller 3 * 4 * Copyright (c) 2002, Jerome Duval (jerome.duval@free.fr) 5 * Copyright (c) 2003, Marcus Overhagen (marcus@overhagen.de) 6 * Copyright (c) 2007, Jerome Leveque (leveque.jerome@neuf.fr) 7 * 8 * All rights reserved 9 * Distributed under the terms of the MIT license. 10 */ 11 #ifndef _ICE1712_H_ 12 #define _ICE1712_H_ 13 14 15 #include "debug.h" 16 #include "hmulti_audio.h" 17 18 #include <PCI.h> 19 20 21 #define DRIVER_NAME "ice1712" 22 #define VERSION "0.5" 23 24 #define ICE1712_VENDOR_ID 0x1412 25 #define ICE1712_DEVICE_ID 0x1712 26 27 typedef enum product_t { 28 ICE1712_SUBDEVICE_DELTA1010 = 0x121430d6, 29 ICE1712_SUBDEVICE_DELTADIO2496 = 0x121431d6, 30 ICE1712_SUBDEVICE_DELTA66 = 0x121432d6, 31 ICE1712_SUBDEVICE_DELTA44 = 0x121433d6, 32 ICE1712_SUBDEVICE_AUDIOPHILE_2496 = 0x121434d6, 33 ICE1712_SUBDEVICE_DELTA410 = 0x121438d6, 34 ICE1712_SUBDEVICE_DELTA1010LT = 0x12143bd6, 35 ICE1712_SUBDEVICE_VX442 = 0x12143cd6, 36 } product_t; 37 38 #define NUM_CARDS 4 39 #define MAX_ADC 12 // + the output of the Digital mixer 40 #define MAX_DAC 10 41 #define MAX_MIDI_INTERFACE 2 42 #define SWAPPING_BUFFERS 2 43 #define SAMPLE_SIZE 4 44 #define MIN_BUFFER_FRAMES 64 45 #define MAX_BUFFER_FRAMES 2048 46 47 #define ICE1712_HARDWARE_VOLUME 10 48 #define ICE1712_MUTE_VALUE 0x7F 49 50 #define PLAYBACK_BUFFER_SIZE (MAX_BUFFER_FRAMES * MAX_DAC * SAMPLE_SIZE) 51 #define RECORD_BUFFER_SIZE (MAX_BUFFER_FRAMES * MAX_ADC * SAMPLE_SIZE) 52 53 #define PLAYBACK_BUFFER_TOTAL_SIZE (PLAYBACK_BUFFER_SIZE * SWAPPING_BUFFERS) 54 #define RECORD_BUFFER_TOTAL_SIZE (RECORD_BUFFER_SIZE * SWAPPING_BUFFERS) 55 56 #define SPDIF_LEFT 8 57 #define SPDIF_RIGHT 9 58 #define MIXER_OUT_LEFT 10 59 #define MIXER_OUT_RIGHT 11 60 61 #define SPDIF_OUT_PRESENT 1 62 #define SPDIF_IN_PRESENT 2 63 64 #define ICE1712_SAMPLERATE_96K 0x7 65 #define ICE1712_SAMPLERATE_48K 0x0 66 #define ICE1712_SAMPLERATE_88K2 0xB 67 #define ICE1712_SAMPLERATE_44K1 0x8 68 69 struct ice1712; 70 71 typedef struct _midi_dev { 72 struct ice1712 *card; 73 void *mpu401device; 74 uint8 int_mask; 75 char name[64]; 76 } midi_dev; 77 78 void ice_1712_midi_interrupt_op(int32 op, void *data); 79 status_t ice_1712_midi_open(const char *name, 80 uint32 flags, void **cookie); 81 status_t ice_1712_midi_close(void *cookie); 82 status_t ice_1712_midi_free(void *cookie); 83 status_t ice_1712_midi_control(void *cookie, 84 uint32 op, void *data, size_t len); 85 status_t ice_1712_midi_read(void *cookie, 86 off_t pos, void *data, size_t *len); 87 status_t ice_1712_midi_write(void *cookie, 88 off_t pos, const void *data, size_t *len); 89 90 typedef struct _codecCommLines 91 { 92 uint8 clock; 93 uint8 data_in; 94 uint8 data_out; 95 uint8 cs_mask; //a Mask for removing all Chip select 96 uint8 reserved[4]; 97 } codecCommLines; 98 99 typedef struct channel_volume 100 { 101 float volume; 102 bool mute; 103 } channel_volume; 104 105 typedef struct ice1712_settings 106 { 107 channel_volume playback[ICE1712_HARDWARE_VOLUME]; 108 channel_volume record[ICE1712_HARDWARE_VOLUME]; 109 110 uint32 bufferSize; 111 112 //General Settings 113 uint8 clock; //an index 114 115 //S/PDif Settings 116 uint8 outFormat; //an index 117 uint8 emphasis; //an index 118 uint8 copyMode; //an index 119 120 //Output settings 121 uint8 output[5]; //an index 122 123 uint8 reserved[32]; 124 } ice1712_settings; 125 126 typedef struct ice1712_hconfig 127 { 128 int8 nb_ADC; //Mono Channel 129 int8 nb_DAC; //Mono Channel 130 int8 nb_MPU401; 131 int8 spdif; 132 } ice1712_hconfig; 133 134 typedef struct ice1712 135 { 136 uint32 irq; 137 pci_info info; 138 char name[128]; 139 140 midi_dev midi_interf[MAX_MIDI_INTERFACE]; 141 142 uint32 Controller; //PCI_10 143 uint32 DDMA; //PCI_14 144 uint32 DMA_Path; //PCI_18 145 uint32 Multi_Track; //PCI_1C 146 147 uint8 eeprom_data[32]; 148 149 product_t product; 150 151 //We hope all manufacturers will use same 152 //communication lines for speaking with codec 153 codecCommLines CommLines; 154 155 uint32 buffer; 156 bigtime_t played_time; 157 uint32 buffer_size; //in frames 158 uint32 frames_count; 159 160 //Output 161 area_id mem_id_pb; 162 void *phys_addr_pb, *log_addr_pb; 163 uint8 total_output_channels; 164 165 //Input 166 area_id mem_id_rec; 167 void *phys_addr_rec, *log_addr_rec; 168 uint8 total_input_channels; 169 170 sem_id buffer_ready_sem; 171 172 uint8 sampling_rate; //in the format of the register 173 uint32 lock_source; 174 175 ice1712_hconfig config; 176 ice1712_settings settings; 177 } ice1712; 178 179 status_t apply_settings(ice1712 *card); 180 181 //For midi.c 182 extern int32 num_cards; 183 extern ice1712 cards[NUM_CARDS]; 184 185 //CSS_INTERRUPT_MASK 186 #define CCS_INTERRUPT_MIDI_1 0x80 187 #define CCS_INTERRUPT_MIDI_2 0x20 188 189 //??????? 190 #define GPIO_SPDIF_STATUS 0x02 //Status 191 #define GPIO_SPDIF_CCLK 0x04 //data Clock 192 #define GPIO_SPDIF_DOUT 0x08 //data output 193 194 //For Delta 66 / Delta 44 195 #define DELTA66_DOUT 0x10 // data output 196 #define DELTA66_CLK 0x20 // clock 197 #define DELTA66_CODEC_CS_0 0x40 // AK4524 #0 198 #define DELTA66_CODEC_CS_1 0x80 // AK4524 #1 199 #define DELTA66_CS_MASK 0xD0 // Chip Select mask 200 201 //For AudioPhile 2496 / Delta 410 202 #define AP2496_CLK 0x02 // clock 203 #define AP2496_DIN 0x04 // data input 204 #define AP2496_DOUT 0x08 // data output 205 #define AP2496_SPDIF_CS 0x10 // CS8427 chip select 206 #define AP2496_CODEC_CS 0x20 // AK4528 chip select 207 #define AP2496_CS_MASK 0x30 // Chip Select Mask 208 209 //For Delta 1010 LT 210 #define DELTA1010LT_CLK 0x02 // clock 211 #define DELTA1010LT_DIN 0x04 // data input 212 #define DELTA1010LT_DOUT 0x08 // data output 213 #define DELTA1010LT_CODEC_CS_0 0x00 // AK4524 #0 214 #define DELTA1010LT_CODEC_CS_1 0x10 // AK4524 #1 215 #define DELTA1010LT_CODEC_CS_2 0x20 // AK4524 #2 216 #define DELTA1010LT_CODEC_CS_3 0x30 // AK4524 #3 217 #define DELTA1010LT_SPDIF_CS 0x40 // CS8427 218 #define DELTA1010LT_CS_NONE 0x70 // All CS deselected 219 220 //For VX442 221 #define VX442_CLK 0x02 // clock 222 #define VX442_DIN 0x04 // data input 223 #define VX442_DOUT 0x08 // data output 224 #define VX442_SPDIF_CS 0x10 // CS8427 225 #define VX442_CODEC_CS_0 0x20 // ?? #0 226 #define VX442_CODEC_CS_1 0x40 // ?? #1 227 #define VX442_CS_MASK 0x70 // Chip Select Mask 228 229 #define GPIO_I2C_DELAY 5 //Clock Delay for writing 230 //I2C data throw GPIO 231 232 //Register definition for the AK45xx codec (xx = 24 or 28) 233 #define AK45xx_CHIP_ADDRESS 0x02 //Chip address of the codec 234 #define AK45xx_RESET_REGISTER 0x01 235 #define AK45xx_CLOCK_FORMAT_REGISTER 0x02 236 //Other register are not defined cause they are not used, I'm very lazy... 237 238 //Register definition for the CS84xx codec (xx = 27) 239 #define CS84xx_CHIP_ADDRESS 0x10 //Chip address of the codec 240 #define CS84xx_CONTROL_1_PORT_REG 0x01 241 #define CS84xx_CONTROL_2_PORT_REG 0x02 242 #define CS84xx_DATA_FLOW_CONTROL_REG 0x03 243 #define CS84xx_CLOCK_SOURCE_REG 0x04 244 #define CS84xx_SERIAL_INPUT_FORMAT_REG 0x05 245 #define CS84xx_SERIAL_OUTPUT_FORMAT_REG 0x06 246 247 #define CS84xx_VERSION_AND_CHIP_ID 0x7F 248 //Other register are not defined cause they are not used, I'm very lazy... 249 250 251 /* A default switch for all suported product 252 switch (card->product) 253 { 254 case ICE1712_SUBDEVICE_DELTA1010 : 255 break; 256 case ICE1712_SUBDEVICE_DELTADIO2496 : 257 break; 258 case ICE1712_SUBDEVICE_DELTA66 : 259 break; 260 case ICE1712_SUBDEVICE_DELTA44 : 261 break; 262 case ICE1712_SUBDEVICE_AUDIOPHILE : 263 break; 264 case ICE1712_SUBDEVICE_DELTA410 : 265 break; 266 case ICE1712_SUBDEVICE_DELTA1010LT : 267 break; 268 case ICE1712_SUBDEVICE_VX442 : 269 break; 270 } 271 */ 272 273 //This map comes from ALSA sound drivers 274 #define E2PROM_MAP_SUBVENDOR_LOW 0x00 275 #define E2PROM_MAP_SUBVENDOR_HIGH 0x01 276 #define E2PROM_MAP_SUBDEVICE_LOW 0x02 277 #define E2PROM_MAP_SUBDEVICE_HIGH 0x03 278 #define E2PROM_MAP_SIZE 0x04 279 #define E2PROM_MAP_VERSION 0x05 280 #define E2PROM_MAP_CONFIG 0x06 281 #define E2PROM_MAP_ACL 0x07 282 #define E2PROM_MAP_I2S 0x08 283 #define E2PROM_MAP_SPDIF 0x09 284 #define E2PROM_MAP_GPIOMASK 0x0A 285 #define E2PROM_MAP_GPIOSTATE 0x0B 286 #define E2PROM_MAP_GPIODIR 0x0C 287 #define E2PROM_MAP_AC97MAIN 0x0D 288 #define E2PROM_MAP_AC97PCM 0x0F 289 #define E2PROM_MAP_AC97REC 0x11 290 #define E2PROM_MAP_AC97REC_SOURCE 0x13 291 #define E2PROM_MAP_DAC_ID 0x14 292 #define E2PROM_MAP_ADC_ID 0x18 293 #define E2PROM_MAP_EXTRA 0x1C 294 295 #endif 296