1 /* 2 * ice1712 BeOS/Haiku Driver for VIA - VT1712 Multi Channel Audio Controller 3 * 4 * Copyright (c) 2002, Jerome Duval (jerome.duval@free.fr) 5 * Copyright (c) 2003, Marcus Overhagen (marcus@overhagen.de) 6 * Copyright (c) 2007, Jerome Leveque (leveque.jerome@neuf.fr) 7 * 8 * All rights reserved 9 * Distributed under the terms of the MIT license. 10 */ 11 #ifndef _ICE1712_H_ 12 #define _ICE1712_H_ 13 14 15 #include <PCI.h> 16 #include "hmulti_audio.h" 17 18 #define DRIVER_NAME "ice1712" 19 #define VERSION "0.5" 20 21 #define ICE1712_VENDOR_ID 0x1412 22 #define ICE1712_DEVICE_ID 0x1712 23 24 typedef enum product_t { 25 ICE1712_SUBDEVICE_DELTA1010 = 0x121430d6, 26 ICE1712_SUBDEVICE_DELTADIO2496 = 0x121431d6, 27 ICE1712_SUBDEVICE_DELTA66 = 0x121432d6, 28 ICE1712_SUBDEVICE_DELTA44 = 0x121433d6, 29 ICE1712_SUBDEVICE_AUDIOPHILE_2496 = 0x121434d6, 30 ICE1712_SUBDEVICE_DELTA410 = 0x121438d6, 31 ICE1712_SUBDEVICE_DELTA1010LT = 0x12143bd6, 32 ICE1712_SUBDEVICE_VX442 = 0x12143cd6, 33 } product_t; 34 35 #define NUM_CARDS 4 36 #define MAX_ADC 12 // + the output of the Digital mixer 37 #define MAX_DAC 10 38 #define MAX_MIDI_INTERFACE 2 39 #define SWAPPING_BUFFERS 2 40 #define SAMPLE_SIZE 4 41 #define MIN_BUFFER_FRAMES 64 42 #define MAX_BUFFER_FRAMES 2048 43 44 #define ICE1712_HARDWARE_VOLUME 10 45 #define ICE1712_MUTE_VALUE 0x7F 46 47 #define PLAYBACK_BUFFER_SIZE (MAX_BUFFER_FRAMES * MAX_DAC * SAMPLE_SIZE) 48 #define RECORD_BUFFER_SIZE (MAX_BUFFER_FRAMES * MAX_ADC * SAMPLE_SIZE) 49 50 #define PLAYBACK_BUFFER_TOTAL_SIZE (PLAYBACK_BUFFER_SIZE * SWAPPING_BUFFERS) 51 #define RECORD_BUFFER_TOTAL_SIZE (RECORD_BUFFER_SIZE * SWAPPING_BUFFERS) 52 53 #define SPDIF_LEFT 8 54 #define SPDIF_RIGHT 9 55 #define MIXER_OUT_LEFT 10 56 #define MIXER_OUT_RIGHT 11 57 58 #define SPDIF_OUT_PRESENT 1 59 #define SPDIF_IN_PRESENT 2 60 61 #define ICE1712_SAMPLERATE_96K 0x7 62 #define ICE1712_SAMPLERATE_48K 0x0 63 #define ICE1712_SAMPLERATE_88K2 0xB 64 #define ICE1712_SAMPLERATE_44K1 0x8 65 66 struct ice1712; 67 68 typedef struct _midi_dev { 69 struct ice1712 *card; 70 void *mpu401device; 71 uint8 int_mask; 72 char name[64]; 73 } midi_dev; 74 75 void ice_1712_midi_interrupt_op(int32 op, void *data); 76 status_t ice_1712_midi_open(const char *name, 77 uint32 flags, void **cookie); 78 status_t ice_1712_midi_close(void *cookie); 79 status_t ice_1712_midi_free(void *cookie); 80 status_t ice_1712_midi_control(void *cookie, 81 uint32 op, void *data, size_t len); 82 status_t ice_1712_midi_read(void *cookie, 83 off_t pos, void *data, size_t *len); 84 status_t ice_1712_midi_write(void *cookie, 85 off_t pos, const void *data, size_t *len); 86 87 typedef struct _codecCommLines 88 { 89 uint8 clock; 90 uint8 data_in; 91 uint8 data_out; 92 uint8 cs_mask; //a Mask for removing all Chip select 93 uint8 reserved[4]; 94 } codecCommLines; 95 96 typedef struct channel_volume 97 { 98 float volume; 99 bool mute; 100 } channel_volume; 101 102 typedef struct ice1712_settings 103 { 104 channel_volume playback[ICE1712_HARDWARE_VOLUME]; 105 channel_volume record[ICE1712_HARDWARE_VOLUME]; 106 107 uint32 bufferSize; 108 109 //General Settings 110 uint8 clock; //an index 111 112 //S/PDif Settings 113 uint8 outFormat; //an index 114 uint8 emphasis; //an index 115 uint8 copyMode; //an index 116 117 //Output settings 118 uint8 output[5]; //an index 119 120 uint8 reserved[32]; 121 } ice1712_settings; 122 123 typedef struct ice1712_hconfig 124 { 125 int8 nb_ADC; //Mono Channel 126 int8 nb_DAC; //Mono Channel 127 int8 nb_MPU401; 128 int8 spdif; 129 } ice1712_hconfig; 130 131 typedef struct ice1712 132 { 133 uint32 irq; 134 pci_info info; 135 char name[128]; 136 137 midi_dev midi_interf[MAX_MIDI_INTERFACE]; 138 139 uint32 Controller; //PCI_10 140 uint32 DDMA; //PCI_14 141 uint32 DMA_Path; //PCI_18 142 uint32 Multi_Track; //PCI_1C 143 144 uint8 eeprom_data[32]; 145 146 product_t product; 147 148 //We hope all manufacturers will use same 149 //communication lines for speaking with codec 150 codecCommLines CommLines; 151 152 uint32 buffer; 153 bigtime_t played_time; 154 uint32 buffer_size; //in frames 155 uint32 frames_count; 156 157 //Output 158 area_id mem_id_pb; 159 void *phys_addr_pb, *log_addr_pb; 160 uint8 total_output_channels; 161 162 //Input 163 area_id mem_id_rec; 164 void *phys_addr_rec, *log_addr_rec; 165 uint8 total_input_channels; 166 167 sem_id buffer_ready_sem; 168 169 uint8 sampling_rate; //in the format of the register 170 uint32 lock_source; 171 172 ice1712_hconfig config; 173 ice1712_settings settings; 174 } ice1712; 175 176 status_t apply_settings(ice1712 *card); 177 178 //For midi.c 179 extern int32 num_cards; 180 extern ice1712 cards[NUM_CARDS]; 181 182 //CSS_INTERRUPT_MASK 183 #define CCS_INTERRUPT_MIDI_1 0x80 184 #define CCS_INTERRUPT_MIDI_2 0x20 185 186 //??????? 187 #define GPIO_SPDIF_STATUS 0x02 //Status 188 #define GPIO_SPDIF_CCLK 0x04 //data Clock 189 #define GPIO_SPDIF_DOUT 0x08 //data output 190 191 //For Delta 66 / Delta 44 192 #define DELTA66_DOUT 0x10 // data output 193 #define DELTA66_CLK 0x20 // clock 194 #define DELTA66_CODEC_CS_0 0x40 // AK4524 #0 195 #define DELTA66_CODEC_CS_1 0x80 // AK4524 #1 196 #define DELTA66_CS_MASK 0xD0 // Chip Select mask 197 198 //For AudioPhile 2496 / Delta 410 199 #define AP2496_CLK 0x02 // clock 200 #define AP2496_DIN 0x04 // data input 201 #define AP2496_DOUT 0x08 // data output 202 #define AP2496_SPDIF_CS 0x10 // CS8427 chip select 203 #define AP2496_CODEC_CS 0x20 // AK4528 chip select 204 #define AP2496_CS_MASK 0x30 // Chip Select Mask 205 206 //For Delta 1010 LT 207 #define DELTA1010LT_CLK 0x02 // clock 208 #define DELTA1010LT_DIN 0x04 // data input 209 #define DELTA1010LT_DOUT 0x08 // data output 210 #define DELTA1010LT_CODEC_CS_0 0x00 // AK4524 #0 211 #define DELTA1010LT_CODEC_CS_1 0x10 // AK4524 #1 212 #define DELTA1010LT_CODEC_CS_2 0x20 // AK4524 #2 213 #define DELTA1010LT_CODEC_CS_3 0x30 // AK4524 #3 214 #define DELTA1010LT_SPDIF_CS 0x40 // CS8427 215 #define DELTA1010LT_CS_NONE 0x70 // All CS deselected 216 217 //For VX442 218 #define VX442_CLK 0x02 // clock 219 #define VX442_DIN 0x04 // data input 220 #define VX442_DOUT 0x08 // data output 221 #define VX442_SPDIF_CS 0x10 // CS8427 222 #define VX442_CODEC_CS_0 0x20 // ?? #0 223 #define VX442_CODEC_CS_1 0x40 // ?? #1 224 #define VX442_CS_MASK 0x70 // Chip Select Mask 225 226 #define GPIO_I2C_DELAY 5 //Clock Delay for writing 227 //I2C data throw GPIO 228 229 //Register definition for the AK45xx codec (xx = 24 or 28) 230 #define AK45xx_CHIP_ADDRESS 0x02 //Chip address of the codec 231 #define AK45xx_RESET_REGISTER 0x01 232 #define AK45xx_CLOCK_FORMAT_REGISTER 0x02 233 //Other register are not defined cause they are not used, I'm very lazy... 234 235 //Register definition for the CS84xx codec (xx = 27) 236 #define CS84xx_CHIP_ADDRESS 0x10 //Chip address of the codec 237 #define CS84xx_CONTROL_1_PORT_REG 0x01 238 #define CS84xx_CONTROL_2_PORT_REG 0x02 239 #define CS84xx_DATA_FLOW_CONTROL_REG 0x03 240 #define CS84xx_CLOCK_SOURCE_REG 0x04 241 #define CS84xx_SERIAL_INPUT_FORMAT_REG 0x05 242 #define CS84xx_SERIAL_OUTPUT_FORMAT_REG 0x06 243 244 #define CS84xx_VERSION_AND_CHIP_ID 0x7F 245 //Other register are not defined cause they are not used, I'm very lazy... 246 247 248 /* A default switch for all suported product 249 switch (card->product) 250 { 251 case ICE1712_SUBDEVICE_DELTA1010 : 252 break; 253 case ICE1712_SUBDEVICE_DELTADIO2496 : 254 break; 255 case ICE1712_SUBDEVICE_DELTA66 : 256 break; 257 case ICE1712_SUBDEVICE_DELTA44 : 258 break; 259 case ICE1712_SUBDEVICE_AUDIOPHILE : 260 break; 261 case ICE1712_SUBDEVICE_DELTA410 : 262 break; 263 case ICE1712_SUBDEVICE_DELTA1010LT : 264 break; 265 case ICE1712_SUBDEVICE_VX442 : 266 break; 267 } 268 */ 269 270 //This map comes from ALSA sound drivers 271 #define E2PROM_MAP_SUBVENDOR_LOW 0x00 272 #define E2PROM_MAP_SUBVENDOR_HIGH 0x01 273 #define E2PROM_MAP_SUBDEVICE_LOW 0x02 274 #define E2PROM_MAP_SUBDEVICE_HIGH 0x03 275 #define E2PROM_MAP_SIZE 0x04 276 #define E2PROM_MAP_VERSION 0x05 277 #define E2PROM_MAP_CONFIG 0x06 278 #define E2PROM_MAP_ACL 0x07 279 #define E2PROM_MAP_I2S 0x08 280 #define E2PROM_MAP_SPDIF 0x09 281 #define E2PROM_MAP_GPIOMASK 0x0A 282 #define E2PROM_MAP_GPIOSTATE 0x0B 283 #define E2PROM_MAP_GPIODIR 0x0C 284 #define E2PROM_MAP_AC97MAIN 0x0D 285 #define E2PROM_MAP_AC97PCM 0x0F 286 #define E2PROM_MAP_AC97REC 0x11 287 #define E2PROM_MAP_AC97REC_SOURCE 0x13 288 #define E2PROM_MAP_DAC_ID 0x14 289 #define E2PROM_MAP_ADC_ID 0x18 290 #define E2PROM_MAP_EXTRA 0x1C 291 292 #endif 293