1 /* 2 * ice1712 BeOS/Haiku Driver for VIA - VT1712 Multi Channel Audio Controller 3 * 4 * Copyright (c) 2002, Jerome Duval (jerome.duval@free.fr) 5 * Copyright (c) 2003, Marcus Overhagen (marcus@overhagen.de) 6 * Copyright (c) 2007, Jerome Leveque (leveque.jerome@neuf.fr) 7 * 8 * All rights reserved 9 * Distributed under the terms of the MIT license. 10 */ 11 12 #ifndef _ICE1712_H_ 13 #define _ICE1712_H_ 14 15 #include <PCI.h> 16 17 #define DRIVER_NAME "ice1712" 18 #define VERSION "0.3" 19 20 #define ICE1712_VENDOR_ID 0x1412 21 #define ICE1712_DEVICE_ID 0x1712 22 23 24 typedef enum product_t { 25 ICE1712_SUBDEVICE_DELTA1010 = 0x121430d6, 26 ICE1712_SUBDEVICE_DELTADIO2496 = 0x121431d6, 27 ICE1712_SUBDEVICE_DELTA66 = 0x121432d6, 28 ICE1712_SUBDEVICE_DELTA44 = 0x121433d6, 29 ICE1712_SUBDEVICE_AUDIOPHILE_2496 = 0x121434d6, 30 ICE1712_SUBDEVICE_DELTA410 = 0x121438d6, 31 ICE1712_SUBDEVICE_DELTA1010LT = 0x12143bd6, 32 ICE1712_SUBDEVICE_VX442 = 0x12143cd6, 33 } product_t; 34 35 #define NUM_CARDS 4 36 #define MAX_ADC 12 // + the output of the Digital mixer 37 #define MAX_DAC 10 38 #define SWAPPING_BUFFERS 2 39 #define SAMPLE_SIZE 4 40 #define MIN_BUFFER_FRAMES 64 41 #define MAX_BUFFER_FRAMES 2048 42 43 #define PLAYBACK_BUFFER_SIZE (MAX_BUFFER_FRAMES * MAX_DAC * SAMPLE_SIZE) 44 #define RECORD_BUFFER_SIZE (MAX_BUFFER_FRAMES * MAX_ADC * SAMPLE_SIZE) 45 46 #define PLAYBACK_BUFFER_TOTAL_SIZE (PLAYBACK_BUFFER_SIZE * SWAPPING_BUFFERS) 47 #define RECORD_BUFFER_TOTAL_SIZE (RECORD_BUFFER_SIZE * SWAPPING_BUFFERS) 48 49 #define SPDIF_LEFT 8 50 #define SPDIF_RIGHT 9 51 #define MIXER_OUT_LEFT 10 52 #define MIXER_OUT_RIGHT 11 53 54 typedef enum { 55 NO_IN_NO_OUT = 0, 56 NO_IN_YES_OUT = 1, 57 YES_IN_NO_OUT = 2, 58 YES_IN_YES_OUT = 3, 59 } _spdif_config_ ; 60 61 typedef struct _midi_dev { 62 struct _ice1712_ *card; 63 void *driver; 64 void *cookie; 65 int32 count; 66 char name[64]; 67 } midi_dev; 68 69 typedef struct codec_info 70 { 71 uint8 clock; 72 uint8 data_in; 73 uint8 data_out; 74 uint8 reserved[5]; 75 } codec_info; 76 77 typedef struct _ice1712_ 78 { 79 uint32 irq; 80 pci_info info; 81 char name[128]; 82 83 midi_dev midi_interf[2]; 84 85 uint32 Controller; //PCI_10 86 uint32 DDMA; //PCI_14 87 uint32 DMA_Path; //PCI_18 88 uint32 Multi_Track; //PCI_1C 89 90 int8 nb_ADC; //Mono Channel 91 int8 nb_DAC; //Mono Channel 92 _spdif_config_ spdif_config; 93 int8 nb_MPU401; 94 95 product_t product; 96 uint8 gpio_cs_mask; //a Mask for removing all Chip select 97 98 //We hope all manufacturer will not use different codec on the same card 99 codec_info analog_codec; 100 codec_info digital_codec; 101 102 uint32 buffer; 103 bigtime_t played_time; 104 105 //Output 106 area_id mem_id_pb; 107 void *phys_addr_pb, *log_addr_pb; 108 uint32 output_buffer_size; //in frames 109 uint8 total_output_channels; 110 111 //Input 112 area_id mem_id_rec; 113 void *phys_addr_rec, *log_addr_rec; 114 uint32 input_buffer_size; //in frames 115 uint8 total_input_channels; 116 117 sem_id buffer_ready_sem; 118 119 uint8 sampling_rate; //in the format of the register 120 121 } ice1712; 122 123 extern int32 num_cards; 124 extern ice1712 cards[NUM_CARDS]; 125 126 //??????? 127 #define GPIO_SPDIF_STATUS 0x02 //Status 128 #define GPIO_SPDIF_CCLK 0x04 //data Clock 129 #define GPIO_SPDIF_DOUT 0x08 //data output 130 131 //For Delta 66 / Delta 44 132 #define DELTA66_DOUT 0x10 // data output 133 #define DELTA66_CLK 0x20 // clock 134 #define DELTA66_CODEC_CS_0 0x40 // AK4524 #0 135 #define DELTA66_CODEC_CS_1 0x80 // AK4524 #1 136 137 //For AudioPhile 2496 / Delta 410 138 #define AP2496_CLK 0x02 // clock 139 #define AP2496_DIN 0x04 // data input 140 #define AP2496_DOUT 0x08 // data output 141 #define AP2496_SPDIF_CS 0x10 // CS8427 chip select 142 #define AP2496_CODEC_CS 0x20 // AK4528 chip select 143 144 //For Delta 1010 LT 145 #define DELTA1010LT_CLK 0x02 // clock 146 #define DELTA1010LT_DIN 0x04 // data input 147 #define DELTA1010LT_DOUT 0x08 // data output 148 #define DELTA1010LT_CODEC_CS_0 0x00 // AK4524 #0 149 #define DELTA1010LT_CODEC_CS_1 0x10 // AK4524 #1 150 #define DELTA1010LT_CODEC_CS_2 0x20 // AK4524 #2 151 #define DELTA1010LT_CODEC_CS_3 0x30 // AK4524 #3 152 #define DELTA1010LT_SPDIF_CS 0x40 // CS8427 153 #define DELTA1010LT_CS_NONE 0x50 // All CS deselected 154 155 //For VX442 156 #define VX442_CLK 0x02 // clock 157 #define VX442_DIN 0x04 // data input 158 #define VX442_DOUT 0x08 // data output 159 #define VX442_SPDIF_CS 0x10 // CS8427 160 #define VX442_CODEC_CS_0 0x20 // ?? #0 161 #define VX442_CODEC_CS_1 0x40 // ?? #1 162 163 #define AK45xx_BITS_TO_WRITE 16 164 //2 - Chip Address (10b) 165 //1 - R/W (Always 1 for Writing) 166 //5 - Register Address 167 //8 - Data 168 169 //Register definition for the AK45xx codec (xx = 24 or 28) 170 #define AK45xx_DELAY 100 //Clock Delay 171 #define AK45xx_CHIP_ADDRESS 0x02 //Chip address of the codec 172 #define AK45xx_RESET_REGISTER 0x01 173 #define AK45xx_CLOCK_FORMAT_REGISTER 0x02 174 //Other register are not defined cause they are not used, I'm very lazy... 175 176 #define CS84xx_BITS_TO_WRITE 24 177 //7 - Chip Address (0010000b) 178 //1 - R/W (1 for Reading) 179 //8 - Register MAP 180 //8 - Data 181 182 //Register definition for the CS84xx codec (xx = 27) 183 #define CS84xx_DELAY 100 //Clock Delay 184 #define CS84xx_CHIP_ADDRESS 0x10 //Chip address of the codec 185 #define CS84xx_CONTROL_1_PORT_REG 0x01 186 #define CS84xx_CONTROL_2_PORT_REG 0x02 187 #define CS84xx_DATA_FLOW_CONTROL_REG 0x03 188 #define CS84xx_CLOCK_SOURCE_REG 0x04 189 #define CS84xx_SERIAL_INPUT_FORMAT_REG 0x05 190 #define CS84xx_SERIAL_OUTPUT_FORMAT_REG 0x06 191 //Other register are not defined cause they are not used, I'm very lazy... 192 193 194 /* A default switch for all suported product 195 switch (card->product) 196 { 197 case ICE1712_SUBDEVICE_DELTA1010 : 198 break; 199 case ICE1712_SUBDEVICE_DELTADIO2496 : 200 break; 201 case ICE1712_SUBDEVICE_DELTA66 : 202 break; 203 case ICE1712_SUBDEVICE_DELTA44 : 204 break; 205 case ICE1712_SUBDEVICE_AUDIOPHILE : 206 break; 207 case ICE1712_SUBDEVICE_DELTA410 : 208 break; 209 case ICE1712_SUBDEVICE_DELTA1010LT : 210 break; 211 case ICE1712_SUBDEVICE_VX442 : 212 break; 213 } 214 */ 215 216 #endif 217