1 /* 2 * ice1712 BeOS/Haiku Driver for VIA - VT1712 Multi Channel Audio Controller 3 * 4 * Copyright (c) 2002, Jerome Duval (jerome.duval@free.fr) 5 * Copyright (c) 2003, Marcus Overhagen (marcus@overhagen.de) 6 * Copyright (c) 2007, Jerome Leveque (leveque.jerome@neuf.fr) 7 * 8 * All rights reserved 9 * Distributed under the terms of the MIT license. 10 */ 11 12 #ifndef _ICE1712_H_ 13 #define _ICE1712_H_ 14 15 #include <PCI.h> 16 #include "hmulti_audio.h" 17 18 #define DRIVER_NAME "ice1712" 19 #define VERSION "0.4" 20 21 #define ICE1712_VENDOR_ID 0x1412 22 #define ICE1712_DEVICE_ID 0x1712 23 24 typedef enum product_t { 25 ICE1712_SUBDEVICE_DELTA1010 = 0x121430d6, 26 ICE1712_SUBDEVICE_DELTADIO2496 = 0x121431d6, 27 ICE1712_SUBDEVICE_DELTA66 = 0x121432d6, 28 ICE1712_SUBDEVICE_DELTA44 = 0x121433d6, 29 ICE1712_SUBDEVICE_AUDIOPHILE_2496 = 0x121434d6, 30 ICE1712_SUBDEVICE_DELTA410 = 0x121438d6, 31 ICE1712_SUBDEVICE_DELTA1010LT = 0x12143bd6, 32 ICE1712_SUBDEVICE_VX442 = 0x12143cd6, 33 } product_t; 34 35 #define NUM_CARDS 4 36 #define MAX_ADC 12 // + the output of the Digital mixer 37 #define MAX_DAC 10 38 #define SWAPPING_BUFFERS 2 39 #define SAMPLE_SIZE 4 40 #define MIN_BUFFER_FRAMES 64 41 #define MAX_BUFFER_FRAMES 2048 42 43 #define MAX_HARDWARE_VOLUME 10 44 45 #define PLAYBACK_BUFFER_SIZE (MAX_BUFFER_FRAMES * MAX_DAC * SAMPLE_SIZE) 46 #define RECORD_BUFFER_SIZE (MAX_BUFFER_FRAMES * MAX_ADC * SAMPLE_SIZE) 47 48 #define PLAYBACK_BUFFER_TOTAL_SIZE (PLAYBACK_BUFFER_SIZE * SWAPPING_BUFFERS) 49 #define RECORD_BUFFER_TOTAL_SIZE (RECORD_BUFFER_SIZE * SWAPPING_BUFFERS) 50 51 #define SPDIF_LEFT 8 52 #define SPDIF_RIGHT 9 53 #define MIXER_OUT_LEFT 10 54 #define MIXER_OUT_RIGHT 11 55 56 typedef enum { 57 NO_IN_NO_OUT = 0, 58 NO_IN_YES_OUT = 1, 59 YES_IN_NO_OUT = 2, 60 YES_IN_YES_OUT = 3, 61 } _spdif_config_ ; 62 63 typedef struct _midi_dev { 64 struct _ice1712_ *card; 65 void *driver; 66 void *cookie; 67 int32 count; 68 char name[64]; 69 } midi_dev; 70 71 typedef struct _codecCommLines 72 { 73 uint8 clock; 74 uint8 data_in; 75 uint8 data_out; 76 uint8 cs_mask; //a Mask for removing all Chip select 77 uint8 reserved[4]; 78 } codecCommLines; 79 80 typedef struct ChannelVolume 81 { 82 float Volume; 83 bool Mute; 84 } ChannelVolume; 85 86 typedef struct Ice1712_Settings 87 { 88 ChannelVolume Playback[MAX_HARDWARE_VOLUME]; 89 ChannelVolume Record[MAX_HARDWARE_VOLUME]; 90 91 //General Settings 92 uint8 Clock; //an index 93 uint8 BufferSize; //an index 94 uint8 DebugMode; //an index for debugging 95 96 //S/PDif Settings 97 uint8 OutFormat; //an index 98 uint8 Emphasis; //an index 99 uint8 CopyMode; //an index 100 101 //Output settings 102 uint8 Output[5]; //an index 103 104 uint8 Reserved[32]; 105 } Ice1712_Settings; 106 107 typedef struct ice1712 108 { 109 uint32 irq; 110 pci_info info; 111 char name[128]; 112 113 midi_dev midi_interf[2]; 114 115 uint32 Controller; //PCI_10 116 uint32 DDMA; //PCI_14 117 uint32 DMA_Path; //PCI_18 118 uint32 Multi_Track; //PCI_1C 119 120 uint8 eeprom_data[32]; 121 122 int8 nb_ADC; //Mono Channel 123 int8 nb_DAC; //Mono Channel 124 _spdif_config_ spdif_config; 125 int8 nb_MPU401; 126 127 product_t product; 128 129 //We hope all manufacturers will use same 130 //communication lines for speaking with codec 131 codecCommLines CommLines; 132 133 uint32 buffer; 134 bigtime_t played_time; 135 uint32 buffer_size; //in frames 136 uint32 frames_count; 137 138 //Output 139 area_id mem_id_pb; 140 void *phys_addr_pb, *log_addr_pb; 141 uint8 total_output_channels; 142 143 //Input 144 area_id mem_id_rec; 145 void *phys_addr_rec, *log_addr_rec; 146 uint8 total_input_channels; 147 148 sem_id buffer_ready_sem; 149 150 uint8 sampling_rate; //in the format of the register 151 uint32 lock_source; 152 153 Ice1712_Settings settings; 154 } ice1712; 155 156 status_t applySettings(ice1712 *card); 157 158 //For midi.c 159 extern int32 num_cards; 160 extern ice1712 cards[NUM_CARDS]; 161 162 //??????? 163 #define GPIO_SPDIF_STATUS 0x02 //Status 164 #define GPIO_SPDIF_CCLK 0x04 //data Clock 165 #define GPIO_SPDIF_DOUT 0x08 //data output 166 167 //For Delta 66 / Delta 44 168 #define DELTA66_DOUT 0x10 // data output 169 #define DELTA66_CLK 0x20 // clock 170 #define DELTA66_CODEC_CS_0 0x40 // AK4524 #0 171 #define DELTA66_CODEC_CS_1 0x80 // AK4524 #1 172 173 //For AudioPhile 2496 / Delta 410 174 #define AP2496_CLK 0x02 // clock 175 #define AP2496_DIN 0x04 // data input 176 #define AP2496_DOUT 0x08 // data output 177 #define AP2496_SPDIF_CS 0x10 // CS8427 chip select 178 #define AP2496_CODEC_CS 0x20 // AK4528 chip select 179 180 //For Delta 1010 LT 181 #define DELTA1010LT_CLK 0x02 // clock 182 #define DELTA1010LT_DIN 0x04 // data input 183 #define DELTA1010LT_DOUT 0x08 // data output 184 #define DELTA1010LT_CODEC_CS_0 0x00 // AK4524 #0 185 #define DELTA1010LT_CODEC_CS_1 0x10 // AK4524 #1 186 #define DELTA1010LT_CODEC_CS_2 0x20 // AK4524 #2 187 #define DELTA1010LT_CODEC_CS_3 0x30 // AK4524 #3 188 #define DELTA1010LT_SPDIF_CS 0x40 // CS8427 189 #define DELTA1010LT_CS_NONE 0x50 // All CS deselected 190 191 //For VX442 192 #define VX442_CLK 0x02 // clock 193 #define VX442_DIN 0x04 // data input 194 #define VX442_DOUT 0x08 // data output 195 #define VX442_SPDIF_CS 0x10 // CS8427 196 #define VX442_CODEC_CS_0 0x20 // ?? #0 197 #define VX442_CODEC_CS_1 0x40 // ?? #1 198 199 #define GPIO_I2C_DELAY 5 //Clock Delay for writing 200 //I2C data throw GPIO 201 202 //Register definition for the AK45xx codec (xx = 24 or 28) 203 #define AK45xx_CHIP_ADDRESS 0x02 //Chip address of the codec 204 #define AK45xx_RESET_REGISTER 0x01 205 #define AK45xx_CLOCK_FORMAT_REGISTER 0x02 206 //Other register are not defined cause they are not used, I'm very lazy... 207 208 //Register definition for the CS84xx codec (xx = 27) 209 #define CS84xx_CHIP_ADDRESS 0x10 //Chip address of the codec 210 #define CS84xx_CONTROL_1_PORT_REG 0x01 211 #define CS84xx_CONTROL_2_PORT_REG 0x02 212 #define CS84xx_DATA_FLOW_CONTROL_REG 0x03 213 #define CS84xx_CLOCK_SOURCE_REG 0x04 214 #define CS84xx_SERIAL_INPUT_FORMAT_REG 0x05 215 #define CS84xx_SERIAL_OUTPUT_FORMAT_REG 0x06 216 217 #define CS84xx_VERSION_AND_CHIP_ID 0x7F 218 //Other register are not defined cause they are not used, I'm very lazy... 219 220 221 /* A default switch for all suported product 222 switch (card->product) 223 { 224 case ICE1712_SUBDEVICE_DELTA1010 : 225 break; 226 case ICE1712_SUBDEVICE_DELTADIO2496 : 227 break; 228 case ICE1712_SUBDEVICE_DELTA66 : 229 break; 230 case ICE1712_SUBDEVICE_DELTA44 : 231 break; 232 case ICE1712_SUBDEVICE_AUDIOPHILE : 233 break; 234 case ICE1712_SUBDEVICE_DELTA410 : 235 break; 236 case ICE1712_SUBDEVICE_DELTA1010LT : 237 break; 238 case ICE1712_SUBDEVICE_VX442 : 239 break; 240 } 241 */ 242 243 //This map comes from ALSA sound drivers 244 #define E2PROM_MAP_SUBVENDOR_LOW 0x00 245 #define E2PROM_MAP_SUBVENDOR_HIGH 0x01 246 #define E2PROM_MAP_SUBDEVICE_LOW 0x02 247 #define E2PROM_MAP_SUBDEVICE_HIGH 0x03 248 #define E2PROM_MAP_SIZE 0x04 249 #define E2PROM_MAP_VERSION 0x05 250 #define E2PROM_MAP_CONFIG 0x06 251 #define E2PROM_MAP_ACL 0x07 252 #define E2PROM_MAP_I2S 0x08 253 #define E2PROM_MAP_SPDIF 0x09 254 #define E2PROM_MAP_GPIOMASK 0x0A 255 #define E2PROM_MAP_GPIOSTATE 0x0B 256 #define E2PROM_MAP_GPIODIR 0x0C 257 #define E2PROM_MAP_AC97MAIN 0x0D 258 #define E2PROM_MAP_AC97PCM 0x0F 259 #define E2PROM_MAP_AC97REC 0x11 260 #define E2PROM_MAP_AC97REC_SOURCE 0x13 261 #define E2PROM_MAP_DAC_ID 0x14 262 #define E2PROM_MAP_ADC_ID 0x18 263 #define E2PROM_MAP_EXTRA 0x1C 264 265 #endif 266