1 /* 2 * Copyright 2007-2012, Haiku, Inc. All Rights Reserved. 3 * Distributed under the terms of the MIT License. 4 * 5 * Authors: 6 * Ithamar Adema, ithamar AT unet DOT nl 7 * Axel Dörfler, axeld@pinc-software.de 8 */ 9 #ifndef _HDA_H_ 10 #define _HDA_H_ 11 12 #include <KernelExport.h> 13 #include <Drivers.h> 14 #include <PCI.h> 15 #include <PCI_x86.h> 16 17 #include <string.h> 18 #include <stdlib.h> 19 20 #ifndef HAIKU_TARGET_PLATFORM_HAIKU 21 # define DEVFS_PATH_FORMAT "audio/multi/hda/%lu" 22 # include <multi_audio.h> 23 #else 24 # define DEVFS_PATH_FORMAT "audio/hmulti/hda/%lu" 25 # include <hmulti_audio.h> 26 #endif 27 28 #include "hda_controller_defs.h" 29 #include "hda_codec_defs.h" 30 31 #define MAX_CARDS 4 32 33 /* values for the class_sub field for class_base = 0x04 (multimedia device) */ 34 #ifndef __HAIKU__ 35 # define PCI_hd_audio 3 36 #endif 37 38 #define HDA_MAX_AUDIO_GROUPS 15 39 #define HDA_MAX_CODECS 15 40 #define HDA_MAX_STREAMS 16 41 #define MAX_CODEC_RESPONSES 16 42 #define MAX_CODEC_UNSOL_RESPONSES 16 43 #define MAX_INPUTS 32 44 #define MAX_IO_WIDGETS 8 45 #define MAX_ASSOCIATIONS 16 46 #define MAX_ASSOCIATION_PINS 16 47 48 #define STREAM_MAX_BUFFERS 10 49 #define STREAM_MIN_BUFFERS 2 50 51 52 enum { 53 STREAM_PLAYBACK, 54 STREAM_RECORD 55 }; 56 57 struct hda_codec; 58 struct hda_stream; 59 struct hda_multi; 60 61 /*! This structure describes a single HDA compliant 62 controller. It contains a list of available streams 63 for use by the codecs contained, and the messaging queue 64 (verb/response) buffers for communication. 65 */ 66 struct hda_controller { 67 struct pci_info pci_info; 68 int32 opened; 69 const char* devfs_path; 70 71 area_id regs_area; 72 vuint8* regs; 73 uint32 irq; 74 bool msi; 75 76 uint16 codec_status; 77 uint32 num_input_streams; 78 uint32 num_output_streams; 79 uint32 num_bidir_streams; 80 81 uint32 corb_length; 82 uint32 rirb_length; 83 uint32 rirb_read_pos; 84 uint32 corb_write_pos; 85 area_id corb_rirb_pos_area; 86 corb_t* corb; 87 rirb_t* rirb; 88 uint32* stream_positions; 89 90 hda_codec* codecs[HDA_MAX_CODECS + 1]; 91 hda_codec* active_codec; 92 uint32 num_codecs; 93 94 hda_stream* streams[HDA_MAX_STREAMS]; 95 sem_id buffer_ready_sem; 96 97 uint8 Read8(uint32 reg) 98 { 99 return *(regs + reg); 100 } 101 102 uint16 Read16(uint32 reg) 103 { 104 return *(vuint16*)(regs + reg); 105 } 106 107 uint32 Read32(uint32 reg) 108 { 109 return *(vuint32*)(regs + reg); 110 } 111 112 void Write8(uint32 reg, uint8 value) 113 { 114 *(regs + reg) = value; 115 } 116 117 void Write16(uint32 reg, uint16 value) 118 { 119 *(vuint16*)(regs + reg) = value; 120 } 121 122 void Write32(uint32 reg, uint32 value) 123 { 124 *(vuint32*)(regs + reg) = value; 125 } 126 }; 127 128 /*! This structure describes a single stream of audio data, 129 which is can have multiple channels (for stereo or better). 130 */ 131 struct hda_stream { 132 uint32 id; /* HDA controller stream # */ 133 uint32 offset; /* HDA I/O/B descriptor offset */ 134 bool running; 135 spinlock lock; /* Write lock */ 136 uint32 type; 137 138 hda_controller* controller; 139 140 uint32 pin_widget; /* PIN Widget ID */ 141 uint32 io_widgets[MAX_IO_WIDGETS]; /* Input/Output Converter Widget ID */ 142 uint32 num_io_widgets; 143 144 uint32 sample_rate; 145 uint32 sample_format; 146 147 uint32 num_buffers; 148 uint32 num_channels; 149 uint32 buffer_length; /* size of buffer in samples */ 150 uint32 buffer_size; /* actual (aligned) size of buffer in bytes */ 151 uint32 sample_size; 152 uint8* buffers[STREAM_MAX_BUFFERS]; 153 /* Virtual addresses for buffer */ 154 phys_addr_t physical_buffers[STREAM_MAX_BUFFERS]; 155 /* Physical addresses for buffer */ 156 157 volatile bigtime_t real_time; 158 volatile uint64 frames_count; 159 uint32 last_link_frame_position; 160 volatile int32 buffer_cycle; 161 162 uint32 rate, bps; /* Samplerate & bits per sample */ 163 164 area_id buffer_area; 165 area_id buffer_descriptors_area; 166 phys_addr_t physical_buffer_descriptors; /* BDL physical address */ 167 168 int32 incorrect_position_count; 169 bool use_dma_position; 170 171 uint8 Read8(uint32 reg) 172 { 173 return controller->Read8(HDAC_STREAM_BASE + offset + reg); 174 } 175 176 uint16 Read16(uint32 reg) 177 { 178 return controller->Read16(HDAC_STREAM_BASE + offset + reg); 179 } 180 181 uint32 Read32(uint32 reg) 182 { 183 return controller->Read32(HDAC_STREAM_BASE + offset + reg); 184 } 185 186 void Write8(uint32 reg, uint8 value) 187 { 188 *(controller->regs + HDAC_STREAM_BASE + offset + reg) = value; 189 } 190 191 void Write16(uint32 reg, uint16 value) 192 { 193 *(vuint16*)(controller->regs + HDAC_STREAM_BASE + offset + reg) = value; 194 } 195 196 void Write32(uint32 reg, uint32 value) 197 { 198 *(vuint32*)(controller->regs + HDAC_STREAM_BASE + offset + reg) = value; 199 } 200 }; 201 202 struct hda_widget { 203 uint32 node_id; 204 205 uint32 num_inputs; 206 int32 active_input; 207 uint32 inputs[MAX_INPUTS]; 208 uint32 flags; 209 210 hda_widget_type type; 211 uint32 pm; 212 213 struct { 214 uint32 audio; 215 uint32 output_amplifier; 216 uint32 input_amplifier; 217 } capabilities; 218 219 union { 220 struct { 221 uint32 formats; 222 uint32 rates; 223 } io; 224 struct { 225 } mixer; 226 struct { 227 uint32 capabilities; 228 uint32 config; 229 } pin; 230 } d; 231 }; 232 233 struct hda_association { 234 uint32 index; 235 bool enabled; 236 uint32 pin_count; 237 uint32 pins[MAX_ASSOCIATION_PINS]; 238 }; 239 240 #define WIDGET_FLAG_OUTPUT_PATH 0x01 241 #define WIDGET_FLAG_INPUT_PATH 0x02 242 #define WIDGET_FLAG_WIDGET_PATH 0x04 243 244 /*! This structure describes a single Audio Function Group. An AFG 245 is a group of audio widgets which can be used to configure multiple 246 streams of audio either from the HDA Link to an output device (= playback) 247 or from an input device to the HDA link (= recording). 248 */ 249 struct hda_audio_group { 250 hda_codec* codec; 251 hda_widget widget; 252 253 /* Multi Audio API data */ 254 hda_stream* playback_stream; 255 hda_stream* record_stream; 256 257 uint32 widget_start; 258 uint32 widget_count; 259 260 uint32 association_count; 261 uint32 gpio; 262 263 hda_widget* widgets; 264 hda_association associations[MAX_ASSOCIATIONS]; 265 266 hda_multi* multi; 267 }; 268 269 /*! This structure describes a single codec module in the 270 HDA compliant device. This is a discrete component, which 271 can contain both Audio Function Groups, Modem Function Groups, 272 and other customized (vendor specific) Function Groups. 273 274 NOTE: ATM, only Audio Function Groups are supported. 275 */ 276 struct hda_codec { 277 uint16 vendor_id; 278 uint16 product_id; 279 uint8 major; 280 uint8 minor; 281 uint8 revision; 282 uint8 stepping; 283 uint8 addr; 284 285 uint32 quirks; 286 287 sem_id response_sem; 288 uint32 responses[MAX_CODEC_RESPONSES]; 289 uint32 response_count; 290 291 sem_id unsol_response_sem; 292 thread_id unsol_response_thread; 293 uint32 unsol_responses[MAX_CODEC_UNSOL_RESPONSES]; 294 uint32 unsol_response_read, unsol_response_write; 295 296 hda_audio_group* audio_groups[HDA_MAX_AUDIO_GROUPS]; 297 uint32 num_audio_groups; 298 299 struct hda_controller* controller; 300 }; 301 302 303 #define MULTI_CONTROL_FIRSTID 1024 304 #define MULTI_CONTROL_MASTERID 0 305 #define MULTI_MAX_CONTROLS 128 306 #define MULTI_MAX_CHANNELS 128 307 308 struct hda_multi_mixer_control { 309 hda_multi *multi; 310 int32 nid; 311 int32 type; 312 bool input; 313 uint32 mute; 314 uint32 gain; 315 uint32 capabilities; 316 int32 index; 317 multi_mix_control mix_control; 318 }; 319 320 321 struct hda_multi { 322 hda_audio_group *group; 323 hda_multi_mixer_control controls[MULTI_MAX_CONTROLS]; 324 uint32 control_count; 325 326 multi_channel_info chans[MULTI_MAX_CHANNELS]; 327 uint32 output_channel_count; 328 uint32 input_channel_count; 329 uint32 output_bus_channel_count; 330 uint32 input_bus_channel_count; 331 uint32 aux_bus_channel_count; 332 }; 333 334 335 /* driver.c */ 336 extern device_hooks gDriverHooks; 337 extern pci_module_info* gPci; 338 extern pci_x86_module_info* gPCIx86Module; 339 extern hda_controller gCards[MAX_CARDS]; 340 extern uint32 gNumCards; 341 342 /* hda_codec.c */ 343 const char* get_widget_location(uint32 location); 344 hda_widget* hda_audio_group_get_widget(hda_audio_group* audioGroup, uint32 nodeID); 345 346 status_t hda_audio_group_get_widgets(hda_audio_group* audioGroup, 347 hda_stream* stream); 348 hda_codec* hda_codec_new(hda_controller* controller, uint32 cad); 349 void hda_codec_delete(hda_codec* codec); 350 351 /* hda_multi_audio.c */ 352 status_t multi_audio_control(void* cookie, uint32 op, void* arg, size_t length); 353 354 /* hda_controller.c: Basic controller support */ 355 status_t hda_hw_init(hda_controller* controller); 356 void hda_hw_stop(hda_controller* controller); 357 void hda_hw_uninit(hda_controller* controller); 358 status_t hda_send_verbs(hda_codec* codec, corb_t* verbs, uint32* responses, 359 uint32 count); 360 status_t hda_verb_write(hda_codec* codec, uint32 nid, uint32 vid, uint16 payload); 361 status_t hda_verb_read(hda_codec* codec, uint32 nid, uint32 vid, uint32 *response); 362 363 /* hda_controller.c: Stream support */ 364 hda_stream* hda_stream_new(hda_audio_group* audioGroup, int type); 365 void hda_stream_delete(hda_stream* stream); 366 status_t hda_stream_setup_buffers(hda_audio_group* audioGroup, 367 hda_stream* stream, const char* desc); 368 status_t hda_stream_start(hda_controller* controller, hda_stream* stream); 369 status_t hda_stream_stop(hda_controller* controller, hda_stream* stream); 370 371 #endif /* _HDA_H_ */ 372