1 /* 2 * Copyright 2007-2012, Haiku, Inc. All Rights Reserved. 3 * Distributed under the terms of the MIT License. 4 * 5 * Authors: 6 * Ithamar Adema, ithamar AT unet DOT nl 7 * Axel Dörfler, axeld@pinc-software.de 8 */ 9 #ifndef _HDA_H_ 10 #define _HDA_H_ 11 12 #include <KernelExport.h> 13 #include <Drivers.h> 14 #include <PCI.h> 15 16 #include <string.h> 17 #include <stdlib.h> 18 19 #ifndef HAIKU_TARGET_PLATFORM_HAIKU 20 # define DEVFS_PATH_FORMAT "audio/multi/hda/%lu" 21 # include <multi_audio.h> 22 #else 23 # define DEVFS_PATH_FORMAT "audio/hmulti/hda/%lu" 24 # include <hmulti_audio.h> 25 #endif 26 27 #include "hda_controller_defs.h" 28 #include "hda_codec_defs.h" 29 30 #define MAX_CARDS 4 31 32 /* values for the class_sub field for class_base = 0x04 (multimedia device) */ 33 #ifndef __HAIKU__ 34 # define PCI_hd_audio 3 35 #endif 36 37 #define HDA_MAX_AUDIO_GROUPS 15 38 #define HDA_MAX_CODECS 15 39 #define HDA_MAX_STREAMS 16 40 #define MAX_CODEC_RESPONSES 16 41 #define MAX_CODEC_UNSOL_RESPONSES 16 42 #define MAX_INPUTS 32 43 #define MAX_IO_WIDGETS 8 44 #define MAX_ASSOCIATIONS 16 45 #define MAX_ASSOCIATION_PINS 16 46 47 #define STREAM_MAX_BUFFERS 10 48 #define STREAM_MIN_BUFFERS 2 49 50 51 enum { 52 STREAM_PLAYBACK, 53 STREAM_RECORD 54 }; 55 56 struct hda_codec; 57 struct hda_stream; 58 struct hda_multi; 59 60 /*! This structure describes a single HDA compliant 61 controller. It contains a list of available streams 62 for use by the codecs contained, and the messaging queue 63 (verb/response) buffers for communication. 64 */ 65 struct hda_controller { 66 struct pci_info pci_info; 67 vint32 opened; 68 const char* devfs_path; 69 70 area_id regs_area; 71 vuint8* regs; 72 uint32 irq; 73 74 uint16 codec_status; 75 uint32 num_input_streams; 76 uint32 num_output_streams; 77 uint32 num_bidir_streams; 78 79 uint32 corb_length; 80 uint32 rirb_length; 81 uint32 rirb_read_pos; 82 uint32 corb_write_pos; 83 area_id corb_rirb_pos_area; 84 corb_t* corb; 85 rirb_t* rirb; 86 uint32* stream_positions; 87 88 hda_codec* codecs[HDA_MAX_CODECS + 1]; 89 hda_codec* active_codec; 90 uint32 num_codecs; 91 92 hda_stream* streams[HDA_MAX_STREAMS]; 93 sem_id buffer_ready_sem; 94 95 uint8 Read8(uint32 reg) 96 { 97 return *(regs + reg); 98 } 99 100 uint16 Read16(uint32 reg) 101 { 102 return *(vuint16*)(regs + reg); 103 } 104 105 uint32 Read32(uint32 reg) 106 { 107 return *(vuint32*)(regs + reg); 108 } 109 110 void Write8(uint32 reg, uint8 value) 111 { 112 *(regs + reg) = value; 113 } 114 115 void Write16(uint32 reg, uint16 value) 116 { 117 *(vuint16*)(regs + reg) = value; 118 } 119 120 void Write32(uint32 reg, uint32 value) 121 { 122 *(vuint32*)(regs + reg) = value; 123 } 124 }; 125 126 /*! This structure describes a single stream of audio data, 127 which is can have multiple channels (for stereo or better). 128 */ 129 struct hda_stream { 130 uint32 id; /* HDA controller stream # */ 131 uint32 offset; /* HDA I/O/B descriptor offset */ 132 bool running; 133 spinlock lock; /* Write lock */ 134 uint32 type; 135 136 hda_controller* controller; 137 138 uint32 pin_widget; /* PIN Widget ID */ 139 uint32 io_widgets[MAX_IO_WIDGETS]; /* Input/Output Converter Widget ID */ 140 uint32 num_io_widgets; 141 142 uint32 sample_rate; 143 uint32 sample_format; 144 145 uint32 num_buffers; 146 uint32 num_channels; 147 uint32 buffer_length; /* size of buffer in samples */ 148 uint32 buffer_size; /* actual (aligned) size of buffer in bytes */ 149 uint32 sample_size; 150 uint8* buffers[STREAM_MAX_BUFFERS]; 151 /* Virtual addresses for buffer */ 152 phys_addr_t physical_buffers[STREAM_MAX_BUFFERS]; 153 /* Physical addresses for buffer */ 154 155 volatile bigtime_t real_time; 156 volatile uint64 frames_count; 157 uint32 last_link_frame_position; 158 volatile int32 buffer_cycle; 159 160 uint32 rate, bps; /* Samplerate & bits per sample */ 161 162 area_id buffer_area; 163 area_id buffer_descriptors_area; 164 phys_addr_t physical_buffer_descriptors; /* BDL physical address */ 165 166 int32 incorrect_position_count; 167 bool use_dma_position; 168 169 uint8 Read8(uint32 reg) 170 { 171 return controller->Read8(HDAC_STREAM_BASE + offset + reg); 172 } 173 174 uint16 Read16(uint32 reg) 175 { 176 return controller->Read16(HDAC_STREAM_BASE + offset + reg); 177 } 178 179 uint32 Read32(uint32 reg) 180 { 181 return controller->Read32(HDAC_STREAM_BASE + offset + reg); 182 } 183 184 void Write8(uint32 reg, uint8 value) 185 { 186 *(controller->regs + HDAC_STREAM_BASE + offset + reg) = value; 187 } 188 189 void Write16(uint32 reg, uint16 value) 190 { 191 *(vuint16*)(controller->regs + HDAC_STREAM_BASE + offset + reg) = value; 192 } 193 194 void Write32(uint32 reg, uint32 value) 195 { 196 *(vuint32*)(controller->regs + HDAC_STREAM_BASE + offset + reg) = value; 197 } 198 }; 199 200 struct hda_widget { 201 uint32 node_id; 202 203 uint32 num_inputs; 204 int32 active_input; 205 uint32 inputs[MAX_INPUTS]; 206 uint32 flags; 207 208 hda_widget_type type; 209 uint32 pm; 210 211 struct { 212 uint32 audio; 213 uint32 output_amplifier; 214 uint32 input_amplifier; 215 } capabilities; 216 217 union { 218 struct { 219 uint32 formats; 220 uint32 rates; 221 } io; 222 struct { 223 } mixer; 224 struct { 225 uint32 capabilities; 226 uint32 config; 227 } pin; 228 } d; 229 }; 230 231 struct hda_association { 232 uint32 index; 233 bool enabled; 234 uint32 pin_count; 235 uint32 pins[MAX_ASSOCIATION_PINS]; 236 }; 237 238 #define WIDGET_FLAG_OUTPUT_PATH 0x01 239 #define WIDGET_FLAG_INPUT_PATH 0x02 240 #define WIDGET_FLAG_WIDGET_PATH 0x04 241 242 /*! This structure describes a single Audio Function Group. An AFG 243 is a group of audio widgets which can be used to configure multiple 244 streams of audio either from the HDA Link to an output device (= playback) 245 or from an input device to the HDA link (= recording). 246 */ 247 struct hda_audio_group { 248 hda_codec* codec; 249 hda_widget widget; 250 251 /* Multi Audio API data */ 252 hda_stream* playback_stream; 253 hda_stream* record_stream; 254 255 uint32 widget_start; 256 uint32 widget_count; 257 258 uint32 association_count; 259 uint32 gpio; 260 261 hda_widget* widgets; 262 hda_association associations[MAX_ASSOCIATIONS]; 263 264 hda_multi* multi; 265 }; 266 267 /*! This structure describes a single codec module in the 268 HDA compliant device. This is a discrete component, which 269 can contain both Audio Function Groups, Modem Function Groups, 270 and other customized (vendor specific) Function Groups. 271 272 NOTE: ATM, only Audio Function Groups are supported. 273 */ 274 struct hda_codec { 275 uint16 vendor_id; 276 uint16 product_id; 277 uint8 major; 278 uint8 minor; 279 uint8 revision; 280 uint8 stepping; 281 uint8 addr; 282 283 uint32 quirks; 284 285 sem_id response_sem; 286 uint32 responses[MAX_CODEC_RESPONSES]; 287 uint32 response_count; 288 289 sem_id unsol_response_sem; 290 thread_id unsol_response_thread; 291 uint32 unsol_responses[MAX_CODEC_UNSOL_RESPONSES]; 292 uint32 unsol_response_read, unsol_response_write; 293 294 hda_audio_group* audio_groups[HDA_MAX_AUDIO_GROUPS]; 295 uint32 num_audio_groups; 296 297 struct hda_controller* controller; 298 }; 299 300 301 #define MULTI_CONTROL_FIRSTID 1024 302 #define MULTI_CONTROL_MASTERID 0 303 #define MULTI_MAX_CONTROLS 128 304 #define MULTI_MAX_CHANNELS 128 305 306 struct hda_multi_mixer_control { 307 hda_multi *multi; 308 int32 nid; 309 int32 type; 310 bool input; 311 uint32 mute; 312 uint32 gain; 313 uint32 capabilities; 314 int32 index; 315 multi_mix_control mix_control; 316 }; 317 318 319 struct hda_multi { 320 hda_audio_group *group; 321 hda_multi_mixer_control controls[MULTI_MAX_CONTROLS]; 322 uint32 control_count; 323 324 multi_channel_info chans[MULTI_MAX_CHANNELS]; 325 uint32 output_channel_count; 326 uint32 input_channel_count; 327 uint32 output_bus_channel_count; 328 uint32 input_bus_channel_count; 329 uint32 aux_bus_channel_count; 330 }; 331 332 333 /* driver.c */ 334 extern device_hooks gDriverHooks; 335 extern pci_module_info* gPci; 336 extern hda_controller gCards[MAX_CARDS]; 337 extern uint32 gNumCards; 338 339 /* hda_codec.c */ 340 const char* get_widget_location(uint32 location); 341 hda_widget* hda_audio_group_get_widget(hda_audio_group* audioGroup, uint32 nodeID); 342 343 status_t hda_audio_group_get_widgets(hda_audio_group* audioGroup, 344 hda_stream* stream); 345 hda_codec* hda_codec_new(hda_controller* controller, uint32 cad); 346 void hda_codec_delete(hda_codec* codec); 347 348 /* hda_multi_audio.c */ 349 status_t multi_audio_control(void* cookie, uint32 op, void* arg, size_t length); 350 351 /* hda_controller.c: Basic controller support */ 352 status_t hda_hw_init(hda_controller* controller); 353 void hda_hw_stop(hda_controller* controller); 354 void hda_hw_uninit(hda_controller* controller); 355 status_t hda_send_verbs(hda_codec* codec, corb_t* verbs, uint32* responses, 356 uint32 count); 357 status_t hda_verb_write(hda_codec* codec, uint32 nid, uint32 vid, uint16 payload); 358 status_t hda_verb_read(hda_codec* codec, uint32 nid, uint32 vid, uint32 *response); 359 360 /* hda_controller.c: Stream support */ 361 hda_stream* hda_stream_new(hda_audio_group* audioGroup, int type); 362 void hda_stream_delete(hda_stream* stream); 363 status_t hda_stream_setup_buffers(hda_audio_group* audioGroup, 364 hda_stream* stream, const char* desc); 365 status_t hda_stream_start(hda_controller* controller, hda_stream* stream); 366 status_t hda_stream_stop(hda_controller* controller, hda_stream* stream); 367 368 #endif /* _HDA_H_ */ 369