1 #ifndef _HDA_H_ 2 #define _HDA_H_ 3 4 #include <drivers/KernelExport.h> 5 #include <drivers/Drivers.h> 6 #include <drivers/PCI.h> 7 8 #include <string.h> 9 #include <stdlib.h> 10 11 #ifdef COMPILE_FOR_R5 12 #define DEVFS_PATH_FORMAT "audio/multi/hda/%lu" 13 #include <multi_audio.h> 14 #else 15 #define DEVFS_PATH_FORMAT "audio/hmulti/hda/%lu" 16 #include <hmulti_audio.h> 17 #endif 18 19 #include "hda_controller_defs.h" 20 #include "hda_codec_defs.h" 21 22 #define MAXCARDS 4 23 24 /* values for the class_sub field for class_base = 0x04 (multimedia device) */ 25 #define PCI_hd_audio 3 26 27 #define HDA_MAXAFGS 15 28 #define HDA_MAXCODECS 15 29 #define HDA_MAXSTREAMS 16 30 #define MAX_CODEC_RESPONSES 10 31 #define MAXINPUTS 32 32 33 /* FIXME: Find out why we need so much! */ 34 #define DEFAULT_FRAMESPERBUF 4096 35 36 typedef struct hda_controller_s hda_controller; 37 typedef struct hda_codec_s hda_codec; 38 typedef struct hda_afg_s hda_afg; 39 40 #define STRMAXBUF 10 41 #define STRMINBUF 2 42 43 enum { 44 STRM_PLAYBACK, 45 STRM_RECORD 46 }; 47 48 /* hda_stream_info 49 * 50 * This structure describes a single stream of audio data, 51 * which is can have multiple channels (for stereo or better). 52 */ 53 54 typedef struct hda_stream_info_s { 55 uint32 id; /* HDA controller stream # */ 56 uint32 off; /* HDA I/O/B descriptor offset */ 57 bool running; /* Is this stream active? */ 58 spinlock lock; /* Write lock */ 59 60 uint32 pin_wid; /* PIN Widget ID */ 61 uint32 io_wid; /* Input/Output Converter Widget ID */ 62 63 uint32 samplerate; 64 uint32 sampleformat; 65 66 uint32 num_buffers; 67 uint32 num_channels; 68 uint32 buffer_length; /* size of buffer in samples */ 69 uint32 sample_size; 70 void* buffers[STRMAXBUF]; /* Virtual addresses for buffer */ 71 uint32 buffers_pa[STRMAXBUF]; /* Physical addresses for buffer */ 72 sem_id buffer_ready_sem; 73 bigtime_t real_time; 74 uint32 frames_count; 75 uint32 buffer_cycle; 76 77 area_id buffer_area; 78 area_id bdl_area; 79 uint32 bdl_pa; /* BDL physical address */ 80 } hda_stream; 81 82 /* hda_afg 83 * 84 * This structure describes a single Audio Function Group. An afg 85 * is a group of audio widgets which can be used to configure multiple 86 * streams of audio either from the HDA Link to an output device (= playback) 87 * or from an input device to the HDA link (= recording). 88 */ 89 90 struct hda_afg_s { 91 hda_codec* codec; 92 93 /* Multi Audio API data */ 94 hda_stream* playback_stream; 95 hda_stream* record_stream; 96 97 98 uint32 root_nid, 99 wid_start, 100 wid_count; 101 102 uint32 deffmts, 103 defrates, 104 defpm; 105 106 struct { 107 uint32 num_inputs; 108 int32 active_input; 109 uint32 inputs[MAXINPUTS]; 110 uint32 flags; 111 112 hda_widget_type type; 113 uint32 pm; 114 115 union { 116 struct { 117 uint32 formats; 118 uint32 rates; 119 } output; 120 struct { 121 uint32 formats; 122 uint32 rates; 123 } input; 124 struct { 125 } mixer; 126 struct { 127 uint32 output; 128 uint32 input; 129 pin_dev_type device; 130 } pin; 131 } d; 132 } *widgets; 133 }; 134 135 /* hda_codec 136 * 137 * This structure describes a single codec module in the 138 * HDA compliant device. This is a discrete component, which 139 * can contain both Audio Function Groups, Modem Function Groups, 140 * and other customized (vendor specific) Function Groups. 141 * 142 * NOTE: Atm, only Audio Function Groups are supported. 143 */ 144 145 struct hda_codec_s { 146 uint16 vendor_id; 147 uint16 product_id; 148 uint8 hda_rev; 149 uint16 rev_stepping; 150 uint8 addr; 151 152 sem_id response_sem; 153 uint32 responses[MAX_CODEC_RESPONSES]; 154 uint32 response_count; 155 156 hda_afg* afgs[HDA_MAXAFGS]; 157 uint32 num_afgs; 158 159 struct hda_controller_s* ctrlr; 160 }; 161 162 /* hda_controller 163 * 164 * This structure describes a single HDA compliant 165 * controller. It contains a list of available streams 166 * for use by the codecs contained, and the messaging queue 167 * (verb/response) buffers for communication. 168 */ 169 170 struct hda_controller_s { 171 pci_info pcii; 172 vuint32 opened; 173 const char* devfs_path; 174 175 area_id regs_area; 176 vuint8* regs; 177 uint32 irq; 178 179 uint16 codecsts; 180 uint32 num_input_streams; 181 uint32 num_output_streams; 182 uint32 num_bidir_streams; 183 184 uint32 corblen; 185 uint32 rirblen; 186 uint32 rirbrp; 187 uint32 corbwp; 188 area_id rb_area; 189 corb_t* corb; 190 rirb_t* rirb; 191 192 hda_codec* codecs[HDA_MAXCODECS]; 193 uint32 num_codecs; 194 195 hda_stream* streams[HDA_MAXSTREAMS]; 196 }; 197 198 /* driver.c */ 199 extern device_hooks driver_hooks; 200 extern pci_module_info* pci; 201 extern hda_controller cards[MAXCARDS]; 202 extern uint32 num_cards; 203 204 /* hda_codec.c */ 205 hda_codec* hda_codec_new(hda_controller* ctrlr, uint32 cad); 206 void hda_codec_delete(hda_codec*); 207 208 /* hda_multi_audio.c */ 209 status_t multi_audio_control(void* cookie, uint32 op, void* arg, size_t len); 210 211 /* hda_controller.c: Basic controller support */ 212 status_t hda_hw_init(hda_controller* ctrlr); 213 void hda_hw_stop(hda_controller* ctrlr); 214 void hda_hw_uninit(hda_controller* ctrlr); 215 status_t hda_send_verbs(hda_codec* codec, corb_t* verbs, uint32* responses, int count); 216 217 /* hda_controller.c: Stream support */ 218 hda_stream* hda_stream_new(hda_controller* ctrlr, int type); 219 void hda_stream_delete(hda_stream* s); 220 status_t hda_stream_setup_buffers(hda_afg* afg, hda_stream* s, const char* desc); 221 status_t hda_stream_start(hda_controller* ctrlr, hda_stream* s); 222 status_t hda_stream_stop(hda_controller* ctrlr, hda_stream* s); 223 status_t hda_stream_check_intr(hda_controller* ctrlr, hda_stream* s); 224 225 #endif /* _HDA_H_ */ 226