13895766dSshatty // **************************************************************************** 23895766dSshatty // 33895766dSshatty // CDspCommObject.H 43895766dSshatty // 53895766dSshatty // Include file for EchoGals generic driver DSP interface base class. 63895766dSshatty // 73895766dSshatty // ---------------------------------------------------------------------------- 83895766dSshatty // 9c2ddc71cSJérôme Duval // ---------------------------------------------------------------------------- 10c2ddc71cSJérôme Duval // 11626bc4beSJérôme Duval // This file is part of Echo Digital Audio's generic driver library. 12626bc4beSJérôme Duval // Copyright Echo Digital Audio Corporation (c) 1998 - 2005 133895766dSshatty // All rights reserved 143895766dSshatty // www.echoaudio.com 153895766dSshatty // 16626bc4beSJérôme Duval // This library is free software; you can redistribute it and/or 17626bc4beSJérôme Duval // modify it under the terms of the GNU Lesser General Public 18626bc4beSJérôme Duval // License as published by the Free Software Foundation; either 19626bc4beSJérôme Duval // version 2.1 of the License, or (at your option) any later version. 203895766dSshatty // 21626bc4beSJérôme Duval // This library is distributed in the hope that it will be useful, 22c2ddc71cSJérôme Duval // but WITHOUT ANY WARRANTY; without even the implied warranty of 23626bc4beSJérôme Duval // MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU 24626bc4beSJérôme Duval // Lesser General Public License for more details. 253895766dSshatty // 26626bc4beSJérôme Duval // You should have received a copy of the GNU Lesser General Public 27626bc4beSJérôme Duval // License along with this library; if not, write to the Free Software 28626bc4beSJérôme Duval // Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA 293895766dSshatty // 303895766dSshatty // **************************************************************************** 313895766dSshatty 323895766dSshatty #ifndef _DSPCOMMOBJECT_ 333895766dSshatty #define _DSPCOMMOBJECT_ 343895766dSshatty 353895766dSshatty #ifdef _DEBUG 363895766dSshatty #ifdef ECHO_WDM 373895766dSshatty #pragma optimize("",off) 383895766dSshatty #endif 393895766dSshatty #endif 403895766dSshatty 413895766dSshatty #ifdef _WIN32 423895766dSshatty 433895766dSshatty // Must match structure alignment w/DSP 443895766dSshatty #pragma pack( push, 2 ) 453895766dSshatty 463895766dSshatty #endif 473895766dSshatty 483895766dSshatty #include "OsSupport.h" 493895766dSshatty #include "CDaffyDuck.h" 503895766dSshatty 513895766dSshatty /**************************************************************************** 523895766dSshatty 533895766dSshatty Lots of different defines for the different cards 543895766dSshatty 553895766dSshatty ****************************************************************************/ 563895766dSshatty 573895766dSshatty 583895766dSshatty //================================================================================== 593895766dSshatty // 603895766dSshatty // Macros to convert to and from generic driver mixer values. Since it can be tough 613895766dSshatty // to do floating point math in a driver, the generic driver uses fixed-point values. 623895766dSshatty // The numbers are in a 24.8 format; that is, the upper 24 bits are the integer part 633895766dSshatty // of the number and the lower 8 bits represent the fractional part. In this scheme, 643895766dSshatty // a value of 0x180 would be equal to 1.5. 653895766dSshatty // 663895766dSshatty // Since the DSP usually wants 8 bit integer gains, the following macros are useful. 673895766dSshatty // 683895766dSshatty //================================================================================== 693895766dSshatty 703895766dSshatty #define GENERIC_TO_DSP(iValue) ((iValue + 0x80) >> 8) 713895766dSshatty #define DSP_TO_GENERIC(iValue) (iValue << 8) 723895766dSshatty 733895766dSshatty 743895766dSshatty //================================================================================== 753895766dSshatty // 763895766dSshatty // Max inputs and outputs 773895766dSshatty // 783895766dSshatty //================================================================================== 793895766dSshatty 803895766dSshatty #define DSP_MAXAUDIOINPUTS 16 // Max audio input channels 813895766dSshatty #define DSP_MAXAUDIOOUTPUTS 16 // Max audio output channels 823895766dSshatty #define DSP_MAXPIPES 32 // Max total pipes (input + output) 833895766dSshatty 843895766dSshatty 853895766dSshatty //================================================================================== 863895766dSshatty // 873895766dSshatty // These are the offsets for the memory-mapped DSP registers; the DSP base 883895766dSshatty // address is treated as the start of a DWORD array. 893895766dSshatty // 903895766dSshatty //================================================================================== 913895766dSshatty 923895766dSshatty #define CHI32_CONTROL_REG 4 933895766dSshatty #define CHI32_STATUS_REG 5 943895766dSshatty #define CHI32_VECTOR_REG 6 953895766dSshatty #define CHI32_DATA_REG 7 963895766dSshatty 973895766dSshatty 983895766dSshatty //================================================================================== 993895766dSshatty // 1003895766dSshatty // Interesting bits within the DSP registers 1013895766dSshatty // 1023895766dSshatty //================================================================================== 1033895766dSshatty 1043895766dSshatty #define CHI32_VECTOR_BUSY 0x00000001 1053895766dSshatty #define CHI32_STATUS_REG_HF3 0x00000008 1063895766dSshatty #define CHI32_STATUS_REG_HF4 0x00000010 1073895766dSshatty #define CHI32_STATUS_REG_HF5 0x00000020 1083895766dSshatty #define CHI32_STATUS_HOST_READ_FULL 0x00000004 1093895766dSshatty #define CHI32_STATUS_HOST_WRITE_EMPTY 0x00000002 1103895766dSshatty #define CHI32_STATUS_IRQ 0x00000040 1113895766dSshatty 1123895766dSshatty 1133895766dSshatty //================================================================================== 1143895766dSshatty // 1153895766dSshatty // DSP commands sent via slave mode; these are sent to the DSP by 1163895766dSshatty // CDspCommObject::Write_DSP 1173895766dSshatty // 1183895766dSshatty //================================================================================== 1193895766dSshatty 1203895766dSshatty #define DSP_FNC_SET_COMMPAGE_ADDR 0x02 121c2ddc71cSJérôme Duval #define DSP_FNC_LOAD_LAYLA_ASIC 0xa0 122c2ddc71cSJérôme Duval #define DSP_FNC_LOAD_GINA24_ASIC 0xa0 123c2ddc71cSJérôme Duval #define DSP_FNC_LOAD_MONA_PCI_CARD_ASIC 0xa0 124c2ddc71cSJérôme Duval #define DSP_FNC_LOAD_LAYLA24_PCI_CARD_ASIC 0xa0 125c2ddc71cSJérôme Duval #define DSP_FNC_LOAD_MONA_EXTERNAL_ASIC 0xa1 126c2ddc71cSJérôme Duval #define DSP_FNC_LOAD_LAYLA24_EXTERNAL_ASIC 0xa1 127c2ddc71cSJérôme Duval #define DSP_FNC_LOAD_3G_ASIC 0xa0 1283895766dSshatty 1293895766dSshatty 1303895766dSshatty //================================================================================== 1313895766dSshatty // 1323895766dSshatty // Defines to handle the MIDI input state engine; these are used to properly 1333895766dSshatty // extract MIDI time code bytes and their timestamps from the MIDI input stream. 1343895766dSshatty // 1353895766dSshatty //================================================================================== 1363895766dSshatty 137c2ddc71cSJérôme Duval #define MIDI_IN_STATE_NORMAL 0 138c2ddc71cSJérôme Duval #define MIDI_IN_STATE_TS_HIGH 1 139c2ddc71cSJérôme Duval #define MIDI_IN_STATE_TS_LOW 2 140c2ddc71cSJérôme Duval #define MIDI_IN_STATE_F1_DATA 3 1413895766dSshatty 142c2ddc71cSJérôme Duval #define MIDI_IN_SKIP_DATA ((DWORD)-1) 1433895766dSshatty 1443895766dSshatty 1453895766dSshatty /*------------------------------------------------------------------------------------ 1463895766dSshatty 1473895766dSshatty Setting the sample rates on Layla24 is somewhat schizophrenic. 1483895766dSshatty 1493895766dSshatty For standard rates, it works exactly like Mona and Gina24. That is, for 1503895766dSshatty 8, 11.025, 16, 22.05, 32, 44.1, 48, 88.2, and 96 kHz, you just set the 1513895766dSshatty appropriate bits in the control register and write the control register. 1523895766dSshatty 1533895766dSshatty In order to support MIDI time code sync (and possibly SMPTE LTC sync in 1543895766dSshatty the future), Layla24 also has "continuous sample rate mode". In this mode, 1553895766dSshatty Layla24 can generate any sample rate between 25 and 50 kHz inclusive, or 1563895766dSshatty 50 to 100 kHz inclusive for double speed mode. 1573895766dSshatty 1583895766dSshatty To use continuous mode: 1593895766dSshatty 1603895766dSshatty -Set the clock select bits in the control register to 0xe (see the #define 1613895766dSshatty below) 1623895766dSshatty 1633895766dSshatty -Set double-speed mode if you want to use sample rates above 50 kHz 1643895766dSshatty 1653895766dSshatty -Write the control register as you would normally 1663895766dSshatty 1673895766dSshatty -Now, you need to set the frequency register. First, you need to determine the 1683895766dSshatty value for the frequency register. This is given by the following formula: 1693895766dSshatty 1703895766dSshatty frequency_reg = (LAYLA24_MAGIC_NUMBER / sample_rate) - 2 1713895766dSshatty 1723895766dSshatty Note the #define below for the magic number 1733895766dSshatty 1743895766dSshatty -Wait for the DSP handshake 1753895766dSshatty -Write the frequency_reg value to the dwSampleRate field of the comm page 1763895766dSshatty -Send the vector command SET_LAYLA24_FREQUENCY_REG (see vmonkey.h) 1773895766dSshatty 1783895766dSshatty Once you have set the control register up for continuous mode, you can just 1793895766dSshatty write the frequency register to change the sample rate. This could be 1803895766dSshatty used for MIDI time code sync. For MTC sync, the control register is set for 1813895766dSshatty continuous mode. The driver then just keeps writing the 1823895766dSshatty SET_LAYLA24_FREQUENCY_REG command. 1833895766dSshatty 1843895766dSshatty ----------------------------------------------------------------------------------*/ 1853895766dSshatty 1863895766dSshatty #define LAYLA24_MAGIC_NUMBER 677376000 1873895766dSshatty #define LAYLA24_CONTINUOUS_CLOCK 0x000e 1883895766dSshatty 1893895766dSshatty 1903895766dSshatty //================================================================================== 1913895766dSshatty // 1923895766dSshatty // DSP vector commands 1933895766dSshatty // 1943895766dSshatty //================================================================================== 1953895766dSshatty 1963895766dSshatty #define DSP_VC_RESET 0x80ff 1973895766dSshatty 1983895766dSshatty #ifndef DSP_56361 1993895766dSshatty 2003895766dSshatty // 2013895766dSshatty // Vector commands for families that only use the 56301 2023895766dSshatty // Only used for Darla20, Gina20, Layla20, and Darla24 2033895766dSshatty // 2043895766dSshatty #define DSP_VC_ACK_INT 0x8073 2053895766dSshatty #define DSP_VC_SET_VMIXER_GAIN 0x0000 // Not used, only for compile 2063895766dSshatty #define DSP_VC_START_TRANSFER 0x0075 // Handshke rqd. 2073895766dSshatty #define DSP_VC_METERS_ON 0x0079 2083895766dSshatty #define DSP_VC_METERS_OFF 0x007b 2093895766dSshatty #define DSP_VC_UPDATE_OUTVOL 0x007d // Handshke rqd. 2103895766dSshatty #define DSP_VC_UPDATE_INGAIN 0x007f // Handshke rqd. 2113895766dSshatty #define DSP_VC_ADD_AUDIO_BUFFER 0x0081 // Handshke rqd. 2123895766dSshatty #define DSP_VC_TEST_ASIC 0x00eb 2133895766dSshatty #define DSP_VC_UPDATE_CLOCKS 0x00ef // Handshke rqd. 2143895766dSshatty #define DSP_VC_SET_LAYLA_SAMPLE_RATE 0x00f1 // Handshke rqd. 2153895766dSshatty #define DSP_VC_SET_GD_AUDIO_STATE 0x00f1 // Handshke rqd. 2163895766dSshatty #define DSP_VC_WRITE_CONTROL_REG 0x00f1 // Handshke rqd. 2173895766dSshatty #define DSP_VC_MIDI_WRITE 0x00f5 // Handshke rqd. 2183895766dSshatty #define DSP_VC_STOP_TRANSFER 0x00f7 // Handshke rqd. 2193895766dSshatty #define DSP_VC_UPDATE_FLAGS 0x00fd // Handshke rqd. 2203895766dSshatty #define DSP_VC_GO_COMATOSE 0x00f9 2213895766dSshatty 2223895766dSshatty #else 2233895766dSshatty 2243895766dSshatty // 2253895766dSshatty // Vector commands for families that use either the 56301 or 56361 2263895766dSshatty // 2273895766dSshatty #define DSP_VC_ACK_INT 0x80F5 2283895766dSshatty #define DSP_VC_SET_VMIXER_GAIN 0x00DB // Handshke rqd. 2293895766dSshatty #define DSP_VC_START_TRANSFER 0x00DD // Handshke rqd. 2303895766dSshatty #define DSP_VC_METERS_ON 0x00EF 2313895766dSshatty #define DSP_VC_METERS_OFF 0x00F1 2323895766dSshatty #define DSP_VC_UPDATE_OUTVOL 0x00E3 // Handshke rqd. 2333895766dSshatty #define DSP_VC_UPDATE_INGAIN 0x00E5 // Handshke rqd. 2343895766dSshatty #define DSP_VC_ADD_AUDIO_BUFFER 0x00E1 // Handshke rqd. 2353895766dSshatty #define DSP_VC_TEST_ASIC 0x00ED 2363895766dSshatty #define DSP_VC_UPDATE_CLOCKS 0x00E9 // Handshke rqd. 2373895766dSshatty #define DSP_VC_SET_LAYLA24_FREQUENCY_REG 0x00E9 // Handshke rqd. 2383895766dSshatty #define DSP_VC_SET_LAYLA_SAMPLE_RATE 0x00EB // Handshke rqd. 2393895766dSshatty #define DSP_VC_SET_GD_AUDIO_STATE 0x00EB // Handshke rqd. 2403895766dSshatty #define DSP_VC_WRITE_CONTROL_REG 0x00EB // Handshke rqd. 2413895766dSshatty #define DSP_VC_MIDI_WRITE 0x00E7 // Handshke rqd. 2423895766dSshatty #define DSP_VC_STOP_TRANSFER 0x00DF // Handshke rqd. 2433895766dSshatty #define DSP_VC_UPDATE_FLAGS 0x00FB // Handshke rqd. 2443895766dSshatty #define DSP_VC_GO_COMATOSE 0x00d9 2453895766dSshatty 2463895766dSshatty #endif 2473895766dSshatty 2483895766dSshatty 2493895766dSshatty //================================================================================== 2503895766dSshatty // 2513895766dSshatty // Timeouts 2523895766dSshatty // 2533895766dSshatty //================================================================================== 2543895766dSshatty 255c2ddc71cSJérôme Duval #define HANDSHAKE_TIMEOUT 20000 // SendVector command timeout in microseconds 2563895766dSshatty #define MIDI_OUT_DELAY_USEC 2000 // How long to wait after MIDI fills up 2573895766dSshatty 2583895766dSshatty 2593895766dSshatty //================================================================================== 2603895766dSshatty // 2613895766dSshatty // Flags for dwFlags field in the comm page 2623895766dSshatty // 2633895766dSshatty //================================================================================== 2643895766dSshatty 2653895766dSshatty #define DSP_FLAG_MIDI_INPUT 0x0001 // Enable MIDI input 266c2ddc71cSJérôme Duval #define DSP_FLAG_SPDIF_NONAUDIO 0x0002 // Sets the "non-audio" bit in the S/PDIF out 267c2ddc71cSJérôme Duval // status bits. Clear this flag for audio data; 268c2ddc71cSJérôme Duval // set it for AC3 or WMA or some such 2693895766dSshatty #define DSP_FLAG_PROFESSIONAL_SPDIF 0x0008 // 1 Professional, 0 Consumer 2703895766dSshatty 2713895766dSshatty 272c2ddc71cSJérôme Duval 2733895766dSshatty //================================================================================== 2743895766dSshatty // 2753895766dSshatty // Clock detect bits reported by the DSP for Gina20, Layla20, Darla24, and Mia 2763895766dSshatty // 2773895766dSshatty //================================================================================== 2783895766dSshatty 2793895766dSshatty #define GLDM_CLOCK_DETECT_BIT_WORD 0x0002 2803895766dSshatty #define GLDM_CLOCK_DETECT_BIT_SUPER 0x0004 2813895766dSshatty #define GLDM_CLOCK_DETECT_BIT_SPDIF 0x0008 2823895766dSshatty #define GLDM_CLOCK_DETECT_BIT_ESYNC 0x0010 2833895766dSshatty 2843895766dSshatty 2853895766dSshatty //================================================================================== 2863895766dSshatty // 2873895766dSshatty // Clock detect bits reported by the DSP for Gina24, Mona, and Layla24 2883895766dSshatty // 2893895766dSshatty //================================================================================== 2903895766dSshatty 2913895766dSshatty #define GML_CLOCK_DETECT_BIT_WORD96 0x0002 2923895766dSshatty #define GML_CLOCK_DETECT_BIT_WORD48 0x0004 2933895766dSshatty #define GML_CLOCK_DETECT_BIT_SPDIF48 0x0008 2943895766dSshatty #define GML_CLOCK_DETECT_BIT_SPDIF96 0x0010 2953895766dSshatty #define GML_CLOCK_DETECT_BIT_WORD (GML_CLOCK_DETECT_BIT_WORD96|GML_CLOCK_DETECT_BIT_WORD48) 2963895766dSshatty #define GML_CLOCK_DETECT_BIT_SPDIF (GML_CLOCK_DETECT_BIT_SPDIF48|GML_CLOCK_DETECT_BIT_SPDIF96) 2973895766dSshatty #define GML_CLOCK_DETECT_BIT_ESYNC 0x0020 2983895766dSshatty #define GML_CLOCK_DETECT_BIT_ADAT 0x0040 2993895766dSshatty 3003895766dSshatty 3013895766dSshatty //================================================================================== 3023895766dSshatty // 3033895766dSshatty // Gina/Darla clock states 3043895766dSshatty // 3053895766dSshatty //================================================================================== 3063895766dSshatty 3073895766dSshatty #define GD_CLOCK_NOCHANGE 0 3083895766dSshatty #define GD_CLOCK_44 1 3093895766dSshatty #define GD_CLOCK_48 2 3103895766dSshatty #define GD_CLOCK_SPDIFIN 3 3113895766dSshatty #define GD_CLOCK_UNDEF 0xff 3123895766dSshatty 3133895766dSshatty 3143895766dSshatty //================================================================================== 3153895766dSshatty // 3163895766dSshatty // Gina/Darla S/PDIF status bits 3173895766dSshatty // 3183895766dSshatty //================================================================================== 3193895766dSshatty 3203895766dSshatty #define GD_SPDIF_STATUS_NOCHANGE 0 3213895766dSshatty #define GD_SPDIF_STATUS_44 1 3223895766dSshatty #define GD_SPDIF_STATUS_48 2 3233895766dSshatty #define GD_SPDIF_STATUS_UNDEF 0xff 3243895766dSshatty 3253895766dSshatty 3263895766dSshatty //================================================================================== 3273895766dSshatty // 328c2ddc71cSJérôme Duval // Layla20 output clocks 329c2ddc71cSJérôme Duval // 330c2ddc71cSJérôme Duval //================================================================================== 331c2ddc71cSJérôme Duval 332c2ddc71cSJérôme Duval #define LAYLA20_OUTPUT_CLOCK_SUPER 0 333c2ddc71cSJérôme Duval #define LAYLA20_OUTPUT_CLOCK_WORD 1 334c2ddc71cSJérôme Duval 335c2ddc71cSJérôme Duval 336c2ddc71cSJérôme Duval //================================================================================== 337c2ddc71cSJérôme Duval // 3383895766dSshatty // Return values from the DSP when ASIC is loaded 3393895766dSshatty // 3403895766dSshatty //================================================================================== 3413895766dSshatty 342c2ddc71cSJérôme Duval #define ASIC_LOADED 0x1 3433895766dSshatty #define ASIC_NOT_LOADED 0x0 3443895766dSshatty 3453895766dSshatty 3463895766dSshatty //================================================================================== 3473895766dSshatty // 348*be188ae1SJérôme Duval //// DSP Audio formats 3493895766dSshatty // 3503895766dSshatty // These are the audio formats that the DSP can transfer 3513895766dSshatty // via input and output pipes. LE means little-endian, 3523895766dSshatty // BE means big-endian. 3533895766dSshatty // 3543895766dSshatty // DSP_AUDIOFORM_MS_8 3553895766dSshatty // 3563895766dSshatty // 8-bit mono unsigned samples. For playback, 3573895766dSshatty // mono data is duplicated out the left and right channels 3583895766dSshatty // of the output bus. The "MS" part of the name 3593895766dSshatty // means mono->stereo. 3603895766dSshatty // 3613895766dSshatty // DSP_AUDIOFORM_MS_16LE 3623895766dSshatty // 3633895766dSshatty // 16-bit signed little-endian mono samples. Playback works 3643895766dSshatty // like the previous code. 3653895766dSshatty // 366c2ddc71cSJérôme Duval // DSP_AUDIOFORM_MS_24LE 367c2ddc71cSJérôme Duval // 368c2ddc71cSJérôme Duval // 24-bit signed little-endian mono samples. Data is packed 369c2ddc71cSJérôme Duval // three bytes per sample; if you had two samples 0x112233 and 0x445566 370c2ddc71cSJérôme Duval // they would be stored in memory like this: 33 22 11 66 55 44. 371c2ddc71cSJérôme Duval // 3723895766dSshatty // DSP_AUDIOFORM_MS_32LE 3733895766dSshatty // 3743895766dSshatty // 24-bit signed little-endian mono samples in a 32-bit 3753895766dSshatty // container. In other words, each sample is a 32-bit signed 3763895766dSshatty // integer, where the actual audio data is left-justified 3773895766dSshatty // in the 32 bits and only the 24 most significant bits are valid. 3783895766dSshatty // 3793895766dSshatty // DSP_AUDIOFORM_SS_8 3803895766dSshatty // DSP_AUDIOFORM_SS_16LE 381c2ddc71cSJérôme Duval // DSP_AUDIOFORM_SS_24LE 3823895766dSshatty // DSP_AUDIOFORM_SS_32LE 3833895766dSshatty // 3843895766dSshatty // Like the previous ones, except now with stereo interleaved 3853895766dSshatty // data. "SS" means stereo->stereo. 3863895766dSshatty // 3873895766dSshatty // DSP_AUDIOFORM_MM_32LE 3883895766dSshatty // 3893895766dSshatty // Similar to DSP_AUDIOFORM_MS_32LE, except that the mono 3903895766dSshatty // data is not duplicated out both the left and right outputs. 3913895766dSshatty // This mode is used by the ASIO driver. Here, "MM" means 3923895766dSshatty // mono->mono. 3933895766dSshatty // 3943895766dSshatty // DSP_AUDIOFORM_MM_32BE 3953895766dSshatty // 3963895766dSshatty // Just like DSP_AUDIOFORM_MM_32LE, but now the data is 3973895766dSshatty // in big-endian format. 3983895766dSshatty // 3993895766dSshatty //================================================================================== 4003895766dSshatty 4013895766dSshatty #define DSP_AUDIOFORM_MS_8 0 // 8 bit mono 4023895766dSshatty #define DSP_AUDIOFORM_MS_16LE 1 // 16 bit mono 403c2ddc71cSJérôme Duval #define DSP_AUDIOFORM_MS_24LE 2 // 24 bit mono 4043895766dSshatty #define DSP_AUDIOFORM_MS_32LE 3 // 32 bit mono 4053895766dSshatty #define DSP_AUDIOFORM_SS_8 4 // 8 bit stereo 4063895766dSshatty #define DSP_AUDIOFORM_SS_16LE 5 // 16 bit stereo 407c2ddc71cSJérôme Duval #define DSP_AUDIOFORM_SS_24LE 6 // 24 bit stereo 4083895766dSshatty #define DSP_AUDIOFORM_SS_32LE 7 // 32 bit stereo 4093895766dSshatty #define DSP_AUDIOFORM_MM_32LE 8 // 32 bit mono->mono little-endian 4103895766dSshatty #define DSP_AUDIOFORM_MM_32BE 9 // 32 bit mono->mono big-endian 411c2ddc71cSJérôme Duval #define DSP_AUDIOFORM_SS_32BE 10 // 32 bit stereo big endian 4123895766dSshatty #define DSP_AUDIOFORM_INVALID 0xFF // Invalid audio format 4133895766dSshatty 4143895766dSshatty 4153895766dSshatty //================================================================================== 4163895766dSshatty // 4173895766dSshatty // Super-interleave is defined as interleaving by 4 or more. Darla20 and Gina20 4183895766dSshatty // do not support super interleave. 4193895766dSshatty // 420c2ddc71cSJérôme Duval // 16 bit, 24 bit, and 32 bit little endian samples are supported for super 421c2ddc71cSJérôme Duval // interleave. The interleave factor must be even. 16 - way interleave is the 422c2ddc71cSJérôme Duval // current maximum, so you can interleave by 4, 6, 8, 10, 12, 14, and 16. 4233895766dSshatty // 4243895766dSshatty // The actual format code is derived by taking the define below and or-ing with 425c2ddc71cSJérôme Duval // the interleave factor. So, 32 bit interleave by 6 is 0x86 and 426c2ddc71cSJérôme Duval // 16 bit interleave by 16 is (0x40 | 0x10) = 0x50. 4273895766dSshatty // 4283895766dSshatty //================================================================================== 4293895766dSshatty 430c2ddc71cSJérôme Duval #define DSP_AUDIOFORM_SUPER_INTERLEAVE_16LE 0x40 431c2ddc71cSJérôme Duval #define DSP_AUDIOFORM_SUPER_INTERLEAVE_24LE 0xc0 4323895766dSshatty #define DSP_AUDIOFORM_SUPER_INTERLEAVE_32LE 0x80 4333895766dSshatty 4343895766dSshatty 4353895766dSshatty //================================================================================== 4363895766dSshatty // 4373895766dSshatty // Gina24, Mona, and Layla24 control register defines 4383895766dSshatty // 4393895766dSshatty //================================================================================== 4403895766dSshatty 4413895766dSshatty #define GML_CONVERTER_ENABLE 0x0010 4423895766dSshatty #define GML_SPDIF_PRO_MODE 0x0020 // Professional S/PDIF == 1, consumer == 0 4433895766dSshatty #define GML_SPDIF_SAMPLE_RATE0 0x0040 4443895766dSshatty #define GML_SPDIF_SAMPLE_RATE1 0x0080 4453895766dSshatty #define GML_SPDIF_TWO_CHANNEL 0x0100 // 1 == two channels, 0 == one channel 4463895766dSshatty #define GML_SPDIF_NOT_AUDIO 0x0200 4473895766dSshatty #define GML_SPDIF_COPY_PERMIT 0x0400 4483895766dSshatty #define GML_SPDIF_24_BIT 0x0800 // 1 == 24 bit, 0 == 20 bit 4493895766dSshatty #define GML_ADAT_MODE 0x1000 // 1 == ADAT mode, 0 == S/PDIF mode 4503895766dSshatty #define GML_SPDIF_OPTICAL_MODE 0x2000 // 1 == optical mode, 0 == RCA mode 4513895766dSshatty #define GML_DOUBLE_SPEED_MODE 0x4000 // 1 == double speed, 0 == single speed 4523895766dSshatty 4533895766dSshatty #define GML_DIGITAL_IN_AUTO_MUTE 0x800000 4543895766dSshatty 4553895766dSshatty #define GML_96KHZ (0x0 | GML_DOUBLE_SPEED_MODE) 4563895766dSshatty #define GML_88KHZ (0x1 | GML_DOUBLE_SPEED_MODE) 4573895766dSshatty #define GML_48KHZ 0x2 4583895766dSshatty #define GML_44KHZ 0x3 4593895766dSshatty #define GML_32KHZ 0x4 4603895766dSshatty #define GML_22KHZ 0x5 4613895766dSshatty #define GML_16KHZ 0x6 4623895766dSshatty #define GML_11KHZ 0x7 4633895766dSshatty #define GML_8KHZ 0x8 4643895766dSshatty #define GML_SPDIF_CLOCK 0x9 4653895766dSshatty #define GML_ADAT_CLOCK 0xA 4663895766dSshatty #define GML_WORD_CLOCK 0xB 4673895766dSshatty #define GML_ESYNC_CLOCK 0xC 4683895766dSshatty #define GML_ESYNCx2_CLOCK 0xD 4693895766dSshatty 4703895766dSshatty #define GML_CLOCK_CLEAR_MASK 0xffffbff0 4713895766dSshatty #define GML_SPDIF_RATE_CLEAR_MASK (~(GML_SPDIF_SAMPLE_RATE0|GML_SPDIF_SAMPLE_RATE1)) 4723895766dSshatty #define GML_DIGITAL_MODE_CLEAR_MASK 0xffffcfff 4733895766dSshatty #define GML_SPDIF_FORMAT_CLEAR_MASK 0xfffff01f 4743895766dSshatty 4753895766dSshatty 4763895766dSshatty //================================================================================== 4773895766dSshatty // 4783895766dSshatty // Mia sample rate and clock setting constants 4793895766dSshatty // 4803895766dSshatty //================================================================================== 4813895766dSshatty 4823895766dSshatty #define MIA_32000 0x0040 4833895766dSshatty #define MIA_44100 0x0042 4843895766dSshatty #define MIA_48000 0x0041 4853895766dSshatty #define MIA_88200 0x0142 4863895766dSshatty #define MIA_96000 0x0141 4873895766dSshatty 4883895766dSshatty #define MIA_SPDIF 0x00000044 4893895766dSshatty #define MIA_SPDIF96 0x00000144 4903895766dSshatty 491c2ddc71cSJérôme Duval #define MIA_MIDI_REV 1 // Must be Mia rev 1 for MIDI support 492c2ddc71cSJérôme Duval 4933895766dSshatty 4943895766dSshatty //================================================================================== 4953895766dSshatty // 4963895766dSshatty // Gina20 & Layla20 have input gain controls for the analog inputs; 4973895766dSshatty // this is the magic number for the hardware that gives you 0 dB at -10. 4983895766dSshatty // 4993895766dSshatty //================================================================================== 5003895766dSshatty 5013895766dSshatty #define GL20_INPUT_GAIN_MAGIC_NUMBER 0xC8 5023895766dSshatty 5033895766dSshatty 5043895766dSshatty //================================================================================== 5053895766dSshatty // 5063895766dSshatty // Defines how much time must pass between DSP load attempts 5073895766dSshatty // 5083895766dSshatty //================================================================================== 5093895766dSshatty 5103895766dSshatty #define DSP_LOAD_ATTEMPT_PERIOD 1000000L // One million microseconds == one second 5113895766dSshatty 5123895766dSshatty 5133895766dSshatty //================================================================================== 5143895766dSshatty // 5153895766dSshatty // Size of arrays for the comm page. MAX_PLAY_TAPS and MAX_REC_TAPS are no longer 5163895766dSshatty // used, but the sizes must still be right for the DSP to see the comm page correctly. 5173895766dSshatty // 5183895766dSshatty //================================================================================== 5193895766dSshatty 5203895766dSshatty #define MONITOR_ARRAY_SIZE 0x180 5213895766dSshatty #define VMIXER_ARRAY_SIZE 0x40 522c2ddc71cSJérôme Duval #define CP_MIDI_OUT_BUFFER_SIZE 32 523c2ddc71cSJérôme Duval #define CP_MIDI_IN_BUFFER_SIZE 256 5243895766dSshatty #define MAX_PLAY_TAPS 168 5253895766dSshatty #define MAX_REC_TAPS 192 5263895766dSshatty 527c2ddc71cSJérôme Duval #define DSP_MIDI_OUT_FIFO_SIZE 64 528c2ddc71cSJérôme Duval 5293895766dSshatty 5303895766dSshatty /**************************************************************************** 5313895766dSshatty 5323895766dSshatty The comm page. This structure is read and written by the DSP; the 5333895766dSshatty DSP code is a firm believer in the byte offsets written in the comments 5343895766dSshatty at the end of each line. This structure should not be changed. 5353895766dSshatty 5363895766dSshatty Any reads from or writes to this structure should be in little-endian 5373895766dSshatty format. 5383895766dSshatty 5393895766dSshatty ****************************************************************************/ 5403895766dSshatty 5413895766dSshatty typedef struct 5423895766dSshatty { 5433895766dSshatty DWORD dwCommSize; // size of this object 0x000 4 5443895766dSshatty 5453895766dSshatty DWORD dwFlags; // See Appendix A below 0x004 4 5463895766dSshatty DWORD dwUnused; // Unused entry 0x008 4 5473895766dSshatty 5483895766dSshatty DWORD dwSampleRate; // Card sample rate in Hz 0x00c 4 5493895766dSshatty DWORD dwHandshake; // DSP command handshake 0x010 4 5503895766dSshatty CChMaskDsp cmdStart; // Chs. to start mask 0x014 4 5513895766dSshatty CChMaskDsp cmdStop; // Chs. to stop mask 0x018 4 5523895766dSshatty CChMaskDsp cmdReset; // Chs. to reset mask 0x01c 4 5533895766dSshatty WORD wAudioFormat[ DSP_MAXPIPES ]; 5543895766dSshatty // Chs. audio format 0x020 16*2*2 555c2ddc71cSJérôme Duval DUCKENTRY DuckListPhys[ DSP_MAXPIPES ]; 5563895766dSshatty // Chs. Physical duck addrs 0x060 16*2*8 5573895766dSshatty DWORD dwPosition[ DSP_MAXPIPES ]; 5583895766dSshatty // Positions for ea. ch. 0x160 16*2*4 559c2ddc71cSJérôme Duval BYTE VUMeter[ DSP_MAXPIPES ]; 5603895766dSshatty // VU meters 0x1e0 16*2*1 5613895766dSshatty BYTE PeakMeter[ DSP_MAXPIPES ]; 5623895766dSshatty // Peak meters 0x200 16*2*1 5633895766dSshatty BYTE OutLineLevel[ DSP_MAXAUDIOOUTPUTS ]; 5643895766dSshatty // Output gain 0x220 16*1 5653895766dSshatty BYTE InLineLevel[ DSP_MAXAUDIOINPUTS ]; 5663895766dSshatty // Input gain 0x230 16*1 5673895766dSshatty BYTE byMonitors[ MONITOR_ARRAY_SIZE ]; 5683895766dSshatty // Monitor map 0x240 0x180 5693895766dSshatty DWORD dwPlayCoeff[ MAX_PLAY_TAPS ]; 5703895766dSshatty // Gina/Darla play filters - obsolete 0x3c0 168*4 5713895766dSshatty DWORD dwRecCoeff [ MAX_REC_TAPS ]; 5723895766dSshatty // Gina/Darla record filters - obsolete 0x660 192*4 573c2ddc71cSJérôme Duval WORD wMidiInData[ CP_MIDI_IN_BUFFER_SIZE ]; 5743895766dSshatty // MIDI input data transfer buffer 0x960 256*2 5753895766dSshatty BYTE byGDClockState; // Chg Gina/Darla clock state 0xb60 4 5763895766dSshatty BYTE byGDSpdifStatus; // Chg. Gina/Darla S/PDIF state 5773895766dSshatty BYTE byGDResamplerState; // Should always be 3 5783895766dSshatty BYTE byFiller2; 5793895766dSshatty CChMaskDsp cmdNominalLevel; 5803895766dSshatty // -10 level enable mask 0xb64 4 5813895766dSshatty WORD wInputClock; // Chg. Input clock state 5823895766dSshatty WORD wOutputClock; // Chg. Output clock state 0xb68 5833895766dSshatty DWORD dwStatusClocks; // Current Input clock state 0xb6c 4 5843895766dSshatty 585c2ddc71cSJérôme Duval DWORD dwExtBoxStatus; // External box connected or not 0xb70 4 586626bc4beSJérôme Duval DWORD dwUnused2; // filler 0xb74 4 587c2ddc71cSJérôme Duval DWORD dwMidiOutFreeCount; // # of bytes free in MIDI output FIFO 0xb78 4 588626bc4beSJérôme Duval DWORD dwUnused3; // 0xb7c 4 589c2ddc71cSJérôme Duval DWORD dwControlReg; // Mona, Gina24, Layla24 and 3G control 0xb80 4 590c2ddc71cSJérôme Duval DWORD dw3gFreqReg; // 3G frequency register 0xb84 4 591c2ddc71cSJérôme Duval BYTE byFiller[24]; // filler 0xb88 5923895766dSshatty BYTE byVmixerLevel[ VMIXER_ARRAY_SIZE ]; 5933895766dSshatty // Vmixer levels 0xba0 64 594c2ddc71cSJérôme Duval BYTE byMidiOutData[ CP_MIDI_OUT_BUFFER_SIZE ]; 595c2ddc71cSJérôme Duval // MIDI output data 0xbe0 32 5963895766dSshatty } DspCommPage, *PDspCommPage; 5973895766dSshatty 5983895766dSshatty 5993895766dSshatty /**************************************************************************** 6003895766dSshatty 6013895766dSshatty CDspCommObject is the class which wraps both the comm page and the 6023895766dSshatty DSP registers. CDspCommObject talks directly to the hardware; anyone 6033895766dSshatty who wants to do something to the hardware goes through CDspCommObject or 6043895766dSshatty one of the derived classes. 6053895766dSshatty 6063895766dSshatty Note that an instance of CDspCommObject is never actually created; it 6073895766dSshatty is treated as an abstract base class. 6083895766dSshatty 6093895766dSshatty ****************************************************************************/ 6103895766dSshatty 6113895766dSshatty class CDspCommObject 6123895766dSshatty { 6133895766dSshatty protected: 6143895766dSshatty PDspCommPage m_pDspCommPage; // Physical memory seen by DSP 615c2ddc71cSJérôme Duval PPAGE_BLOCK m_pDspCommPageBlock; // Physical memory info for COsSupport 6163895766dSshatty 6173895766dSshatty // 6183895766dSshatty // These members are not seen by the DSP; they are used internally by 6193895766dSshatty // this class. 6203895766dSshatty // 6213895766dSshatty WORD m_wNumPipesOut; 6223895766dSshatty WORD m_wNumPipesIn; 6233895766dSshatty WORD m_wNumBussesOut; 6243895766dSshatty WORD m_wNumBussesIn; 6253895766dSshatty WORD m_wFirstDigitalBusOut; 6263895766dSshatty WORD m_wFirstDigitalBusIn; 6273895766dSshatty 6283895766dSshatty BOOL m_fHasVmixer; 6293895766dSshatty 6303895766dSshatty WORD m_wNumMidiOut; // # MIDI out channels 6313895766dSshatty WORD m_wNumMidiIn; // # MIDI in channels 6323895766dSshatty PWORD m_pwDspCode; // Current DSP code loaded, NULL if nothing loaded 6333895766dSshatty PWORD m_pwDspCodeToLoad; // DSP code to load 6343895766dSshatty BOOL m_bHasASIC; // Set TRUE if card has an ASIC 6353895766dSshatty BOOL m_bASICLoaded; // Set TRUE when ASIC loaded 6363895766dSshatty DWORD m_dwCommPagePhys; // Physical addr of this object 6373895766dSshatty PDWORD m_pdwDspRegBase; // DSP's register base 6383895766dSshatty CChannelMask m_cmActive; // Chs. active mask 6393895766dSshatty BOOL m_bBadBoard; // Set TRUE if DSP won't load 6403895766dSshatty // or punks out 6413895766dSshatty WORD m_wMeterOnCount; // How many times meters have been 6423895766dSshatty // enabled 6433895766dSshatty PCOsSupport m_pOsSupport; // Ptr to OS specific methods & data 6443895766dSshatty CHAR m_szCardName[ 20 ]; 6453895766dSshatty BYTE m_byDigitalMode; // Digital mode (see DIGITAL_MODE_?? 6463895766dSshatty // defines in EchoGalsXface.h 6473895766dSshatty WORD m_wInputClock; // Currently selected input clock 6483895766dSshatty WORD m_wOutputClock; // Currently selected output clock 6493895766dSshatty 6503895766dSshatty ULONGLONG m_ullLastLoadAttemptTime; // Last system time that the driver 6513895766dSshatty // attempted to load the DSP & ASIC 6523895766dSshatty #ifdef DIGITAL_INPUT_AUTO_MUTE_SUPPORT 6533895766dSshatty BOOL m_fDigitalInAutoMute; 6543895766dSshatty #endif 6553895766dSshatty 6563895766dSshatty #ifdef MIDI_SUPPORT 6573895766dSshatty WORD m_wMidiOnCount; // Count MIDI enabled cmds 6583895766dSshatty ULONGLONG m_ullMidiInTime; // Last time MIDI in occured 6593895766dSshatty ULONGLONG m_ullMidiOutTime; // Last time MIDI out occured 6603895766dSshatty ULONGLONG m_ullNextMidiWriteTime; // Next time to try MIDI output 6613895766dSshatty 6623895766dSshatty WORD m_wMtcState; // State for MIDI input parsing state machine 6633895766dSshatty #endif 6643895766dSshatty 6653895766dSshatty protected : 6663895766dSshatty 6673895766dSshatty virtual WORD ComputeAudioMonitorIndex 6683895766dSshatty ( 6693895766dSshatty WORD wBusOut, 6703895766dSshatty WORD wBusIn 6713895766dSshatty ) 6723895766dSshatty { 6733895766dSshatty return( wBusOut * m_wNumBussesIn + wBusIn ); 6743895766dSshatty } 6753895766dSshatty 6763895766dSshatty // 6773895766dSshatty // Load code into DSP 6783895766dSshatty // 6793895766dSshatty #ifdef DSP_56361 6803895766dSshatty virtual ECHOSTATUS InstallResidentLoader(); 6813895766dSshatty #endif 6823895766dSshatty virtual ECHOSTATUS LoadDSP( PWORD pCode ); 6833895766dSshatty 6843895766dSshatty // 6853895766dSshatty // Read the serial number from DSP 6863895766dSshatty // 6873895766dSshatty virtual ECHOSTATUS ReadSn(); 6883895766dSshatty 6893895766dSshatty // 6903895766dSshatty // Load code into ASIC 6913895766dSshatty // 692c2ddc71cSJérôme Duval virtual BOOL LoadASIC( DWORD dwCmd, PBYTE pCode, DWORD dwSize ); 6933895766dSshatty virtual BOOL LoadASIC() { return TRUE; } 6943895766dSshatty 6953895766dSshatty // 6963895766dSshatty // Check status of ASIC - loaded or not loaded 6973895766dSshatty // 698c2ddc71cSJérôme Duval virtual BOOL CheckAsicStatus(); 6993895766dSshatty 7003895766dSshatty // 7013895766dSshatty // Write to DSP 7023895766dSshatty // 7033895766dSshatty ECHOSTATUS Write_DSP( DWORD dwData ); 7043895766dSshatty 7053895766dSshatty // 7063895766dSshatty // Read from DSP 7073895766dSshatty // 7083895766dSshatty ECHOSTATUS Read_DSP( DWORD *pdwData ); 7093895766dSshatty 7103895766dSshatty // 7113895766dSshatty // Get/Set handshake Flag 7123895766dSshatty // 7133895766dSshatty DWORD GetHandshakeFlag() 7143895766dSshatty { ASSERT( NULL != m_pDspCommPage ); 7153895766dSshatty return( SWAP( m_pDspCommPage->dwHandshake ) ); } 7163895766dSshatty void ClearHandshake() 7173895766dSshatty { ASSERT( NULL != m_pDspCommPage ); 7183895766dSshatty m_pDspCommPage->dwHandshake = 0; } 7193895766dSshatty 7203895766dSshatty // 7213895766dSshatty // Get/set DSP registers 7223895766dSshatty // 7233895766dSshatty DWORD GetDspRegister( DWORD dwIndex ) 7243895766dSshatty { ASSERT( NULL != m_pdwDspRegBase ); 7253895766dSshatty return( SWAP( m_pdwDspRegBase[ dwIndex ] ) ); } 7263895766dSshatty void SetDspRegister( DWORD dwIndex, DWORD dwValue ) 7273895766dSshatty { ASSERT( NULL != m_pdwDspRegBase ); 7283895766dSshatty m_pdwDspRegBase[ dwIndex ] = SWAP( dwValue ); } 7293895766dSshatty 7303895766dSshatty // 7313895766dSshatty // Set control register in CommPage 7323895766dSshatty // 7333895766dSshatty void SetControlRegister( DWORD dwControlRegister ) 7343895766dSshatty { ASSERT( NULL != m_pDspCommPage ); 7353895766dSshatty m_pDspCommPage->dwControlReg = SWAP( dwControlRegister ); } 7363895766dSshatty 7373895766dSshatty // 7383895766dSshatty // Called after load firmware to restore old gains, meters on, monitors, etc. 7393895766dSshatty // 7403895766dSshatty virtual void RestoreDspSettings(); 7413895766dSshatty 7423895766dSshatty // 7433895766dSshatty // Send a vector command to the DSP 7443895766dSshatty // 7453895766dSshatty ECHOSTATUS SendVector( DWORD dwCommand ); 7463895766dSshatty 7473895766dSshatty // 7483895766dSshatty // Wait for DSP to finish the last vector command 7493895766dSshatty // 7503895766dSshatty BOOL WaitForHandshake(); 7513895766dSshatty 7523895766dSshatty // 7533895766dSshatty // Send new input line setting to DSP 7543895766dSshatty // 7553895766dSshatty ECHOSTATUS UpdateAudioInLineLevel(); 7563895766dSshatty 7573895766dSshatty public: 7583895766dSshatty 7593895766dSshatty // 7603895766dSshatty // Construction/destruction 7613895766dSshatty // 7623895766dSshatty CDspCommObject( PDWORD pdwRegBase, PCOsSupport pOsSupport ); 7633895766dSshatty virtual ~CDspCommObject(); 7643895766dSshatty 7653895766dSshatty // 7663895766dSshatty // Card information 7673895766dSshatty // 7683895766dSshatty virtual WORD GetCardType() = NULL; 7693895766dSshatty // Undefined, must be done in derived class 7703895766dSshatty const PCHAR GetCardName() { return( m_szCardName ); } 7713895766dSshatty // Must be init in derived class 7723895766dSshatty 7733895766dSshatty // 7743895766dSshatty // Get mask with active pipes 7753895766dSshatty // 7763895766dSshatty void GetActivePipes 7773895766dSshatty ( 7783895766dSshatty PCChannelMask pChannelMask 7793895766dSshatty ); 7803895766dSshatty 7813895766dSshatty // 7823895766dSshatty // Basic info methods 7833895766dSshatty // 7843895766dSshatty WORD GetNumPipesOut() 7853895766dSshatty { 7863895766dSshatty return m_wNumPipesOut; 7873895766dSshatty } 7883895766dSshatty 7893895766dSshatty WORD GetNumPipesIn() 7903895766dSshatty { 7913895766dSshatty return m_wNumPipesIn; 7923895766dSshatty } 7933895766dSshatty 7943895766dSshatty WORD GetNumBussesOut() 7953895766dSshatty { 7963895766dSshatty return m_wNumBussesOut; 7973895766dSshatty } 7983895766dSshatty 7993895766dSshatty WORD GetNumBussesIn() 8003895766dSshatty { 8013895766dSshatty return m_wNumBussesIn; 8023895766dSshatty } 8033895766dSshatty 8043895766dSshatty WORD GetNumPipes() 8053895766dSshatty { 8063895766dSshatty return m_wNumPipesOut + m_wNumPipesIn; 8073895766dSshatty } 8083895766dSshatty 8093895766dSshatty WORD GetNumBusses() 8103895766dSshatty { 8113895766dSshatty return m_wNumBussesOut + m_wNumBussesIn; 8123895766dSshatty } 8133895766dSshatty 8143895766dSshatty WORD GetFirstDigitalBusOut() 8153895766dSshatty { 8163895766dSshatty return m_wFirstDigitalBusOut; 8173895766dSshatty } 8183895766dSshatty 8193895766dSshatty WORD GetFirstDigitalBusIn() 8203895766dSshatty { 8213895766dSshatty return m_wFirstDigitalBusIn; 8223895766dSshatty } 8233895766dSshatty 8243895766dSshatty BOOL HasVmixer() 8253895766dSshatty { 8263895766dSshatty return m_fHasVmixer; 8273895766dSshatty } 8283895766dSshatty 8293895766dSshatty WORD GetNumMidiOutChannels() 8303895766dSshatty { return( m_wNumMidiOut ); } 8313895766dSshatty WORD GetNumMidiInChannels() 8323895766dSshatty { return( m_wNumMidiIn ); } 8333895766dSshatty WORD GetNumMidiChannels() 8343895766dSshatty { return( m_wNumMidiIn + m_wNumMidiOut ); } 8353895766dSshatty 8363895766dSshatty // 8373895766dSshatty // Get, set, and clear comm page flags 8383895766dSshatty // 8393895766dSshatty DWORD GetFlags() 8403895766dSshatty { 8413895766dSshatty return( SWAP( m_pDspCommPage->dwFlags ) ); } 8423895766dSshatty DWORD SetFlags( DWORD dwFlags ) 8433895766dSshatty { 8443895766dSshatty DWORD dwCpFlags = SWAP( m_pDspCommPage->dwFlags ); 8453895766dSshatty dwCpFlags |= dwFlags; 8463895766dSshatty m_pDspCommPage->dwFlags = SWAP( dwCpFlags ); 8473895766dSshatty 8483895766dSshatty if ( m_bASICLoaded && WaitForHandshake() ) 8493895766dSshatty UpdateFlags(); 8503895766dSshatty return( GetFlags() ); 8513895766dSshatty } 8523895766dSshatty DWORD ClearFlags( DWORD dwFlags ) 8533895766dSshatty { 8543895766dSshatty DWORD dwCpFlags = SWAP( m_pDspCommPage->dwFlags ); 8553895766dSshatty dwCpFlags &= ~dwFlags; 8563895766dSshatty m_pDspCommPage->dwFlags = SWAP( dwCpFlags ); 8573895766dSshatty 8583895766dSshatty if ( m_bASICLoaded && WaitForHandshake() ) 8593895766dSshatty UpdateFlags(); 8603895766dSshatty return( GetFlags() ); 8613895766dSshatty } 8623895766dSshatty 8633895766dSshatty // 8643895766dSshatty // Returns currently selected input clock 8653895766dSshatty // 8663895766dSshatty WORD GetInputClock() 8673895766dSshatty { 8683895766dSshatty return m_wInputClock; 8693895766dSshatty } 8703895766dSshatty 8713895766dSshatty // 8723895766dSshatty // Returns what input clocks are currently detected 8733895766dSshatty // 8743895766dSshatty DWORD GetInputClockDetect() 8753895766dSshatty { return( SWAP( m_pDspCommPage->dwStatusClocks ) ); } 8763895766dSshatty 8773895766dSshatty // 8783895766dSshatty // Returns currently selected output clock 8793895766dSshatty // 8803895766dSshatty WORD GetOutputClock() 8813895766dSshatty { 8823895766dSshatty return m_wOutputClock; 8833895766dSshatty } 8843895766dSshatty 8853895766dSshatty // 8863895766dSshatty // Returns control register 8873895766dSshatty // 8883895766dSshatty DWORD GetControlRegister() 8893895766dSshatty { ASSERT( NULL != m_pDspCommPage ); 8903895766dSshatty return SWAP( m_pDspCommPage->dwControlReg ); } 8913895766dSshatty 8923895766dSshatty // 8933895766dSshatty // Set input and output clocks 8943895766dSshatty // 8953895766dSshatty virtual ECHOSTATUS SetInputClock(WORD wClock); 8963895766dSshatty virtual ECHOSTATUS SetOutputClock(WORD wClock); 8973895766dSshatty 8983895766dSshatty // 8993895766dSshatty // Set digital mode 9003895766dSshatty // 9013895766dSshatty virtual ECHOSTATUS SetDigitalMode( BYTE byNewMode ) 9023895766dSshatty { return ECHOSTATUS_DIGITAL_MODE_NOT_SUPPORTED; } 903c2ddc71cSJérôme Duval 9043895766dSshatty // 9053895766dSshatty // Get digital mode 9063895766dSshatty // 9073895766dSshatty virtual BYTE GetDigitalMode() 9083895766dSshatty { return( m_byDigitalMode ); } 9093895766dSshatty 9103895766dSshatty // 9113895766dSshatty // Get mask of all supported digital modes. 9123895766dSshatty // (See ECHOCAPS_HAS_DIGITAL_MODE_??? defines in EchoGalsXface.h) 9133895766dSshatty // 9143895766dSshatty // Note: If the card does not have a digital mode switch 9153895766dSshatty // then return 0 (no digital modes supported). 9163895766dSshatty // Some legacy cards support S/PDIF as their only 9173895766dSshatty // digital mode. We still return 0 here because it 9183895766dSshatty // is not switchable. 9193895766dSshatty // 9203895766dSshatty virtual DWORD GetDigitalModes() 9213895766dSshatty { return( 0 ); } 9223895766dSshatty 9233895766dSshatty // 9243895766dSshatty // Return audio channel position in bytes 9253895766dSshatty // 9263895766dSshatty DWORD GetAudioPosition( WORD wPipeIndex ) 9273895766dSshatty { ASSERT( wPipeIndex < ECHO_MAXAUDIOPIPES ); 9283895766dSshatty 9293895766dSshatty return( ( wPipeIndex < ECHO_MAXAUDIOPIPES ) 9303895766dSshatty ? SWAP( m_pDspCommPage->dwPosition[ wPipeIndex ] ) 9313895766dSshatty : 0 ); } 9323895766dSshatty 9333895766dSshatty // 9343895766dSshatty // Reset the pipe position for a single pipe 9353895766dSshatty // 9363895766dSshatty void ResetPipePosition(WORD wPipeIndex) 9373895766dSshatty { 9383895766dSshatty if (wPipeIndex < ECHO_MAXAUDIOPIPES) 9393895766dSshatty { 9403895766dSshatty m_pDspCommPage->dwPosition[ wPipeIndex ] = 0; 9413895766dSshatty } 9423895766dSshatty } 9433895766dSshatty 9443895766dSshatty // 9453895766dSshatty // Warning: Never write to the pointer returned by this 9463895766dSshatty // function!!! 9473895766dSshatty // 9483895766dSshatty // The data pointed to by this pointer is in little- 9493895766dSshatty // endian format. 9503895766dSshatty // 9513895766dSshatty PDWORD GetAudioPositionPtr() 9523895766dSshatty { return( m_pDspCommPage->dwPosition ); } 9533895766dSshatty 9543895766dSshatty // 9553895766dSshatty // Get the current sample rate 9563895766dSshatty // 957c2ddc71cSJérôme Duval virtual DWORD GetSampleRate() 9583895766dSshatty { return( SWAP( m_pDspCommPage->dwSampleRate ) ); } 9593895766dSshatty 9603895766dSshatty // 9613895766dSshatty // Set the sample rate. 9623895766dSshatty // Return rate that was set, 0xffffffff if error 9633895766dSshatty // 9643895766dSshatty virtual DWORD SetSampleRate( DWORD dwNewSampleRate ) = NULL; 9653895766dSshatty 9663895766dSshatty // 9673895766dSshatty // Send current setting to DSP & return what it is 9683895766dSshatty // 9693895766dSshatty virtual DWORD SetSampleRate() = NULL; 9703895766dSshatty 9713895766dSshatty // 9723895766dSshatty // Start a group of pipes 9733895766dSshatty // 9743895766dSshatty ECHOSTATUS StartTransport 9753895766dSshatty ( 976c2ddc71cSJérôme Duval PCChannelMask pChannelMask // Pipes to start 9773895766dSshatty ); 9783895766dSshatty 9793895766dSshatty // 9803895766dSshatty // Stop a group of pipes 9813895766dSshatty // 9823895766dSshatty ECHOSTATUS StopTransport 9833895766dSshatty ( 9843895766dSshatty PCChannelMask pChannelMask 9853895766dSshatty ); 9863895766dSshatty 9873895766dSshatty // 9883895766dSshatty // Reset a group of pipes 9893895766dSshatty // 9903895766dSshatty ECHOSTATUS ResetTransport 9913895766dSshatty ( 9923895766dSshatty PCChannelMask pChannelMask 9933895766dSshatty ); 9943895766dSshatty 9953895766dSshatty // 996c2ddc71cSJérôme Duval // See if any pipes are playing or recording 997c2ddc71cSJérôme Duval // 998c2ddc71cSJérôme Duval BOOL IsTransportActive() 999c2ddc71cSJérôme Duval { 1000c2ddc71cSJérôme Duval return (FALSE == m_cmActive.IsEmpty()); 1001c2ddc71cSJérôme Duval } 1002c2ddc71cSJérôme Duval 1003c2ddc71cSJérôme Duval // 10043895766dSshatty // Tell DSP we added a buffer to a channel 10053895766dSshatty // 10063895766dSshatty ECHOSTATUS AddBuffer( WORD wPipeIndex ); 10073895766dSshatty 10083895766dSshatty // 10093895766dSshatty // Add start of duck list for one channel to commpage so DSP can read it. 10103895766dSshatty // 10113895766dSshatty void SetAudioDuckListPhys( WORD wPipeIndex, DWORD dwNewPhysAdr ); 10123895766dSshatty 10133895766dSshatty // 10143895766dSshatty // Read extended status register from the DSP 10153895766dSshatty // 10163895766dSshatty DWORD GetStatusReg() 10173895766dSshatty { return( SWAP( m_pdwDspRegBase[ CHI32_STATUS_REG ] ) ); } 10183895766dSshatty 10193895766dSshatty // 10203895766dSshatty // Tell DSP to release the hardware interrupt 10213895766dSshatty // 10223895766dSshatty void AckInt() 10233895766dSshatty { 10243895766dSshatty m_pDspCommPage->wMidiInData[ 0 ] = 0; 10253895766dSshatty SendVector( DSP_VC_ACK_INT ); 10263895766dSshatty } 10273895766dSshatty 10283895766dSshatty // 10293895766dSshatty // Overload new & delete so memory for this object is allocated 10303895766dSshatty // from contiguous non-paged memory. 10313895766dSshatty // 10323895766dSshatty PVOID operator new( size_t Size ); 10333895766dSshatty VOID operator delete( PVOID pVoid ); 10343895766dSshatty 10353895766dSshatty // 10363895766dSshatty // Get status of board 10373895766dSshatty // 10383895766dSshatty BOOL IsBoardBad() 10393895766dSshatty { return( m_bBadBoard ); } 10403895766dSshatty 10413895766dSshatty // 10423895766dSshatty // Tell DSP flags have been updated 10433895766dSshatty // 10443895766dSshatty ECHOSTATUS UpdateFlags() 10453895766dSshatty { 10463895766dSshatty ECHO_DEBUGPRINTF(("CDspCommObject::UpdateFlags\n")); 10473895766dSshatty ClearHandshake(); 10483895766dSshatty return( SendVector( DSP_VC_UPDATE_FLAGS ) ); 10493895766dSshatty } 10503895766dSshatty 10513895766dSshatty // 1052c2ddc71cSJérôme Duval // Get/Set professional or consumer S/PDIF status 10533895766dSshatty // 10543895766dSshatty virtual BOOL IsProfessionalSpdif() 10553895766dSshatty { 10563895766dSshatty ECHO_DEBUGPRINTF(("CDspCommObject::IsProfessionalSpdif - flags are 0x%lx\n", 10573895766dSshatty GetFlags())); 10583895766dSshatty return( ( GetFlags() & DSP_FLAG_PROFESSIONAL_SPDIF ) ? TRUE : FALSE ); 10593895766dSshatty } 10603895766dSshatty 10613895766dSshatty virtual void SetProfessionalSpdif( BOOL bNewStatus ) 10623895766dSshatty { 10633895766dSshatty ECHO_DEBUGPRINTF(("CDspCommObject::SetProfessionalSpdif %d\n",bNewStatus)); 10643895766dSshatty if ( 0 != bNewStatus ) 10653895766dSshatty SetFlags( DSP_FLAG_PROFESSIONAL_SPDIF ); 10663895766dSshatty else 10673895766dSshatty ClearFlags( DSP_FLAG_PROFESSIONAL_SPDIF ); 10683895766dSshatty 10693895766dSshatty ECHO_DEBUGPRINTF(("CDspCommObject::SetProfessionalSpdif - flags are now 0x%lx\n", 10703895766dSshatty GetFlags())); 10713895766dSshatty } 10723895766dSshatty 10733895766dSshatty // 1074c2ddc71cSJérôme Duval // Get/Set S/PDIF out non-audio status bit 1075c2ddc71cSJérôme Duval // 1076c2ddc71cSJérôme Duval virtual BOOL IsSpdifOutNonAudio() 1077c2ddc71cSJérôme Duval { 1078c2ddc71cSJérôme Duval return( ( GetFlags() & DSP_FLAG_SPDIF_NONAUDIO ) ? TRUE : FALSE ); 1079c2ddc71cSJérôme Duval } 1080c2ddc71cSJérôme Duval 1081c2ddc71cSJérôme Duval virtual void SetSpdifOutNonAudio( BOOL bNonAudio) 1082c2ddc71cSJérôme Duval { 1083c2ddc71cSJérôme Duval if ( 0 != bNonAudio ) 1084c2ddc71cSJérôme Duval SetFlags( DSP_FLAG_SPDIF_NONAUDIO ); 1085c2ddc71cSJérôme Duval else 1086c2ddc71cSJérôme Duval ClearFlags( DSP_FLAG_SPDIF_NONAUDIO ); 1087c2ddc71cSJérôme Duval } 1088c2ddc71cSJérôme Duval 1089c2ddc71cSJérôme Duval // 10903895766dSshatty // Mixer functions 10913895766dSshatty // 10923895766dSshatty virtual ECHOSTATUS SetNominalLevel( WORD wBus, BOOL bState ); 1093c2ddc71cSJérôme Duval virtual ECHOSTATUS GetNominalLevel( WORD wBus, PBYTE pbyState ); 10943895766dSshatty 10953895766dSshatty ECHOSTATUS SetAudioMonitor 10963895766dSshatty ( 10973895766dSshatty WORD wOutCh, 10983895766dSshatty WORD wInCh, 1099c2ddc71cSJérôme Duval INT32 iGain, 11003895766dSshatty BOOL fImmediate = TRUE 11013895766dSshatty ); 11023895766dSshatty 11033895766dSshatty // 11043895766dSshatty // SetBusOutGain - empty function on non-vmixer cards 11053895766dSshatty // 1106c2ddc71cSJérôme Duval virtual ECHOSTATUS SetBusOutGain(WORD wBusOut,INT32 iGain) 11073895766dSshatty { 11083895766dSshatty return ECHOSTATUS_OK; 11093895766dSshatty } 11103895766dSshatty 11113895766dSshatty // Send volume to DSP 11123895766dSshatty ECHOSTATUS UpdateAudioOutLineLevel(); 11133895766dSshatty 11143895766dSshatty // Send vmixer volume to DSP 11153895766dSshatty virtual ECHOSTATUS UpdateVmixerLevel(); 11163895766dSshatty 11173895766dSshatty virtual ECHOSTATUS SetPipeOutGain 11183895766dSshatty ( 11193895766dSshatty WORD wPipeOut, 11203895766dSshatty WORD wBusOut, 1121c2ddc71cSJérôme Duval INT32 iGain, 11223895766dSshatty BOOL fImmediate = TRUE 11233895766dSshatty ); 11243895766dSshatty 11253895766dSshatty virtual ECHOSTATUS GetPipeOutGain 11263895766dSshatty ( 11273895766dSshatty WORD wPipeOut, 11283895766dSshatty WORD wBusOut, 1129c2ddc71cSJérôme Duval INT32 &iGain 11303895766dSshatty ); 11313895766dSshatty 11323895766dSshatty virtual ECHOSTATUS SetBusInGain 11333895766dSshatty ( 11343895766dSshatty WORD wBusIn, 1135c2ddc71cSJérôme Duval INT32 iGain 11363895766dSshatty ); 11373895766dSshatty 1138c2ddc71cSJérôme Duval virtual ECHOSTATUS GetBusInGain( WORD wBusIn, INT32 &iGain); 11393895766dSshatty 11403895766dSshatty // 11413895766dSshatty // See description of ECHOGALS_METERS above for 11423895766dSshatty // data format information. 11433895766dSshatty // 11443895766dSshatty virtual ECHOSTATUS GetAudioMeters 11453895766dSshatty ( 11463895766dSshatty PECHOGALS_METERS pMeters 11473895766dSshatty ); 11483895766dSshatty 11493895766dSshatty ECHOSTATUS GetMetersOn 11503895766dSshatty ( 11513895766dSshatty BOOL & bOn 11523895766dSshatty ) 11533895766dSshatty { bOn = ( 0 != m_wMeterOnCount ); return ECHOSTATUS_OK; } 11543895766dSshatty 11553895766dSshatty ECHOSTATUS SetMetersOn( BOOL bOn ); 11563895766dSshatty 11573895766dSshatty // 11583895766dSshatty // Set/get Audio Format 11593895766dSshatty // 11603895766dSshatty ECHOSTATUS SetAudioFormat 11613895766dSshatty ( 11623895766dSshatty WORD wPipeIndex, 1163c2ddc71cSJérôme Duval PECHOGALS_AUDIOFORMAT pFormat 11643895766dSshatty ); 1165c2ddc71cSJérôme Duval 11663895766dSshatty ECHOSTATUS GetAudioFormat 11673895766dSshatty ( 11683895766dSshatty WORD wPipeIndex, 11693895766dSshatty PECHOGALS_AUDIOFORMAT pFormat 11703895766dSshatty ); 11713895766dSshatty 11723895766dSshatty #ifdef MIDI_SUPPORT 11733895766dSshatty 11743895766dSshatty // 11753895766dSshatty // MIDI output activity 11763895766dSshatty // 1177c2ddc71cSJérôme Duval virtual BOOL IsMidiOutActive(); 11783895766dSshatty 11793895766dSshatty // 11803895766dSshatty // Set MIDI I/O on or off 11813895766dSshatty // 11823895766dSshatty ECHOSTATUS SetMidiOn( BOOL bOn ); 11833895766dSshatty 11843895766dSshatty // 11853895766dSshatty // Read and write MIDI data 11863895766dSshatty // 11873895766dSshatty ECHOSTATUS WriteMidi 11883895766dSshatty ( 11893895766dSshatty PBYTE pData, 11903895766dSshatty DWORD dwLength, 11913895766dSshatty PDWORD pdwActualCt 11923895766dSshatty ); 11933895766dSshatty 11943895766dSshatty ECHOSTATUS ReadMidi 11953895766dSshatty ( 11963895766dSshatty WORD wIndex, // Buffer index 11973895766dSshatty DWORD & dwData // Return data 11983895766dSshatty ); 11993895766dSshatty 12003895766dSshatty #endif // MIDI_SUPPORT 12013895766dSshatty 12023895766dSshatty // 12033895766dSshatty // Reset the DSP and load new firmware. 12043895766dSshatty // 12053895766dSshatty virtual ECHOSTATUS LoadFirmware(); 12063895766dSshatty 12073895766dSshatty // 12083895766dSshatty // Put the hardware to sleep 12093895766dSshatty // 12103895766dSshatty virtual ECHOSTATUS GoComatose(); 12113895766dSshatty 12123895766dSshatty 12133895766dSshatty #ifdef DIGITAL_INPUT_AUTO_MUTE_SUPPORT 12143895766dSshatty // 12153895766dSshatty // Get and set the digital input auto-mute flag 12163895766dSshatty // 12173895766dSshatty virtual ECHOSTATUS GetDigitalInputAutoMute(BOOL &fAutoMute); 12183895766dSshatty virtual ECHOSTATUS SetDigitalInputAutoMute(BOOL fAutoMute); 12193895766dSshatty 12203895766dSshatty #endif // DIGITAL_INPUT_AUTO_MUTE_SUPPORT 12213895766dSshatty 12223895766dSshatty }; // class CDspCommObject 12233895766dSshatty 12243895766dSshatty typedef CDspCommObject * PCDspCommObject; 12253895766dSshatty 12263895766dSshatty #ifdef _WIN32 12273895766dSshatty #pragma pack( pop ) 12283895766dSshatty #endif 12293895766dSshatty 12303895766dSshatty #endif 12313895766dSshatty 12323895766dSshatty // **** DspCommObject.h **** 1233