13895766dSshatty // ****************************************************************************
23895766dSshatty //
33895766dSshatty // CDarla24DspCommObject.cpp
43895766dSshatty //
53895766dSshatty // Implementation file for Darla24 DSP interface class.
63895766dSshatty //
7c2ddc71cSJérôme Duval // ----------------------------------------------------------------------------
8c2ddc71cSJérôme Duval //
9*626bc4beSJérôme Duval // This file is part of Echo Digital Audio's generic driver library.
10*626bc4beSJérôme Duval // Copyright Echo Digital Audio Corporation (c) 1998 - 2005
113895766dSshatty // All rights reserved
123895766dSshatty // www.echoaudio.com
133895766dSshatty //
14*626bc4beSJérôme Duval // This library is free software; you can redistribute it and/or
15*626bc4beSJérôme Duval // modify it under the terms of the GNU Lesser General Public
16*626bc4beSJérôme Duval // License as published by the Free Software Foundation; either
17*626bc4beSJérôme Duval // version 2.1 of the License, or (at your option) any later version.
183895766dSshatty //
19*626bc4beSJérôme Duval // This library is distributed in the hope that it will be useful,
20c2ddc71cSJérôme Duval // but WITHOUT ANY WARRANTY; without even the implied warranty of
21*626bc4beSJérôme Duval // MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
22*626bc4beSJérôme Duval // Lesser General Public License for more details.
233895766dSshatty //
24*626bc4beSJérôme Duval // You should have received a copy of the GNU Lesser General Public
25*626bc4beSJérôme Duval // License along with this library; if not, write to the Free Software
26*626bc4beSJérôme Duval // Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
273895766dSshatty //
283895766dSshatty // ****************************************************************************
29c2ddc71cSJérôme Duval
303895766dSshatty #include "CEchoGals.h"
313895766dSshatty #include "CDarla24DspCommObject.h"
323895766dSshatty
333895766dSshatty #include "Darla24DSP.c"
343895766dSshatty
353895766dSshatty
363895766dSshatty /****************************************************************************
373895766dSshatty
383895766dSshatty Magic constants for the Darla24 hardware
393895766dSshatty
403895766dSshatty ****************************************************************************/
413895766dSshatty
423895766dSshatty #define GD24_96000 0x0
433895766dSshatty #define GD24_48000 0x1
443895766dSshatty #define GD24_44100 0x2
453895766dSshatty #define GD24_32000 0x3
463895766dSshatty #define GD24_22050 0x4
473895766dSshatty #define GD24_16000 0x5
483895766dSshatty #define GD24_11025 0x6
493895766dSshatty #define GD24_8000 0x7
503895766dSshatty #define GD24_88200 0x8
513895766dSshatty #define GD24_EXT_SYNC 0x9
523895766dSshatty
533895766dSshatty
543895766dSshatty
553895766dSshatty
563895766dSshatty /****************************************************************************
573895766dSshatty
583895766dSshatty Construction and destruction
593895766dSshatty
603895766dSshatty ****************************************************************************/
613895766dSshatty
623895766dSshatty //===========================================================================
633895766dSshatty //
643895766dSshatty // Constructor
653895766dSshatty //
663895766dSshatty //===========================================================================
673895766dSshatty
CDarla24DspCommObject(PDWORD pdwRegBase,PCOsSupport pOsSupport)683895766dSshatty CDarla24DspCommObject::CDarla24DspCommObject
693895766dSshatty (
703895766dSshatty PDWORD pdwRegBase, // Virtual ptr to DSP registers
713895766dSshatty PCOsSupport pOsSupport
723895766dSshatty ) : CGdDspCommObject( pdwRegBase, pOsSupport )
733895766dSshatty {
743895766dSshatty strcpy( m_szCardName, "Darla24" );
753895766dSshatty m_pdwDspRegBase = pdwRegBase; // Virtual addr DSP's register base
763895766dSshatty
773895766dSshatty m_wNumPipesOut = 8;
783895766dSshatty m_wNumPipesIn = 2;
793895766dSshatty m_wNumBussesOut = 8;
803895766dSshatty m_wNumBussesIn = 2;
813895766dSshatty m_wFirstDigitalBusOut = 8;
823895766dSshatty m_wFirstDigitalBusIn = 2;
833895766dSshatty
843895766dSshatty m_fHasVmixer = FALSE;
853895766dSshatty
863895766dSshatty m_wNumMidiOut = 0; // # MIDI out channels
873895766dSshatty m_wNumMidiIn = 0; // # MIDI in channels
883895766dSshatty m_pDspCommPage->dwSampleRate = SWAP( (DWORD) 44100 );
893895766dSshatty // Need this in case we start with ESYNC
903895766dSshatty
913895766dSshatty m_pwDspCodeToLoad = pwDarla24DSP;
923895766dSshatty
933895766dSshatty //
943895766dSshatty // Since this card has no ASIC, mark it as loaded so everything works OK
953895766dSshatty //
963895766dSshatty m_bASICLoaded = TRUE;
973895766dSshatty
983895766dSshatty } // CDarla24DspCommObject::CDarla24DspCommObject( DWORD dwPhysRegBase )
993895766dSshatty
1003895766dSshatty
1013895766dSshatty //===========================================================================
1023895766dSshatty //
1033895766dSshatty // Destructor
1043895766dSshatty //
1053895766dSshatty //===========================================================================
1063895766dSshatty
~CDarla24DspCommObject()1073895766dSshatty CDarla24DspCommObject::~CDarla24DspCommObject()
1083895766dSshatty {
1093895766dSshatty } // CDarla24DspCommObject::~CDarla24DspCommObject()
1103895766dSshatty
1113895766dSshatty
1123895766dSshatty
1133895766dSshatty
1143895766dSshatty /****************************************************************************
1153895766dSshatty
1163895766dSshatty Hardware config
1173895766dSshatty
1183895766dSshatty ****************************************************************************/
1193895766dSshatty
1203895766dSshatty //===========================================================================
1213895766dSshatty //
1223895766dSshatty // SetSampleRate
1233895766dSshatty //
1243895766dSshatty // Set the audio sample rate for Darla24; this is fairly simple. You
1253895766dSshatty // just pick the right magic number.
1263895766dSshatty //
1273895766dSshatty //===========================================================================
1283895766dSshatty
SetSampleRate(DWORD dwNewSampleRate)1293895766dSshatty DWORD CDarla24DspCommObject::SetSampleRate( DWORD dwNewSampleRate )
1303895766dSshatty {
1313895766dSshatty BYTE bClock;
1323895766dSshatty
1333895766dSshatty //
1343895766dSshatty // Pick the magic number
1353895766dSshatty //
1363895766dSshatty switch ( dwNewSampleRate )
1373895766dSshatty {
1383895766dSshatty case 96000 :
1393895766dSshatty bClock = GD24_96000;
1403895766dSshatty break;
1413895766dSshatty case 88200 :
1423895766dSshatty bClock = GD24_88200;
1433895766dSshatty break;
1443895766dSshatty case 48000 :
1453895766dSshatty bClock = GD24_48000;
1463895766dSshatty break;
1473895766dSshatty case 44100 :
1483895766dSshatty bClock = GD24_44100;
1493895766dSshatty break;
1503895766dSshatty case 32000 :
1513895766dSshatty bClock = GD24_32000;
1523895766dSshatty break;
1533895766dSshatty case 22050 :
1543895766dSshatty bClock = GD24_22050;
1553895766dSshatty break;
1563895766dSshatty case 16000 :
1573895766dSshatty bClock = GD24_16000;
1583895766dSshatty break;
1593895766dSshatty case 11025 :
1603895766dSshatty bClock = GD24_11025;
1613895766dSshatty break;
1623895766dSshatty case 8000 :
1633895766dSshatty bClock = GD24_8000;
1643895766dSshatty break;
1653895766dSshatty default :
1663895766dSshatty ECHO_DEBUGPRINTF( ("CDarla24DspCommObject::SetSampleRate: Error, "
1673895766dSshatty "invalid sample rate 0x%lx\n", dwNewSampleRate) );
1683895766dSshatty return 0xffffffff;
1693895766dSshatty }
1703895766dSshatty
1713895766dSshatty if ( !WaitForHandshake() )
1723895766dSshatty return 0xffffffff;
1733895766dSshatty
1743895766dSshatty //
1753895766dSshatty // Override the sample rate if this card is set to Echo sync.
1763895766dSshatty // m_pDspCommPage->wInputClock is just being used as a parameter here;
1773895766dSshatty // the DSP ignores it.
1783895766dSshatty //
1793895766dSshatty if ( ECHO_CLOCK_ESYNC == GetInputClock() )
1803895766dSshatty bClock = GD24_EXT_SYNC;
1813895766dSshatty
1823895766dSshatty m_pDspCommPage->dwSampleRate = SWAP( dwNewSampleRate );
1833895766dSshatty
1843895766dSshatty //
1853895766dSshatty // Write the audio state to the comm page
1863895766dSshatty //
1873895766dSshatty m_pDspCommPage->byGDClockState = bClock;
1883895766dSshatty
1893895766dSshatty // Send command to DSP
1903895766dSshatty ClearHandshake();
1913895766dSshatty SendVector( DSP_VC_SET_GD_AUDIO_STATE );
1923895766dSshatty
1933895766dSshatty ECHO_DEBUGPRINTF( ("CDarla24DspCommObject::SetSampleRate: 0x%lx "
194c2ddc71cSJérôme Duval "clock %d\n", dwNewSampleRate, bClock) );
1953895766dSshatty
1963895766dSshatty return GetSampleRate();
1973895766dSshatty
1983895766dSshatty } // DWORD CDarla24DspCommObject::SetSampleRate( DWORD dwNewSampleRate )
1993895766dSshatty
2003895766dSshatty
2013895766dSshatty //===========================================================================
2023895766dSshatty //
2033895766dSshatty // Set input clock
2043895766dSshatty //
2053895766dSshatty // Darla24 supports internal and Esync clock.
2063895766dSshatty //
2073895766dSshatty //===========================================================================
2083895766dSshatty
SetInputClock(WORD wClock)2093895766dSshatty ECHOSTATUS CDarla24DspCommObject::SetInputClock(WORD wClock)
2103895766dSshatty {
2113895766dSshatty if ( (ECHO_CLOCK_INTERNAL != wClock) &&
2123895766dSshatty (ECHO_CLOCK_ESYNC != wClock))
2133895766dSshatty return ECHOSTATUS_CLOCK_NOT_SUPPORTED;
2143895766dSshatty
2153895766dSshatty m_wInputClock = wClock;
2163895766dSshatty
2173895766dSshatty return SetSampleRate( GetSampleRate() );
2183895766dSshatty
2193895766dSshatty } // SetInputClock
2203895766dSshatty
2213895766dSshatty
2223895766dSshatty // **** Darla24DspCommObject.cpp ****
223