13895766dSshatty // ****************************************************************************
23895766dSshatty //
33895766dSshatty // CDarla24.cpp
43895766dSshatty //
53895766dSshatty // Implementation file for the CDarla24 driver class.
63895766dSshatty // Set editor tabs to 3 for your viewing pleasure.
73895766dSshatty //
8c2ddc71cSJérôme Duval // ----------------------------------------------------------------------------
9c2ddc71cSJérôme Duval //
10626bc4beSJérôme Duval // This file is part of Echo Digital Audio's generic driver library.
11626bc4beSJérôme Duval // Copyright Echo Digital Audio Corporation (c) 1998 - 2005
123895766dSshatty // All rights reserved
133895766dSshatty // www.echoaudio.com
143895766dSshatty //
15626bc4beSJérôme Duval // This library is free software; you can redistribute it and/or
16626bc4beSJérôme Duval // modify it under the terms of the GNU Lesser General Public
17626bc4beSJérôme Duval // License as published by the Free Software Foundation; either
18626bc4beSJérôme Duval // version 2.1 of the License, or (at your option) any later version.
193895766dSshatty //
20626bc4beSJérôme Duval // This library is distributed in the hope that it will be useful,
21c2ddc71cSJérôme Duval // but WITHOUT ANY WARRANTY; without even the implied warranty of
22626bc4beSJérôme Duval // MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
23626bc4beSJérôme Duval // Lesser General Public License for more details.
243895766dSshatty //
25626bc4beSJérôme Duval // You should have received a copy of the GNU Lesser General Public
26626bc4beSJérôme Duval // License along with this library; if not, write to the Free Software
27626bc4beSJérôme Duval // Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
283895766dSshatty //
293895766dSshatty // ****************************************************************************
303895766dSshatty
313895766dSshatty #include "CDarla24.h"
323895766dSshatty
33c2ddc71cSJérôme Duval #define DARLA24_ANALOG_OUTPUT_LATENCY 59
34c2ddc71cSJérôme Duval #define DARLA24_ANALOG_INPUT_LATENCY 71
35c2ddc71cSJérôme Duval
363895766dSshatty
373895766dSshatty /****************************************************************************
383895766dSshatty
393895766dSshatty Construction and destruction
403895766dSshatty
413895766dSshatty ****************************************************************************/
423895766dSshatty
433895766dSshatty //===========================================================================
443895766dSshatty //
453895766dSshatty // Overload new & delete so memory for this object is allocated
463895766dSshatty // from non-paged memory.
473895766dSshatty //
483895766dSshatty //===========================================================================
493895766dSshatty
operator new(size_t Size)503895766dSshatty PVOID CDarla24::operator new( size_t Size )
513895766dSshatty {
523895766dSshatty PVOID pMemory;
533895766dSshatty ECHOSTATUS Status;
543895766dSshatty
553895766dSshatty Status = OsAllocateNonPaged(Size,&pMemory);
563895766dSshatty
573895766dSshatty if ( (ECHOSTATUS_OK != Status) || (NULL == pMemory ))
583895766dSshatty {
593895766dSshatty ECHO_DEBUGPRINTF(("CDarla24::operator new - memory allocation failed\n"));
603895766dSshatty
613895766dSshatty pMemory = NULL;
623895766dSshatty }
633895766dSshatty else
643895766dSshatty {
653895766dSshatty memset( pMemory, 0, Size );
663895766dSshatty }
673895766dSshatty
683895766dSshatty return pMemory;
693895766dSshatty
703895766dSshatty } // PVOID CDarla24::operator new( size_t Size )
713895766dSshatty
723895766dSshatty
operator delete(PVOID pVoid)733895766dSshatty VOID CDarla24::operator delete( PVOID pVoid )
743895766dSshatty {
753895766dSshatty if ( ECHOSTATUS_OK != OsFreeNonPaged( pVoid ) )
763895766dSshatty {
773895766dSshatty ECHO_DEBUGPRINTF(("CDarla24::operator delete memory free failed\n"));
783895766dSshatty }
793895766dSshatty } // VOID CDarla24::operator delete( PVOID pVoid )
803895766dSshatty
813895766dSshatty
823895766dSshatty //===========================================================================
833895766dSshatty //
843895766dSshatty // Constructor and destructor
853895766dSshatty //
863895766dSshatty //===========================================================================
873895766dSshatty
CDarla24(PCOsSupport pOsSupport)883895766dSshatty CDarla24::CDarla24( PCOsSupport pOsSupport )
893895766dSshatty : CEchoGals( pOsSupport )
903895766dSshatty {
913895766dSshatty ECHO_DEBUGPRINTF( ( "CDarla24::CDarla24() is born!\n" ) );
92c2ddc71cSJérôme Duval
93c2ddc71cSJérôme Duval m_wAnalogOutputLatency = DARLA24_ANALOG_OUTPUT_LATENCY;
94c2ddc71cSJérôme Duval m_wAnalogInputLatency = DARLA24_ANALOG_INPUT_LATENCY;
95c2ddc71cSJérôme Duval
963895766dSshatty }
973895766dSshatty
~CDarla24()983895766dSshatty CDarla24::~CDarla24()
993895766dSshatty {
1003895766dSshatty ECHO_DEBUGPRINTF( ( "CDarla24::~CDarla24() is toast!\n" ) );
1013895766dSshatty }
1023895766dSshatty
1033895766dSshatty
1043895766dSshatty
1053895766dSshatty
1063895766dSshatty /****************************************************************************
1073895766dSshatty
1083895766dSshatty Setup and hardware initialization
1093895766dSshatty
1103895766dSshatty ****************************************************************************/
1113895766dSshatty
1123895766dSshatty //===========================================================================
1133895766dSshatty //
1143895766dSshatty // Every card has an InitHw method
1153895766dSshatty //
1163895766dSshatty //===========================================================================
1173895766dSshatty
InitHw()1183895766dSshatty ECHOSTATUS CDarla24::InitHw()
1193895766dSshatty {
1203895766dSshatty ECHOSTATUS Status;
1213895766dSshatty WORD i;
1223895766dSshatty
1233895766dSshatty //
1243895766dSshatty // Call the base method
1253895766dSshatty //
1263895766dSshatty if ( ECHOSTATUS_OK != ( Status = CEchoGals::InitHw() ) )
1273895766dSshatty return Status;
1283895766dSshatty
1293895766dSshatty //
1303895766dSshatty // Create the DSP comm object
1313895766dSshatty //
132*4dd9e436SJérôme Duval ECHO_ASSERT(NULL == m_pDspCommObject );
1333895766dSshatty m_pDspCommObject = new CDarla24DspCommObject( (PDWORD) m_pvSharedMemory,
1343895766dSshatty m_pOsSupport );
1353895766dSshatty if (NULL == m_pDspCommObject)
1363895766dSshatty {
1373895766dSshatty ECHO_DEBUGPRINTF(("CDarla24::InitHw - could not create DSP comm object\n"));
1383895766dSshatty return ECHOSTATUS_NO_MEM;
1393895766dSshatty }
1403895766dSshatty
1413895766dSshatty //
1423895766dSshatty // Load the DSP
1433895766dSshatty //
1443895766dSshatty GetDspCommObject()->LoadFirmware();
1453895766dSshatty if ( GetDspCommObject()->IsBoardBad() )
1463895766dSshatty return ECHOSTATUS_DSP_DEAD;
1473895766dSshatty
1483895766dSshatty //
1493895766dSshatty // Clear the "bad board" flag; set the flag to indicate that
1503895766dSshatty // Darla24 can handle super-interleave.
1513895766dSshatty //
1523895766dSshatty m_wFlags &= ~ECHOGALS_FLAG_BADBOARD;
1533895766dSshatty m_wFlags |= ECHOGALS_ROFLAG_SUPER_INTERLEAVE_OK;
1543895766dSshatty
1553895766dSshatty //
1563895766dSshatty // Must call this here after DSP is init to
1573895766dSshatty // init gains
1583895766dSshatty //
1593895766dSshatty Status = InitLineLevels();
1603895766dSshatty if ( ECHOSTATUS_OK != Status )
1613895766dSshatty return Status;
1623895766dSshatty
1633895766dSshatty //
1643895766dSshatty // Set defaults for +4/-10
1653895766dSshatty //
1663895766dSshatty for (i = 0; i < GetNumBusses(); i++ )
1673895766dSshatty {
1683895766dSshatty GetDspCommObject()->SetNominalLevel( i, FALSE ); // FALSE is +4 here
1693895766dSshatty }
1703895766dSshatty
1713895766dSshatty //
1723895766dSshatty // Get default sample rate from DSP
1733895766dSshatty //
1743895766dSshatty m_dwSampleRate = GetDspCommObject()->GetSampleRate();
1753895766dSshatty ECHO_DEBUGPRINTF( ( "CDarla24::InitHw()\n" ) );
1763895766dSshatty
1773895766dSshatty return Status;
1783895766dSshatty
1793895766dSshatty } // ECHOSTATUS CDarla24::InitHw()
1803895766dSshatty
1813895766dSshatty
1823895766dSshatty
1833895766dSshatty
1843895766dSshatty /****************************************************************************
1853895766dSshatty
1863895766dSshatty Informational methods
1873895766dSshatty
1883895766dSshatty ****************************************************************************/
1893895766dSshatty
1903895766dSshatty //===========================================================================
1913895766dSshatty //
192c2ddc71cSJérôme Duval // Override GetCapabilities to enumerate unique capabilties for this card
1933895766dSshatty //
1943895766dSshatty //===========================================================================
1953895766dSshatty
GetCapabilities(PECHOGALS_CAPS pCapabilities)1963895766dSshatty ECHOSTATUS CDarla24::GetCapabilities
1973895766dSshatty (
1983895766dSshatty PECHOGALS_CAPS pCapabilities
1993895766dSshatty )
2003895766dSshatty {
2013895766dSshatty ECHOSTATUS Status;
2023895766dSshatty WORD i;
2033895766dSshatty
2043895766dSshatty Status = GetBaseCapabilities(pCapabilities);
2053895766dSshatty
2063895766dSshatty //
2073895766dSshatty // Add nominal level control to in & out busses
2083895766dSshatty //
2093895766dSshatty for (i = 0 ; i < GetNumBussesOut(); i++)
2103895766dSshatty {
2113895766dSshatty pCapabilities->dwBusOutCaps[i] |= ECHOCAPS_NOMINAL_LEVEL;
2123895766dSshatty }
2133895766dSshatty
2143895766dSshatty for (i = 0 ; i < GetNumBussesIn(); i++)
2153895766dSshatty {
2163895766dSshatty pCapabilities->dwBusInCaps[i] |= ECHOCAPS_NOMINAL_LEVEL;
2173895766dSshatty }
2183895766dSshatty
2193895766dSshatty if ( ECHOSTATUS_OK != Status )
2203895766dSshatty return Status;
2213895766dSshatty
2223895766dSshatty pCapabilities->dwInClockTypes |= ECHO_CLOCK_BIT_ESYNC;
2233895766dSshatty
2243895766dSshatty return Status;
2253895766dSshatty
2263895766dSshatty } // ECHOSTATUS CDarla24::GetCapabilities
2273895766dSshatty
2283895766dSshatty
2293895766dSshatty //===========================================================================
2303895766dSshatty //
2313895766dSshatty // GetInputClockDetect returns a bitmask consisting of all the input
2323895766dSshatty // clocks currently connected to the hardware; this changes as the user
2333895766dSshatty // connects and disconnects clock inputs.
2343895766dSshatty //
2353895766dSshatty // You should use this information to determine which clocks the user is
2363895766dSshatty // allowed to select.
2373895766dSshatty //
2383895766dSshatty // Darla24 only supports Esync input clock.
2393895766dSshatty //
2403895766dSshatty //===========================================================================
2413895766dSshatty
GetInputClockDetect(DWORD & dwClockDetectBits)2423895766dSshatty ECHOSTATUS CDarla24::GetInputClockDetect(DWORD &dwClockDetectBits)
2433895766dSshatty {
2443895766dSshatty if ( NULL == GetDspCommObject() || GetDspCommObject()->IsBoardBad() )
2453895766dSshatty {
2463895766dSshatty ECHO_DEBUGPRINTF( ("CDarla24::GetInputClockDetect: DSP Dead!\n") );
2473895766dSshatty return ECHOSTATUS_DSP_DEAD;
2483895766dSshatty }
2493895766dSshatty
2503895766dSshatty DWORD dwClocksFromDsp = GetDspCommObject()->GetInputClockDetect();
2513895766dSshatty
2523895766dSshatty dwClockDetectBits = ECHO_CLOCK_BIT_INTERNAL;
2533895766dSshatty
2543895766dSshatty if (0 != (dwClocksFromDsp & GLDM_CLOCK_DETECT_BIT_ESYNC))
2553895766dSshatty dwClockDetectBits |= ECHO_CLOCK_BIT_ESYNC;
2563895766dSshatty
2573895766dSshatty return ECHOSTATUS_OK;
2583895766dSshatty
2593895766dSshatty } // GetInputClockDetect
2603895766dSshatty
2613895766dSshatty
2623895766dSshatty //===========================================================================
2633895766dSshatty //
2643895766dSshatty // QueryAudioSampleRate is used to find out if this card can handle a
2653895766dSshatty // given sample rate.
2663895766dSshatty //
2673895766dSshatty //===========================================================================
2683895766dSshatty
QueryAudioSampleRate(DWORD dwSampleRate)2693895766dSshatty ECHOSTATUS CDarla24::QueryAudioSampleRate
2703895766dSshatty (
2713895766dSshatty DWORD dwSampleRate
2723895766dSshatty )
2733895766dSshatty {
2743895766dSshatty if ( dwSampleRate != 8000 &&
2753895766dSshatty dwSampleRate != 11025 &&
2763895766dSshatty dwSampleRate != 16000 &&
2773895766dSshatty dwSampleRate != 22050 &&
2783895766dSshatty dwSampleRate != 32000 &&
2793895766dSshatty dwSampleRate != 44100 &&
2803895766dSshatty dwSampleRate != 48000 &&
2813895766dSshatty dwSampleRate != 88200 &&
2823895766dSshatty dwSampleRate != 96000 )
2833895766dSshatty {
2843895766dSshatty ECHO_DEBUGPRINTF(
285c2ddc71cSJérôme Duval ("CDarla24::QueryAudioSampleRate() - rate %ld invalid\n",
286c2ddc71cSJérôme Duval dwSampleRate) );
2873895766dSshatty return ECHOSTATUS_BAD_FORMAT;
2883895766dSshatty }
2893895766dSshatty
2903895766dSshatty ECHO_DEBUGPRINTF( ( "CDarla24::QueryAudioSampleRate()\n" ) );
2913895766dSshatty return ECHOSTATUS_OK;
2923895766dSshatty
2933895766dSshatty } // ECHOSTATUS CDarla24::QueryAudioSampleRate
2943895766dSshatty
QuerySampleRateRange(DWORD & dwMinRate,DWORD & dwMaxRate)295*4dd9e436SJérôme Duval void CDarla24::QuerySampleRateRange(DWORD &dwMinRate,DWORD &dwMaxRate)
296*4dd9e436SJérôme Duval {
297*4dd9e436SJérôme Duval dwMinRate = 8000;
298*4dd9e436SJérôme Duval dwMaxRate = 96000;
299*4dd9e436SJérôme Duval }
300*4dd9e436SJérôme Duval
301*4dd9e436SJérôme Duval
3023895766dSshatty
3033895766dSshatty // *** CDarla24.cpp ***
304