xref: /haiku/src/add-ons/kernel/drivers/audio/ac97/auvia/io.c (revision 5076aaf050c0d14aa59d2e32952207124da35f2a)
1822fd939SJérôme Duval /*
2822fd939SJérôme Duval  * Auvia BeOS Driver for Via VT82xx Southbridge audio
3822fd939SJérôme Duval  *
4822fd939SJérôme Duval  * Copyright (c) 2003, Jerome Duval (jerome.duval@free.fr)
5822fd939SJérôme Duval  *
6822fd939SJérôme Duval  * Original code : BeOS Driver for Intel ICH AC'97 Link interface
7822fd939SJérôme Duval  * Copyright (c) 2002, Marcus Overhagen <marcus@overhagen.de>
8822fd939SJérôme Duval  *
9822fd939SJérôme Duval  * All rights reserved.
10822fd939SJérôme Duval  * Redistribution and use in source and binary forms, with or without modification,
11822fd939SJérôme Duval  * are permitted provided that the following conditions are met:
12822fd939SJérôme Duval  *
13822fd939SJérôme Duval  * - Redistributions of source code must retain the above copyright notice,
14822fd939SJérôme Duval  *   this list of conditions and the following disclaimer.
15822fd939SJérôme Duval  * - Redistributions in binary form must reproduce the above copyright notice,
16822fd939SJérôme Duval  *   this list of conditions and the following disclaimer in the documentation
17822fd939SJérôme Duval  *   and/or other materials provided with the distribution.
18822fd939SJérôme Duval  *
19822fd939SJérôme Duval  * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" AND
20822fd939SJérôme Duval  * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
21822fd939SJérôme Duval  * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
22822fd939SJérôme Duval  * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR
23822fd939SJérôme Duval  * ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
24822fd939SJérôme Duval  * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
25822fd939SJérôme Duval  * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
26822fd939SJérôme Duval  * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING
27822fd939SJérôme Duval  * NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE,
28822fd939SJérôme Duval  * EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
29822fd939SJérôme Duval  *
30822fd939SJérôme Duval  */
31822fd939SJérôme Duval #include <KernelExport.h>
32822fd939SJérôme Duval #include <OS.h>
33822fd939SJérôme Duval #include "io.h"
34822fd939SJérôme Duval #include "auviareg.h"
35822fd939SJérôme Duval #include "debug.h"
36df41cb25SJérôme Duval #include <PCI.h>
37822fd939SJérôme Duval 
38df41cb25SJérôme Duval extern pci_module_info  *pci;
39822fd939SJérôme Duval 
40822fd939SJérôme Duval uint8
auvia_reg_read_8(device_config * config,int regno)41822fd939SJérôme Duval auvia_reg_read_8(device_config *config, int regno)
42822fd939SJérôme Duval {
43df41cb25SJérôme Duval 	return pci->read_io_8(config->nabmbar + regno);
44822fd939SJérôme Duval }
45822fd939SJérôme Duval 
46822fd939SJérôme Duval uint16
auvia_reg_read_16(device_config * config,int regno)47822fd939SJérôme Duval auvia_reg_read_16(device_config *config, int regno)
48822fd939SJérôme Duval {
49df41cb25SJérôme Duval 	return pci->read_io_16(config->nabmbar + regno);
50822fd939SJérôme Duval }
51822fd939SJérôme Duval 
52822fd939SJérôme Duval uint32
auvia_reg_read_32(device_config * config,int regno)53822fd939SJérôme Duval auvia_reg_read_32(device_config *config, int regno)
54822fd939SJérôme Duval {
55df41cb25SJérôme Duval 	return pci->read_io_32(config->nabmbar + regno);
56822fd939SJérôme Duval }
57822fd939SJérôme Duval 
58822fd939SJérôme Duval void
auvia_reg_write_8(device_config * config,int regno,uint8 value)59822fd939SJérôme Duval auvia_reg_write_8(device_config *config, int regno, uint8 value)
60822fd939SJérôme Duval {
61df41cb25SJérôme Duval 	pci->write_io_8(config->nabmbar + regno, value);
62822fd939SJérôme Duval }
63822fd939SJérôme Duval 
64822fd939SJérôme Duval void
auvia_reg_write_16(device_config * config,int regno,uint16 value)65822fd939SJérôme Duval auvia_reg_write_16(device_config *config, int regno, uint16 value)
66822fd939SJérôme Duval {
67df41cb25SJérôme Duval 	pci->write_io_16(config->nabmbar + regno, value);
68822fd939SJérôme Duval }
69822fd939SJérôme Duval 
70822fd939SJérôme Duval void
auvia_reg_write_32(device_config * config,int regno,uint32 value)71822fd939SJérôme Duval auvia_reg_write_32(device_config *config, int regno, uint32 value)
72822fd939SJérôme Duval {
73df41cb25SJérôme Duval 	pci->write_io_32(config->nabmbar + regno, value);
74822fd939SJérôme Duval }
75822fd939SJérôme Duval 
76822fd939SJérôme Duval /* codec */
77822fd939SJérôme Duval 
78822fd939SJérôme Duval #define AUVIA_TIMEOUT 	200
79822fd939SJérôme Duval 
800450cf24SJérôme Duval static int
auvia_codec_waitready(device_config * config)81822fd939SJérôme Duval auvia_codec_waitready(device_config *config)
82822fd939SJérôme Duval {
83822fd939SJérôme Duval 	int i;
84822fd939SJérôme Duval 
85822fd939SJérôme Duval 	/* poll until codec not busy */
86df41cb25SJérôme Duval 	for(i = 0; (i < AUVIA_TIMEOUT) && (pci->read_io_32(config->nabmbar
87822fd939SJérôme Duval 		+ AUVIA_CODEC_CTL) & AUVIA_CODEC_BUSY) ; i++)
88*e9edc48dSJérôme Duval 		spin(1);
89822fd939SJérôme Duval 	if(i>=AUVIA_TIMEOUT) {
90822fd939SJérôme Duval 		//PRINT(("codec busy\n"));
91822fd939SJérôme Duval 		return B_ERROR;
92822fd939SJérôme Duval 	}
93822fd939SJérôme Duval 	return B_OK;
94822fd939SJérôme Duval }
95822fd939SJérôme Duval 
960450cf24SJérôme Duval static int
auvia_codec_waitvalid(device_config * config)97822fd939SJérôme Duval auvia_codec_waitvalid(device_config *config)
98822fd939SJérôme Duval {
99822fd939SJérôme Duval 	int i;
100822fd939SJérôme Duval 
101822fd939SJérôme Duval 	/* poll until codec valid */
102df41cb25SJérôme Duval 	for(i = 0; (i < AUVIA_TIMEOUT) && !(pci->read_io_32(config->nabmbar
103822fd939SJérôme Duval 		+ AUVIA_CODEC_CTL) & AUVIA_CODEC_PRIVALID) ; i++)
104*e9edc48dSJérôme Duval 		spin(1);
105822fd939SJérôme Duval 	if(i>=AUVIA_TIMEOUT) {
106822fd939SJérôme Duval 		//PRINT(("codec invalid\n"));
107822fd939SJérôme Duval 		return B_ERROR;
108822fd939SJérôme Duval 	}
109822fd939SJérôme Duval 	return B_OK;
110822fd939SJérôme Duval }
111822fd939SJérôme Duval 
112822fd939SJérôme Duval uint16
auvia_codec_read(device_config * config,int regno)113822fd939SJérôme Duval auvia_codec_read(device_config *config, int regno)
114822fd939SJérôme Duval {
115822fd939SJérôme Duval 	if(auvia_codec_waitready(config)!=B_OK) {
116822fd939SJérôme Duval 		PRINT(("codec busy (1)\n"));
117822fd939SJérôme Duval 		return -1;
118822fd939SJérôme Duval 	}
119df41cb25SJérôme Duval 	pci->write_io_32(config->nabmbar + AUVIA_CODEC_CTL,
120822fd939SJérôme Duval 		AUVIA_CODEC_PRIVALID | AUVIA_CODEC_READ | AUVIA_CODEC_INDEX(regno));
121822fd939SJérôme Duval 
122822fd939SJérôme Duval 	if(auvia_codec_waitready(config)!=B_OK) {
123822fd939SJérôme Duval 		PRINT(("codec busy (2)\n"));
124822fd939SJérôme Duval 		return -1;
125822fd939SJérôme Duval 	}
126822fd939SJérôme Duval 	if(auvia_codec_waitvalid(config)!=B_OK) {
127822fd939SJérôme Duval 		PRINT(("codec invalid (3)\n"));
128822fd939SJérôme Duval 		return -1;
129822fd939SJérôme Duval 	}
130822fd939SJérôme Duval 
131df41cb25SJérôme Duval 	return pci->read_io_16(config->nabmbar + AUVIA_CODEC_CTL);
132822fd939SJérôme Duval }
133822fd939SJérôme Duval 
134822fd939SJérôme Duval void
auvia_codec_write(device_config * config,int regno,uint16 value)135822fd939SJérôme Duval auvia_codec_write(device_config *config, int regno, uint16 value)
136822fd939SJérôme Duval {
137822fd939SJérôme Duval 	if(auvia_codec_waitready(config)!=B_OK) {
138822fd939SJérôme Duval 		PRINT(("codec busy (4)\n"));
139822fd939SJérôme Duval 		return;
140822fd939SJérôme Duval 	}
141df41cb25SJérôme Duval 	pci->write_io_32(config->nabmbar + AUVIA_CODEC_CTL,
142822fd939SJérôme Duval 		AUVIA_CODEC_PRIVALID | AUVIA_CODEC_INDEX(regno) | value);
143822fd939SJérôme Duval }
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