1 //------------------------------------------------------------------------------ 2 // Copyright (c) 2003-2004, Niels S. Reedijk 3 // 4 // Permission is hereby granted, free of charge, to any person obtaining a 5 // copy of this software and associated documentation files (the "Software"), 6 // to deal in the Software without restriction, including without limitation 7 // the rights to use, copy, modify, merge, publish, distribute, sublicense, 8 // and/or sell copies of the Software, and to permit persons to whom the 9 // Software is furnished to do so, subject to the following conditions: 10 // 11 // The above copyright notice and this permission notice shall be included in 12 // all copies or substantial portions of the Software. 13 // 14 // THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR 15 // IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, 16 // FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE 17 // AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER 18 // LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING 19 // FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER 20 // DEALINGS IN THE SOFTWARE. 21 22 #ifndef UHCI_HARDWARE_H 23 #define UHCI_HARDWARE_H 24 25 /************************************************************ 26 * The Registers * 27 ************************************************************/ 28 29 30 // R/W -- Read/Write 31 // R/WC -- Read/Write Clear 32 // ** -- Only writable with words! 33 34 // PCI register 35 #define PCI_LEGSUP 0xC0 36 #define PCI_LEGSUP_USBPIRQDEN 0x2000 37 38 // Registers 39 #define UHCI_USBCMD 0x0 // USB Command - word - R/W 40 #define UHCI_USBSTS 0x2 // USB Status - word - R/WC 41 #define UHCI_USBINTR 0x4 // USB Interrupt Enable - word - R/W 42 #define UHCI_FRNUM 0x6 // Frame number - word - R/W** 43 #define UHCI_FRBASEADD 0x08 // Frame List BAse Address - dword - R/W 44 #define UHCI_SOFMOD 0xC // Start of Frame Modify - byte - R/W 45 #define UHCI_PORTSC1 0x10 // Port 1 Status/Control - word - R/WC** 46 #define UHCI_PORTSC2 0x12 // Port 2 Status/Control - word - R/WC** 47 48 // USBCMD 49 #define UHCI_USBCMD_RS 0x1 // Run/Stop 50 #define UHCI_USBCMD_HCRESET 0x2 // Host Controller Reset 51 #define UHCI_USBCMD_GRESET 0x4 // Global Reset 52 #define UHCI_USBCMD_EGSM 0x8 // Enter Global Suspensd mode 53 #define UHCI_USBCMD_FGR 0x10 // Force Global resume 54 #define UHCI_USBCMD_SWDBG 0x20 // Software Debug 55 #define UHCI_USBCMD_CF 0x40 // Configure Flag 56 57 //USBSTS 58 #define UHCI_USBSTS_USBINT 0x1 // USB interrupt 59 #define UHCI_USBSTS_ERRINT 0x2 // USB error interrupt 60 #define UHCI_USBSTS_RESDET 0x4 // Resume Detect 61 #define UHCI_USBSTS_HOSTERR 0x8 // Host System Error 62 #define UHCI_USBSTS_HCPRERR 0x10// Host Controller Process error 63 #define UHCI_USBSTS_HCHALT 0x20 // HCHalted 64 #define UHCI_INTERRUPT_MASK 0x1F //Mask for all the interrupts 65 66 //USBINTR 67 #define UHCI_USBINTR_CRC 0x1 // Timeout/ CRC interrupt enable 68 #define UHCI_USBINTR_RESUME 0x2 // Resume interrupt enable 69 #define UHCI_USBINTR_IOC 0x4 // Interrupt on complete enable 70 #define UHCI_USBINTR_SHORT 0x8 // Short packet interrupt enable 71 72 //PORTSC 73 #define UHCI_PORTSC_CURSTAT 0x1 // Current connect status 74 #define UHCI_PORTSC_STATCHA 0x2 // Current connect status change 75 #define UHCI_PORTSC_ENABLED 0x4 // Port enabled/disabled 76 #define UHCI_PORTSC_ENABCHA 0x8 // Change in enabled/disabled 77 #define UHCI_PORTSC_LINE_0 0x10 // The status of D+ /D- 78 #define UHCI_PORTSC_LINE_1 0x20 79 #define UHCI_PORTSC_RESUME 0x40 // Something with the suspend state ??? 80 #define UHCI_PORTSC_LOWSPEED 0x100// Low speed device attached? 81 #define UHCI_PORTSC_RESET 0x200// Port is in reset 82 #define UHCI_PORTSC_SUSPEND 0x1000//Set port in suspend state 83 84 #define UHCI_PORTSC_DATAMASK 0x13F5 //Mask that excludes the change bits of portsc 85 86 /************************************************************ 87 * Hardware structs * 88 ************************************************************/ 89 90 //A framelist thingie 91 #define FRAMELIST_TERMINATE 0x1 92 #define FRAMELIST_NEXT_IS_QH 0x2 93 94 95 //Represents a Transfer Descriptor (TD) 96 97 typedef struct 98 { 99 //Hardware part 100 addr_t link_phy; // Link to the next TD/QH 101 uint32 status; // Status field 102 uint32 token; // Contains the packet header (where it needs to be sent) 103 void * buffer_phy; // A pointer to the buffer with the actual packet 104 // Software part 105 addr_t this_phy; // A physical pointer to this address 106 void * link_log; // Link to the next logical TD/QT 107 void * buffer_log; // Link to the buffer 108 } uhci_td; 109 110 #define TD_STATUS_LOWSPEED ( 1 << 26 ) 111 #define TD_STATUS_IOS ( 1 << 25 ) 112 #define TD_STATUS_IOC ( 1 << 24 ) 113 #define TD_STATUS_ACTIVE ( 1 << 23 ) 114 #define TD_TOKEN_DATA1 ( 1 << 19 ) 115 #define TD_TOKEN_NULL (0x7FF << 21 ) 116 #define TD_TOKEN_DEVADDR_SHIFT 8 117 #define TD_DEPTH_FIRST 0x4 118 #define TD_TERMINATE 0x1 119 120 //Represents a Queue Head (QH) 121 122 typedef struct 123 { 124 // Hardware part 125 addr_t link_phy; //Link to the next TD/QH 126 addr_t element_phy; //Link to the first element pointer in the queue 127 // Software part 128 addr_t this_phy; //The physical pointer to this address 129 void * link_log; //Link to the next TD/QH logical 130 void * element_log; // 131 } uhci_qh; 132 133 #define QH_TERMINATE 0x1 134 #define QH_NEXT_IS_QH 0x2 135 136 /************************************************************ 137 * Roothub Emulation * 138 ************************************************************/ 139 #define RH_GET_STATUS 0 140 #define RH_CLEAR_FEATURE 1 141 #define RH_SET_FEATURE 3 142 #define RH_SET_ADDRESS 5 143 #define RH_GET_DESCRIPTOR 6 144 #define RH_SET_CONFIG 9 145 146 //Descriptors (in usb_request_data->Value) 147 #define RH_DEVICE_DESCRIPTOR ( 1 << 8 ) 148 #define RH_CONFIG_DESCRIPTOR ( 2 << 8 ) 149 #define RH_INTERFACE_DESCRIPTOR ( 4 << 8 ) 150 #define RH_ENDPOINT_DESCRIPTOR ( 5 << 8 ) 151 #define RH_HUB_DESCRIPTOR ( 0x29 << 8 ) 152 153 //Hub/Portstatus buffer 154 typedef struct 155 { 156 uint16 status; 157 uint16 change; 158 } get_status_buffer; 159 160 #endif 161