xref: /haiku/src/add-ons/kernel/busses/usb/uhci.h (revision cd552c7a15cc10c36dae8d7439ba1d6c0bb168c5)
1 /*
2  * Copyright 2004-2006, Haiku Inc. All rights reserved.
3  * Distributed under the terms of the MIT License.
4  *
5  * Authors:
6  *		Niels S. Reedijk
7  */
8 
9 #ifndef UHCI_H
10 #define UHCI_H
11 
12 #include "usb_p.h"
13 #include "uhci_hardware.h"
14 
15 struct pci_info;
16 struct pci_module_info;
17 class UHCIRootHub;
18 
19 
20 class Queue {
21 public:
22 									Queue(Stack *stack);
23 									~Queue();
24 
25 		status_t					InitCheck();
26 
27 		status_t					LinkTo(Queue *other);
28 		status_t					TerminateByStrayDescriptor();
29 
30 		status_t					AppendDescriptor(uhci_td *descriptor);
31 		status_t					AddRequest(Transfer *transfer,
32 										bigtime_t timeout);
33 		status_t					RemoveInactiveDescriptors();
34 
35 		addr_t						PhysicalAddress();
36 
37 		void						PrintToStream();
38 
39 private:
40 		status_t					fStatus;
41 		Stack						*fStack;
42 		uhci_qh						*fQueueHead;
43 		uhci_td						*fStrayDescriptor;
44 		uhci_td						*fQueueTop;
45 };
46 
47 
48 class UHCI : public BusManager {
49 public:
50 									UHCI(pci_info *info, Stack *stack);
51 
52 		status_t					Start();
53 		status_t					SubmitTransfer(Transfer *transfer,
54 										bigtime_t timeout = 0);
55 
56 static	bool						AddTo(Stack &stack);
57 
58 		void						GlobalReset();
59 		status_t					ResetController();
60 
61 		// port operations
62 		uint16						PortStatus(int32 index);
63 		status_t					SetPortStatus(int32 index, uint16 status);
64 		status_t					ResetPort(int32 index);
65 
66 private:
67 		// Utility functions
68 static	int32						InterruptHandler(void *data);
69 		int32						Interrupt();
70 
71 		// Register functions
72 inline	void						WriteReg16(uint32 reg, uint16 value);
73 inline	void						WriteReg32(uint32 reg, uint32 value);
74 inline	uint16						ReadReg16(uint32 reg);
75 inline	uint32						ReadReg32(uint32 reg);
76 
77 static	pci_module_info				*sPCIModule;
78 
79 		uint32						fRegisterBase;
80 		pci_info					*fPCIInfo;
81 		Stack						*fStack;
82 
83 		// Frame list memory
84 		area_id						fFrameArea;
85 		addr_t						*fFrameList;
86 
87 		// Queues
88 		int32						fQueueCount;
89 		Queue						*fQueues[];
90 
91 		// Maintain a list of transfers
92 		Vector<Transfer *>			fTransfers;
93 
94 		// Root hub
95 		UHCIRootHub					*fRootHub;
96 		uint8						fRootHubAddress;
97 };
98 
99 
100 class UHCIRootHub : public Hub {
101 public:
102 									UHCIRootHub(UHCI *uhci, int8 deviceNum);
103 
104 		status_t					SubmitTransfer(Transfer *transfer);
105 		void						UpdatePortStatus();
106 
107 private:
108 
109 		usb_port_status				fPortStatus[2];
110 		UHCI						*fUHCI;
111 };
112 
113 
114 struct hostcontroller_priv {
115 	uhci_qh		*topqh;
116 	uhci_td		*firsttd;
117 	uhci_td		*lasttd;
118 };
119 
120 #endif
121