xref: /haiku/src/add-ons/kernel/bus_managers/pci/pci_private.h (revision 90ca02568835b140b0e59de496a7f1f1d3513f67)
1 /*
2  * Copyright 2005-2008, Axel Dörfler, axeld@pinc-software.de. All rights reserved.
3  * Copyright 2003-2006, Marcus Overhagen. All rights reserved.
4  *
5  * Distributed under the terms of the MIT License.
6  */
7 #ifndef __PCI_PRIV_H__
8 #define __PCI_PRIV_H__
9 
10 
11 #include <KernelExport.h>
12 #include <device_manager.h>
13 #include <bus/PCI.h>
14 
15 
16 // name of PCI device modules
17 #define PCI_DEVICE_MODULE_NAME "bus_managers/pci/driver_v1"
18 
19 extern device_manager_info *gDeviceManager;
20 
21 
22 // PCI root.
23 // apart from being the common parent of all PCI devices, it
24 // manages access to PCI config space
25 typedef struct pci_root_module_info {
26 	driver_module_info info;
27 
28 	// read PCI config space
29 	uint32 (*read_pci_config)(uint8 bus, uint8 device, uint8 function,
30 				uint8 offset, uint8 size);
31 
32 	// write PCI config space
33 	void (*write_pci_config)(uint8 bus, uint8 device, uint8 function,
34 				uint8 offset, uint8 size, uint32 value);
35 } pci_root_module_info;
36 
37 extern pci_root_module_info gPCIRootModule;
38 extern pci_device_module_info gPCIDeviceModule;
39 
40 
41 #ifdef __cplusplus
42 extern "C" {
43 #endif
44 
45 void *		pci_ram_address(const void *physical_address_in_system_memory);
46 
47 status_t 	pci_find_capability(uchar bus, uchar device, uchar function, uchar cap_id, uchar *offset);
48 
49 status_t 	pci_io_init(void);
50 uint8		pci_read_io_8(int mapped_io_addr);
51 void		pci_write_io_8(int mapped_io_addr, uint8 value);
52 uint16		pci_read_io_16(int mapped_io_addr);
53 void		pci_write_io_16(int mapped_io_addr, uint16 value);
54 uint32		pci_read_io_32(int mapped_io_addr);
55 void		pci_write_io_32(int mapped_io_addr, uint32 value);
56 
57 #ifdef __cplusplus
58 }
59 #endif
60 
61 #endif	/* __PCI_PRIV_H__ */
62