xref: /haiku/src/add-ons/kernel/bus_managers/pci/pci_private.h (revision 52f7c9389475e19fc21487b38064b4390eeb6fea)
1 /*
2  * Copyright 2005-2008, Axel Dörfler, axeld@pinc-software.de. All rights reserved.
3  * Copyright 2003-2006, Marcus Overhagen. All rights reserved.
4  *
5  * Distributed under the terms of the MIT License.
6  */
7 #ifndef __PCI_PRIV_H__
8 #define __PCI_PRIV_H__
9 
10 
11 #include <KernelExport.h>
12 #include <device_manager.h>
13 #include <bus/PCI.h>
14 
15 // name of PCI legacy driver endpoint module
16 #define PCI_LEGACY_DRIVER_MODULE_NAME "bus_managers/pci/legacy_v1"
17 
18 // name of PCI device modules
19 #define PCI_DEVICE_MODULE_NAME "bus_managers/pci/driver_v1"
20 
21 extern device_manager_info *gDeviceManager;
22 
23 
24 // PCI root.
25 // apart from being the common parent of all PCI devices, it
26 // manages access to PCI config space
27 typedef struct pci_root_module_info {
28 	driver_module_info info;
29 
30 	// read PCI config space
31 	uint32 (*read_pci_config)(uint8 bus, uint8 device, uint8 function,
32 				uint16 offset, uint8 size);
33 
34 	// write PCI config space
35 	void (*write_pci_config)(uint8 bus, uint8 device, uint8 function,
36 				uint16 offset, uint8 size, uint32 value);
37 } pci_root_module_info;
38 
39 extern pci_root_module_info gPCIRootModule;
40 extern pci_device_module_info gPCIDeviceModule;
41 
42 extern device_node* gPCIRootNode;
43 
44 
45 #ifdef __cplusplus
46 extern "C" {
47 #endif
48 
49 phys_addr_t		pci_ram_address(phys_addr_t physical_address_in_system_memory);
50 
51 status_t 	pci_find_capability(uint8 bus, uint8 device, uint8 function,
52 	uint8 cap_id, uint8 *offset);
53 status_t 	pci_find_extended_capability(uint8 bus, uint8 device, uint8 function,
54 	uint16 cap_id, uint16 *offset);
55 
56 status_t	pci_reserve_device(uchar virtualBus, uchar device, uchar function,
57 			const char *driverName, void *nodeCookie);
58 status_t	pci_unreserve_device(uchar virtualBus, uchar device, uchar function,
59 			const char *driverName, void *nodeCookie);
60 
61 status_t	pci_update_interrupt_line(uchar virtualBus, uchar device,
62 				uchar function, uchar newInterruptLineValue);
63 status_t	pci_get_powerstate(uchar virtualBus, uint8 device,
64 				uint8 function, uint8* state);
65 status_t 	pci_set_powerstate(uchar virtualBus, uint8 device,
66 				uint8 function, uint8 newState);
67 
68 status_t 	pci_io_init(void);
69 uint8		pci_read_io_8(int mapped_io_addr);
70 void		pci_write_io_8(int mapped_io_addr, uint8 value);
71 uint16		pci_read_io_16(int mapped_io_addr);
72 void		pci_write_io_16(int mapped_io_addr, uint16 value);
73 uint32		pci_read_io_32(int mapped_io_addr);
74 void		pci_write_io_32(int mapped_io_addr, uint32 value);
75 
76 #ifdef __cplusplus
77 }
78 #endif
79 
80 #endif	/* __PCI_PRIV_H__ */
81