xref: /haiku/src/add-ons/kernel/bus_managers/pci/pci.h (revision d3d8b26997fac34a84981e6d2b649521de2cc45a)
1 /*
2  * Copyright 2006, Marcus Overhagen. All rights reserved.
3  * Copyright 2005, Axel Dörfler, axeld@pinc-software.de. All rights reserved.
4  * Copyright 2003, Marcus Overhagen. All rights reserved.
5  *
6  * Distributed under the terms of the MIT License.
7  */
8 #ifndef __PCI_H__
9 #define __PCI_H__
10 
11 #include <PCI.h>
12 
13 #include "pci_controller.h"
14 
15 
16 #define TRACE_PCI
17 #ifndef TRACE_PCI
18 #	define TRACE(x)
19 #else
20 #	define TRACE(x) dprintf x
21 #endif
22 
23 
24 #ifdef __cplusplus
25 
26 struct PCIDev;
27 
28 struct PCIBus {
29 	PCIBus *next;
30 	PCIDev *parent;
31 	PCIDev *child;
32 	int domain;
33 	uint8 bus;
34 };
35 
36 struct PCIDev {
37 	PCIDev *next;
38 	PCIBus *parent;
39 	PCIBus *child;
40 	int domain;
41 	uint8 bus;
42 	uint8 dev;
43 	uint8 func;
44 	pci_info info;
45 };
46 
47 
48 struct domain_data
49 {
50 	// These two are set in PCI::AddController:
51 	pci_controller *	controller;
52 	void *				controller_cookie;
53 
54 	// All the rest is set in PCI::InitDomainData
55 	int					max_bus_devices;
56 };
57 
58 
59 class PCI {
60 	public:
61 							PCI();
62 							~PCI();
63 
64 		void				InitDomainData();
65 		void				InitBus();
66 
67 		status_t			AddController(pci_controller *controller, void *controller_cookie);
68 
69 		status_t			GetNthPciInfo(long index, pci_info *outInfo);
70 
71 		status_t			ReadPciConfig(int domain, uint8 bus, uint8 device, uint8 function,
72 										  uint8 offset, uint8 size, uint32 *value);
73 
74 		uint32				ReadPciConfig(int domain, uint8 bus, uint8 device, uint8 function,
75 										  uint8 offset, uint8 size);
76 
77 		status_t			WritePciConfig(int domain, uint8 bus, uint8 device, uint8 function,
78 										   uint8 offset, uint8 size, uint32 value);
79 
80 		status_t			GetVirtBus(uint8 virt_bus, int *domain, uint8 *bus);
81 
82 	private:
83 
84 		void EnumerateBus(int domain, uint8 bus, uint8 *subordinate_bus = NULL);
85 
86 		void DiscoverBus(PCIBus *bus);
87 		void DiscoverDevice(PCIBus *bus, uint8 dev, uint8 func);
88 
89 		PCIDev *CreateDevice(PCIBus *parent, uint8 dev, uint8 func);
90 		PCIBus *CreateBus(PCIDev *parent, int domain, uint8 bus);
91 
92 		status_t GetNthPciInfo(PCIBus *bus, long *curindex, long wantindex, pci_info *outInfo);
93 		void ReadPciBasicInfo(PCIDev *dev);
94 		void ReadPciHeaderInfo(PCIDev *dev);
95 
96 		void RefreshDeviceInfo(PCIBus *bus);
97 
98 		uint32 BarSize(uint32 bits, uint32 mask);
99 		void GetBarInfo(PCIDev *dev, uint8 offset, uint32 *address, uint32 *size = 0, uint8 *flags = 0);
100 		void GetRomBarInfo(PCIDev *dev, uint8 offset, uint32 *address, uint32 *size = 0, uint8 *flags = 0);
101 
102 
103 		domain_data *		GetDomainData(int domain);
104 
105 		status_t			AddVirtBus(int domain, uint8 bus, uint8 *virt_bus);
106 
107 	private:
108 		PCIBus *			fRootBus;
109 
110 		enum { 				MAX_PCI_DOMAINS = 8 };
111 
112 		domain_data			fDomainData[MAX_PCI_DOMAINS];
113 		int					fDomainCount;
114 };
115 
116 #endif // __cplusplus
117 
118 
119 #ifdef __cplusplus
120 extern "C" {
121 #endif
122 
123 status_t	pci_init(void);
124 void		pci_uninit(void);
125 
126 long		pci_get_nth_pci_info(long index, pci_info *outInfo);
127 
128 uint32		pci_read_config(uint8 virt_bus, uint8 device, uint8 function, uint8 offset, uint8 size);
129 void		pci_write_config(uint8 virt_bus, uint8 device, uint8 function, uint8 offset, uint8 size, uint32 value);
130 
131 #ifdef __cplusplus
132 }
133 #endif
134 
135 #endif	/* __PCI_H__ */
136