1 2 /******************************************************************************* 3 * 4 * Module Name: hwregs - Read/write access functions for the various ACPI 5 * control and status registers. 6 * 7 ******************************************************************************/ 8 9 /****************************************************************************** 10 * 11 * 1. Copyright Notice 12 * 13 * Some or all of this work - Copyright (c) 1999 - 2012, Intel Corp. 14 * All rights reserved. 15 * 16 * 2. License 17 * 18 * 2.1. This is your license from Intel Corp. under its intellectual property 19 * rights. You may have additional license terms from the party that provided 20 * you this software, covering your right to use that party's intellectual 21 * property rights. 22 * 23 * 2.2. Intel grants, free of charge, to any person ("Licensee") obtaining a 24 * copy of the source code appearing in this file ("Covered Code") an 25 * irrevocable, perpetual, worldwide license under Intel's copyrights in the 26 * base code distributed originally by Intel ("Original Intel Code") to copy, 27 * make derivatives, distribute, use and display any portion of the Covered 28 * Code in any form, with the right to sublicense such rights; and 29 * 30 * 2.3. Intel grants Licensee a non-exclusive and non-transferable patent 31 * license (with the right to sublicense), under only those claims of Intel 32 * patents that are infringed by the Original Intel Code, to make, use, sell, 33 * offer to sell, and import the Covered Code and derivative works thereof 34 * solely to the minimum extent necessary to exercise the above copyright 35 * license, and in no event shall the patent license extend to any additions 36 * to or modifications of the Original Intel Code. No other license or right 37 * is granted directly or by implication, estoppel or otherwise; 38 * 39 * The above copyright and patent license is granted only if the following 40 * conditions are met: 41 * 42 * 3. Conditions 43 * 44 * 3.1. Redistribution of Source with Rights to Further Distribute Source. 45 * Redistribution of source code of any substantial portion of the Covered 46 * Code or modification with rights to further distribute source must include 47 * the above Copyright Notice, the above License, this list of Conditions, 48 * and the following Disclaimer and Export Compliance provision. In addition, 49 * Licensee must cause all Covered Code to which Licensee contributes to 50 * contain a file documenting the changes Licensee made to create that Covered 51 * Code and the date of any change. Licensee must include in that file the 52 * documentation of any changes made by any predecessor Licensee. Licensee 53 * must include a prominent statement that the modification is derived, 54 * directly or indirectly, from Original Intel Code. 55 * 56 * 3.2. Redistribution of Source with no Rights to Further Distribute Source. 57 * Redistribution of source code of any substantial portion of the Covered 58 * Code or modification without rights to further distribute source must 59 * include the following Disclaimer and Export Compliance provision in the 60 * documentation and/or other materials provided with distribution. In 61 * addition, Licensee may not authorize further sublicense of source of any 62 * portion of the Covered Code, and must include terms to the effect that the 63 * license from Licensee to its licensee is limited to the intellectual 64 * property embodied in the software Licensee provides to its licensee, and 65 * not to intellectual property embodied in modifications its licensee may 66 * make. 67 * 68 * 3.3. Redistribution of Executable. Redistribution in executable form of any 69 * substantial portion of the Covered Code or modification must reproduce the 70 * above Copyright Notice, and the following Disclaimer and Export Compliance 71 * provision in the documentation and/or other materials provided with the 72 * distribution. 73 * 74 * 3.4. Intel retains all right, title, and interest in and to the Original 75 * Intel Code. 76 * 77 * 3.5. Neither the name Intel nor any other trademark owned or controlled by 78 * Intel shall be used in advertising or otherwise to promote the sale, use or 79 * other dealings in products derived from or relating to the Covered Code 80 * without prior written authorization from Intel. 81 * 82 * 4. Disclaimer and Export Compliance 83 * 84 * 4.1. INTEL MAKES NO WARRANTY OF ANY KIND REGARDING ANY SOFTWARE PROVIDED 85 * HERE. ANY SOFTWARE ORIGINATING FROM INTEL OR DERIVED FROM INTEL SOFTWARE 86 * IS PROVIDED "AS IS," AND INTEL WILL NOT PROVIDE ANY SUPPORT, ASSISTANCE, 87 * INSTALLATION, TRAINING OR OTHER SERVICES. INTEL WILL NOT PROVIDE ANY 88 * UPDATES, ENHANCEMENTS OR EXTENSIONS. INTEL SPECIFICALLY DISCLAIMS ANY 89 * IMPLIED WARRANTIES OF MERCHANTABILITY, NONINFRINGEMENT AND FITNESS FOR A 90 * PARTICULAR PURPOSE. 91 * 92 * 4.2. IN NO EVENT SHALL INTEL HAVE ANY LIABILITY TO LICENSEE, ITS LICENSEES 93 * OR ANY OTHER THIRD PARTY, FOR ANY LOST PROFITS, LOST DATA, LOSS OF USE OR 94 * COSTS OF PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES, OR FOR ANY INDIRECT, 95 * SPECIAL OR CONSEQUENTIAL DAMAGES ARISING OUT OF THIS AGREEMENT, UNDER ANY 96 * CAUSE OF ACTION OR THEORY OF LIABILITY, AND IRRESPECTIVE OF WHETHER INTEL 97 * HAS ADVANCE NOTICE OF THE POSSIBILITY OF SUCH DAMAGES. THESE LIMITATIONS 98 * SHALL APPLY NOTWITHSTANDING THE FAILURE OF THE ESSENTIAL PURPOSE OF ANY 99 * LIMITED REMEDY. 100 * 101 * 4.3. Licensee shall not export, either directly or indirectly, any of this 102 * software or system incorporating such software without first obtaining any 103 * required license or other approval from the U. S. Department of Commerce or 104 * any other agency or department of the United States Government. In the 105 * event Licensee exports any such software from the United States or 106 * re-exports any such software from a foreign destination, Licensee shall 107 * ensure that the distribution and export/re-export of the software is in 108 * compliance with all laws, regulations, orders, or other restrictions of the 109 * U.S. Export Administration Regulations. Licensee agrees that neither it nor 110 * any of its subsidiaries will export/re-export any technical data, process, 111 * software, or service, directly or indirectly, to any country for which the 112 * United States government or any agency thereof requires an export license, 113 * other governmental approval, or letter of assurance, without first obtaining 114 * such license, approval or letter. 115 * 116 *****************************************************************************/ 117 118 #define __HWREGS_C__ 119 120 #include "acpi.h" 121 #include "accommon.h" 122 #include "acevents.h" 123 124 #define _COMPONENT ACPI_HARDWARE 125 ACPI_MODULE_NAME ("hwregs") 126 127 128 #if (!ACPI_REDUCED_HARDWARE) 129 130 /* Local Prototypes */ 131 132 static ACPI_STATUS 133 AcpiHwReadMultiple ( 134 UINT32 *Value, 135 ACPI_GENERIC_ADDRESS *RegisterA, 136 ACPI_GENERIC_ADDRESS *RegisterB); 137 138 static ACPI_STATUS 139 AcpiHwWriteMultiple ( 140 UINT32 Value, 141 ACPI_GENERIC_ADDRESS *RegisterA, 142 ACPI_GENERIC_ADDRESS *RegisterB); 143 144 #endif /* !ACPI_REDUCED_HARDWARE */ 145 146 /****************************************************************************** 147 * 148 * FUNCTION: AcpiHwValidateRegister 149 * 150 * PARAMETERS: Reg - GAS register structure 151 * MaxBitWidth - Max BitWidth supported (32 or 64) 152 * Address - Pointer to where the gas->address 153 * is returned 154 * 155 * RETURN: Status 156 * 157 * DESCRIPTION: Validate the contents of a GAS register. Checks the GAS 158 * pointer, Address, SpaceId, BitWidth, and BitOffset. 159 * 160 ******************************************************************************/ 161 162 ACPI_STATUS 163 AcpiHwValidateRegister ( 164 ACPI_GENERIC_ADDRESS *Reg, 165 UINT8 MaxBitWidth, 166 UINT64 *Address) 167 { 168 169 /* Must have a valid pointer to a GAS structure */ 170 171 if (!Reg) 172 { 173 return (AE_BAD_PARAMETER); 174 } 175 176 /* 177 * Copy the target address. This handles possible alignment issues. 178 * Address must not be null. A null address also indicates an optional 179 * ACPI register that is not supported, so no error message. 180 */ 181 ACPI_MOVE_64_TO_64 (Address, &Reg->Address); 182 if (!(*Address)) 183 { 184 return (AE_BAD_ADDRESS); 185 } 186 187 /* Validate the SpaceID */ 188 189 if ((Reg->SpaceId != ACPI_ADR_SPACE_SYSTEM_MEMORY) && 190 (Reg->SpaceId != ACPI_ADR_SPACE_SYSTEM_IO)) 191 { 192 ACPI_ERROR ((AE_INFO, 193 "Unsupported address space: 0x%X", Reg->SpaceId)); 194 return (AE_SUPPORT); 195 } 196 197 /* Validate the BitWidth */ 198 199 if ((Reg->BitWidth != 8) && 200 (Reg->BitWidth != 16) && 201 (Reg->BitWidth != 32) && 202 (Reg->BitWidth != MaxBitWidth)) 203 { 204 ACPI_ERROR ((AE_INFO, 205 "Unsupported register bit width: 0x%X", Reg->BitWidth)); 206 return (AE_SUPPORT); 207 } 208 209 /* Validate the BitOffset. Just a warning for now. */ 210 211 if (Reg->BitOffset != 0) 212 { 213 ACPI_WARNING ((AE_INFO, 214 "Unsupported register bit offset: 0x%X", Reg->BitOffset)); 215 } 216 217 return (AE_OK); 218 } 219 220 221 /****************************************************************************** 222 * 223 * FUNCTION: AcpiHwRead 224 * 225 * PARAMETERS: Value - Where the value is returned 226 * Reg - GAS register structure 227 * 228 * RETURN: Status 229 * 230 * DESCRIPTION: Read from either memory or IO space. This is a 32-bit max 231 * version of AcpiRead, used internally since the overhead of 232 * 64-bit values is not needed. 233 * 234 * LIMITATIONS: <These limitations also apply to AcpiHwWrite> 235 * BitWidth must be exactly 8, 16, or 32. 236 * SpaceID must be SystemMemory or SystemIO. 237 * BitOffset and AccessWidth are currently ignored, as there has 238 * not been a need to implement these. 239 * 240 ******************************************************************************/ 241 242 ACPI_STATUS 243 AcpiHwRead ( 244 UINT32 *Value, 245 ACPI_GENERIC_ADDRESS *Reg) 246 { 247 UINT64 Address; 248 UINT64 Value64; 249 ACPI_STATUS Status; 250 251 252 ACPI_FUNCTION_NAME (HwRead); 253 254 255 /* Validate contents of the GAS register */ 256 257 Status = AcpiHwValidateRegister (Reg, 32, &Address); 258 if (ACPI_FAILURE (Status)) 259 { 260 return (Status); 261 } 262 263 /* Initialize entire 32-bit return value to zero */ 264 265 *Value = 0; 266 267 /* 268 * Two address spaces supported: Memory or IO. PCI_Config is 269 * not supported here because the GAS structure is insufficient 270 */ 271 if (Reg->SpaceId == ACPI_ADR_SPACE_SYSTEM_MEMORY) 272 { 273 Status = AcpiOsReadMemory ((ACPI_PHYSICAL_ADDRESS) 274 Address, &Value64, Reg->BitWidth); 275 276 *Value = (UINT32) Value64; 277 } 278 else /* ACPI_ADR_SPACE_SYSTEM_IO, validated earlier */ 279 { 280 Status = AcpiHwReadPort ((ACPI_IO_ADDRESS) 281 Address, Value, Reg->BitWidth); 282 } 283 284 ACPI_DEBUG_PRINT ((ACPI_DB_IO, 285 "Read: %8.8X width %2d from %8.8X%8.8X (%s)\n", 286 *Value, Reg->BitWidth, ACPI_FORMAT_UINT64 (Address), 287 AcpiUtGetRegionName (Reg->SpaceId))); 288 289 return (Status); 290 } 291 292 293 /****************************************************************************** 294 * 295 * FUNCTION: AcpiHwWrite 296 * 297 * PARAMETERS: Value - Value to be written 298 * Reg - GAS register structure 299 * 300 * RETURN: Status 301 * 302 * DESCRIPTION: Write to either memory or IO space. This is a 32-bit max 303 * version of AcpiWrite, used internally since the overhead of 304 * 64-bit values is not needed. 305 * 306 ******************************************************************************/ 307 308 ACPI_STATUS 309 AcpiHwWrite ( 310 UINT32 Value, 311 ACPI_GENERIC_ADDRESS *Reg) 312 { 313 UINT64 Address; 314 ACPI_STATUS Status; 315 316 317 ACPI_FUNCTION_NAME (HwWrite); 318 319 320 /* Validate contents of the GAS register */ 321 322 Status = AcpiHwValidateRegister (Reg, 32, &Address); 323 if (ACPI_FAILURE (Status)) 324 { 325 return (Status); 326 } 327 328 /* 329 * Two address spaces supported: Memory or IO. PCI_Config is 330 * not supported here because the GAS structure is insufficient 331 */ 332 if (Reg->SpaceId == ACPI_ADR_SPACE_SYSTEM_MEMORY) 333 { 334 Status = AcpiOsWriteMemory ((ACPI_PHYSICAL_ADDRESS) 335 Address, (UINT64) Value, Reg->BitWidth); 336 } 337 else /* ACPI_ADR_SPACE_SYSTEM_IO, validated earlier */ 338 { 339 Status = AcpiHwWritePort ((ACPI_IO_ADDRESS) 340 Address, Value, Reg->BitWidth); 341 } 342 343 ACPI_DEBUG_PRINT ((ACPI_DB_IO, 344 "Wrote: %8.8X width %2d to %8.8X%8.8X (%s)\n", 345 Value, Reg->BitWidth, ACPI_FORMAT_UINT64 (Address), 346 AcpiUtGetRegionName (Reg->SpaceId))); 347 348 return (Status); 349 } 350 351 352 #if (!ACPI_REDUCED_HARDWARE) 353 /******************************************************************************* 354 * 355 * FUNCTION: AcpiHwClearAcpiStatus 356 * 357 * PARAMETERS: None 358 * 359 * RETURN: Status 360 * 361 * DESCRIPTION: Clears all fixed and general purpose status bits 362 * 363 ******************************************************************************/ 364 365 ACPI_STATUS 366 AcpiHwClearAcpiStatus ( 367 void) 368 { 369 ACPI_STATUS Status; 370 ACPI_CPU_FLAGS LockFlags = 0; 371 372 373 ACPI_FUNCTION_TRACE (HwClearAcpiStatus); 374 375 376 ACPI_DEBUG_PRINT ((ACPI_DB_IO, "About to write %04X to %8.8X%8.8X\n", 377 ACPI_BITMASK_ALL_FIXED_STATUS, 378 ACPI_FORMAT_UINT64 (AcpiGbl_XPm1aStatus.Address))); 379 380 LockFlags = AcpiOsAcquireLock (AcpiGbl_HardwareLock); 381 382 /* Clear the fixed events in PM1 A/B */ 383 384 Status = AcpiHwRegisterWrite (ACPI_REGISTER_PM1_STATUS, 385 ACPI_BITMASK_ALL_FIXED_STATUS); 386 if (ACPI_FAILURE (Status)) 387 { 388 goto UnlockAndExit; 389 } 390 391 /* Clear the GPE Bits in all GPE registers in all GPE blocks */ 392 393 Status = AcpiEvWalkGpeList (AcpiHwClearGpeBlock, NULL); 394 395 UnlockAndExit: 396 AcpiOsReleaseLock (AcpiGbl_HardwareLock, LockFlags); 397 return_ACPI_STATUS (Status); 398 } 399 400 401 /******************************************************************************* 402 * 403 * FUNCTION: AcpiHwGetBitRegisterInfo 404 * 405 * PARAMETERS: RegisterId - Index of ACPI Register to access 406 * 407 * RETURN: The bitmask to be used when accessing the register 408 * 409 * DESCRIPTION: Map RegisterId into a register bitmask. 410 * 411 ******************************************************************************/ 412 413 ACPI_BIT_REGISTER_INFO * 414 AcpiHwGetBitRegisterInfo ( 415 UINT32 RegisterId) 416 { 417 ACPI_FUNCTION_ENTRY (); 418 419 420 if (RegisterId > ACPI_BITREG_MAX) 421 { 422 ACPI_ERROR ((AE_INFO, "Invalid BitRegister ID: 0x%X", RegisterId)); 423 return (NULL); 424 } 425 426 return (&AcpiGbl_BitRegisterInfo[RegisterId]); 427 } 428 429 430 /****************************************************************************** 431 * 432 * FUNCTION: AcpiHwWritePm1Control 433 * 434 * PARAMETERS: Pm1aControl - Value to be written to PM1A control 435 * Pm1bControl - Value to be written to PM1B control 436 * 437 * RETURN: Status 438 * 439 * DESCRIPTION: Write the PM1 A/B control registers. These registers are 440 * different than than the PM1 A/B status and enable registers 441 * in that different values can be written to the A/B registers. 442 * Most notably, the SLP_TYP bits can be different, as per the 443 * values returned from the _Sx predefined methods. 444 * 445 ******************************************************************************/ 446 447 ACPI_STATUS 448 AcpiHwWritePm1Control ( 449 UINT32 Pm1aControl, 450 UINT32 Pm1bControl) 451 { 452 ACPI_STATUS Status; 453 454 455 ACPI_FUNCTION_TRACE (HwWritePm1Control); 456 457 458 Status = AcpiHwWrite (Pm1aControl, &AcpiGbl_FADT.XPm1aControlBlock); 459 if (ACPI_FAILURE (Status)) 460 { 461 return_ACPI_STATUS (Status); 462 } 463 464 if (AcpiGbl_FADT.XPm1bControlBlock.Address) 465 { 466 Status = AcpiHwWrite (Pm1bControl, &AcpiGbl_FADT.XPm1bControlBlock); 467 } 468 return_ACPI_STATUS (Status); 469 } 470 471 472 /****************************************************************************** 473 * 474 * FUNCTION: AcpiHwRegisterRead 475 * 476 * PARAMETERS: RegisterId - ACPI Register ID 477 * ReturnValue - Where the register value is returned 478 * 479 * RETURN: Status and the value read. 480 * 481 * DESCRIPTION: Read from the specified ACPI register 482 * 483 ******************************************************************************/ 484 485 ACPI_STATUS 486 AcpiHwRegisterRead ( 487 UINT32 RegisterId, 488 UINT32 *ReturnValue) 489 { 490 UINT32 Value = 0; 491 ACPI_STATUS Status; 492 493 494 ACPI_FUNCTION_TRACE (HwRegisterRead); 495 496 497 switch (RegisterId) 498 { 499 case ACPI_REGISTER_PM1_STATUS: /* PM1 A/B: 16-bit access each */ 500 501 Status = AcpiHwReadMultiple (&Value, 502 &AcpiGbl_XPm1aStatus, 503 &AcpiGbl_XPm1bStatus); 504 break; 505 506 507 case ACPI_REGISTER_PM1_ENABLE: /* PM1 A/B: 16-bit access each */ 508 509 Status = AcpiHwReadMultiple (&Value, 510 &AcpiGbl_XPm1aEnable, 511 &AcpiGbl_XPm1bEnable); 512 break; 513 514 515 case ACPI_REGISTER_PM1_CONTROL: /* PM1 A/B: 16-bit access each */ 516 517 Status = AcpiHwReadMultiple (&Value, 518 &AcpiGbl_FADT.XPm1aControlBlock, 519 &AcpiGbl_FADT.XPm1bControlBlock); 520 521 /* 522 * Zero the write-only bits. From the ACPI specification, "Hardware 523 * Write-Only Bits": "Upon reads to registers with write-only bits, 524 * software masks out all write-only bits." 525 */ 526 Value &= ~ACPI_PM1_CONTROL_WRITEONLY_BITS; 527 break; 528 529 530 case ACPI_REGISTER_PM2_CONTROL: /* 8-bit access */ 531 532 Status = AcpiHwRead (&Value, &AcpiGbl_FADT.XPm2ControlBlock); 533 break; 534 535 536 case ACPI_REGISTER_PM_TIMER: /* 32-bit access */ 537 538 Status = AcpiHwRead (&Value, &AcpiGbl_FADT.XPmTimerBlock); 539 break; 540 541 542 case ACPI_REGISTER_SMI_COMMAND_BLOCK: /* 8-bit access */ 543 544 Status = AcpiHwReadPort (AcpiGbl_FADT.SmiCommand, &Value, 8); 545 break; 546 547 548 default: 549 ACPI_ERROR ((AE_INFO, "Unknown Register ID: 0x%X", 550 RegisterId)); 551 Status = AE_BAD_PARAMETER; 552 break; 553 } 554 555 if (ACPI_SUCCESS (Status)) 556 { 557 *ReturnValue = Value; 558 } 559 560 return_ACPI_STATUS (Status); 561 } 562 563 564 /****************************************************************************** 565 * 566 * FUNCTION: AcpiHwRegisterWrite 567 * 568 * PARAMETERS: RegisterId - ACPI Register ID 569 * Value - The value to write 570 * 571 * RETURN: Status 572 * 573 * DESCRIPTION: Write to the specified ACPI register 574 * 575 * NOTE: In accordance with the ACPI specification, this function automatically 576 * preserves the value of the following bits, meaning that these bits cannot be 577 * changed via this interface: 578 * 579 * PM1_CONTROL[0] = SCI_EN 580 * PM1_CONTROL[9] 581 * PM1_STATUS[11] 582 * 583 * ACPI References: 584 * 1) Hardware Ignored Bits: When software writes to a register with ignored 585 * bit fields, it preserves the ignored bit fields 586 * 2) SCI_EN: OSPM always preserves this bit position 587 * 588 ******************************************************************************/ 589 590 ACPI_STATUS 591 AcpiHwRegisterWrite ( 592 UINT32 RegisterId, 593 UINT32 Value) 594 { 595 ACPI_STATUS Status; 596 UINT32 ReadValue; 597 598 599 ACPI_FUNCTION_TRACE (HwRegisterWrite); 600 601 602 switch (RegisterId) 603 { 604 case ACPI_REGISTER_PM1_STATUS: /* PM1 A/B: 16-bit access each */ 605 /* 606 * Handle the "ignored" bit in PM1 Status. According to the ACPI 607 * specification, ignored bits are to be preserved when writing. 608 * Normally, this would mean a read/modify/write sequence. However, 609 * preserving a bit in the status register is different. Writing a 610 * one clears the status, and writing a zero preserves the status. 611 * Therefore, we must always write zero to the ignored bit. 612 * 613 * This behavior is clarified in the ACPI 4.0 specification. 614 */ 615 Value &= ~ACPI_PM1_STATUS_PRESERVED_BITS; 616 617 Status = AcpiHwWriteMultiple (Value, 618 &AcpiGbl_XPm1aStatus, 619 &AcpiGbl_XPm1bStatus); 620 break; 621 622 623 case ACPI_REGISTER_PM1_ENABLE: /* PM1 A/B: 16-bit access each */ 624 625 Status = AcpiHwWriteMultiple (Value, 626 &AcpiGbl_XPm1aEnable, 627 &AcpiGbl_XPm1bEnable); 628 break; 629 630 631 case ACPI_REGISTER_PM1_CONTROL: /* PM1 A/B: 16-bit access each */ 632 633 /* 634 * Perform a read first to preserve certain bits (per ACPI spec) 635 * Note: This includes SCI_EN, we never want to change this bit 636 */ 637 Status = AcpiHwReadMultiple (&ReadValue, 638 &AcpiGbl_FADT.XPm1aControlBlock, 639 &AcpiGbl_FADT.XPm1bControlBlock); 640 if (ACPI_FAILURE (Status)) 641 { 642 goto Exit; 643 } 644 645 /* Insert the bits to be preserved */ 646 647 ACPI_INSERT_BITS (Value, ACPI_PM1_CONTROL_PRESERVED_BITS, ReadValue); 648 649 /* Now we can write the data */ 650 651 Status = AcpiHwWriteMultiple (Value, 652 &AcpiGbl_FADT.XPm1aControlBlock, 653 &AcpiGbl_FADT.XPm1bControlBlock); 654 break; 655 656 657 case ACPI_REGISTER_PM2_CONTROL: /* 8-bit access */ 658 659 /* 660 * For control registers, all reserved bits must be preserved, 661 * as per the ACPI spec. 662 */ 663 Status = AcpiHwRead (&ReadValue, &AcpiGbl_FADT.XPm2ControlBlock); 664 if (ACPI_FAILURE (Status)) 665 { 666 goto Exit; 667 } 668 669 /* Insert the bits to be preserved */ 670 671 ACPI_INSERT_BITS (Value, ACPI_PM2_CONTROL_PRESERVED_BITS, ReadValue); 672 673 Status = AcpiHwWrite (Value, &AcpiGbl_FADT.XPm2ControlBlock); 674 break; 675 676 677 case ACPI_REGISTER_PM_TIMER: /* 32-bit access */ 678 679 Status = AcpiHwWrite (Value, &AcpiGbl_FADT.XPmTimerBlock); 680 break; 681 682 683 case ACPI_REGISTER_SMI_COMMAND_BLOCK: /* 8-bit access */ 684 685 /* SMI_CMD is currently always in IO space */ 686 687 Status = AcpiHwWritePort (AcpiGbl_FADT.SmiCommand, Value, 8); 688 break; 689 690 691 default: 692 ACPI_ERROR ((AE_INFO, "Unknown Register ID: 0x%X", 693 RegisterId)); 694 Status = AE_BAD_PARAMETER; 695 break; 696 } 697 698 Exit: 699 return_ACPI_STATUS (Status); 700 } 701 702 703 /****************************************************************************** 704 * 705 * FUNCTION: AcpiHwReadMultiple 706 * 707 * PARAMETERS: Value - Where the register value is returned 708 * RegisterA - First ACPI register (required) 709 * RegisterB - Second ACPI register (optional) 710 * 711 * RETURN: Status 712 * 713 * DESCRIPTION: Read from the specified two-part ACPI register (such as PM1 A/B) 714 * 715 ******************************************************************************/ 716 717 static ACPI_STATUS 718 AcpiHwReadMultiple ( 719 UINT32 *Value, 720 ACPI_GENERIC_ADDRESS *RegisterA, 721 ACPI_GENERIC_ADDRESS *RegisterB) 722 { 723 UINT32 ValueA = 0; 724 UINT32 ValueB = 0; 725 ACPI_STATUS Status; 726 727 728 /* The first register is always required */ 729 730 Status = AcpiHwRead (&ValueA, RegisterA); 731 if (ACPI_FAILURE (Status)) 732 { 733 return (Status); 734 } 735 736 /* Second register is optional */ 737 738 if (RegisterB->Address) 739 { 740 Status = AcpiHwRead (&ValueB, RegisterB); 741 if (ACPI_FAILURE (Status)) 742 { 743 return (Status); 744 } 745 } 746 747 /* 748 * OR the two return values together. No shifting or masking is necessary, 749 * because of how the PM1 registers are defined in the ACPI specification: 750 * 751 * "Although the bits can be split between the two register blocks (each 752 * register block has a unique pointer within the FADT), the bit positions 753 * are maintained. The register block with unimplemented bits (that is, 754 * those implemented in the other register block) always returns zeros, 755 * and writes have no side effects" 756 */ 757 *Value = (ValueA | ValueB); 758 return (AE_OK); 759 } 760 761 762 /****************************************************************************** 763 * 764 * FUNCTION: AcpiHwWriteMultiple 765 * 766 * PARAMETERS: Value - The value to write 767 * RegisterA - First ACPI register (required) 768 * RegisterB - Second ACPI register (optional) 769 * 770 * RETURN: Status 771 * 772 * DESCRIPTION: Write to the specified two-part ACPI register (such as PM1 A/B) 773 * 774 ******************************************************************************/ 775 776 static ACPI_STATUS 777 AcpiHwWriteMultiple ( 778 UINT32 Value, 779 ACPI_GENERIC_ADDRESS *RegisterA, 780 ACPI_GENERIC_ADDRESS *RegisterB) 781 { 782 ACPI_STATUS Status; 783 784 785 /* The first register is always required */ 786 787 Status = AcpiHwWrite (Value, RegisterA); 788 if (ACPI_FAILURE (Status)) 789 { 790 return (Status); 791 } 792 793 /* 794 * Second register is optional 795 * 796 * No bit shifting or clearing is necessary, because of how the PM1 797 * registers are defined in the ACPI specification: 798 * 799 * "Although the bits can be split between the two register blocks (each 800 * register block has a unique pointer within the FADT), the bit positions 801 * are maintained. The register block with unimplemented bits (that is, 802 * those implemented in the other register block) always returns zeros, 803 * and writes have no side effects" 804 */ 805 if (RegisterB->Address) 806 { 807 Status = AcpiHwWrite (Value, RegisterB); 808 } 809 810 return (Status); 811 } 812 813 #endif /* !ACPI_REDUCED_HARDWARE */ 814