1 /******************************************************************************* 2 * 3 * Module Name: hwregs - Read/write access functions for the various ACPI 4 * control and status registers. 5 * 6 ******************************************************************************/ 7 8 /****************************************************************************** 9 * 10 * 1. Copyright Notice 11 * 12 * Some or all of this work - Copyright (c) 1999 - 2012, Intel Corp. 13 * All rights reserved. 14 * 15 * 2. License 16 * 17 * 2.1. This is your license from Intel Corp. under its intellectual property 18 * rights. You may have additional license terms from the party that provided 19 * you this software, covering your right to use that party's intellectual 20 * property rights. 21 * 22 * 2.2. Intel grants, free of charge, to any person ("Licensee") obtaining a 23 * copy of the source code appearing in this file ("Covered Code") an 24 * irrevocable, perpetual, worldwide license under Intel's copyrights in the 25 * base code distributed originally by Intel ("Original Intel Code") to copy, 26 * make derivatives, distribute, use and display any portion of the Covered 27 * Code in any form, with the right to sublicense such rights; and 28 * 29 * 2.3. Intel grants Licensee a non-exclusive and non-transferable patent 30 * license (with the right to sublicense), under only those claims of Intel 31 * patents that are infringed by the Original Intel Code, to make, use, sell, 32 * offer to sell, and import the Covered Code and derivative works thereof 33 * solely to the minimum extent necessary to exercise the above copyright 34 * license, and in no event shall the patent license extend to any additions 35 * to or modifications of the Original Intel Code. No other license or right 36 * is granted directly or by implication, estoppel or otherwise; 37 * 38 * The above copyright and patent license is granted only if the following 39 * conditions are met: 40 * 41 * 3. Conditions 42 * 43 * 3.1. Redistribution of Source with Rights to Further Distribute Source. 44 * Redistribution of source code of any substantial portion of the Covered 45 * Code or modification with rights to further distribute source must include 46 * the above Copyright Notice, the above License, this list of Conditions, 47 * and the following Disclaimer and Export Compliance provision. In addition, 48 * Licensee must cause all Covered Code to which Licensee contributes to 49 * contain a file documenting the changes Licensee made to create that Covered 50 * Code and the date of any change. Licensee must include in that file the 51 * documentation of any changes made by any predecessor Licensee. Licensee 52 * must include a prominent statement that the modification is derived, 53 * directly or indirectly, from Original Intel Code. 54 * 55 * 3.2. Redistribution of Source with no Rights to Further Distribute Source. 56 * Redistribution of source code of any substantial portion of the Covered 57 * Code or modification without rights to further distribute source must 58 * include the following Disclaimer and Export Compliance provision in the 59 * documentation and/or other materials provided with distribution. In 60 * addition, Licensee may not authorize further sublicense of source of any 61 * portion of the Covered Code, and must include terms to the effect that the 62 * license from Licensee to its licensee is limited to the intellectual 63 * property embodied in the software Licensee provides to its licensee, and 64 * not to intellectual property embodied in modifications its licensee may 65 * make. 66 * 67 * 3.3. Redistribution of Executable. Redistribution in executable form of any 68 * substantial portion of the Covered Code or modification must reproduce the 69 * above Copyright Notice, and the following Disclaimer and Export Compliance 70 * provision in the documentation and/or other materials provided with the 71 * distribution. 72 * 73 * 3.4. Intel retains all right, title, and interest in and to the Original 74 * Intel Code. 75 * 76 * 3.5. Neither the name Intel nor any other trademark owned or controlled by 77 * Intel shall be used in advertising or otherwise to promote the sale, use or 78 * other dealings in products derived from or relating to the Covered Code 79 * without prior written authorization from Intel. 80 * 81 * 4. Disclaimer and Export Compliance 82 * 83 * 4.1. INTEL MAKES NO WARRANTY OF ANY KIND REGARDING ANY SOFTWARE PROVIDED 84 * HERE. ANY SOFTWARE ORIGINATING FROM INTEL OR DERIVED FROM INTEL SOFTWARE 85 * IS PROVIDED "AS IS," AND INTEL WILL NOT PROVIDE ANY SUPPORT, ASSISTANCE, 86 * INSTALLATION, TRAINING OR OTHER SERVICES. INTEL WILL NOT PROVIDE ANY 87 * UPDATES, ENHANCEMENTS OR EXTENSIONS. INTEL SPECIFICALLY DISCLAIMS ANY 88 * IMPLIED WARRANTIES OF MERCHANTABILITY, NONINFRINGEMENT AND FITNESS FOR A 89 * PARTICULAR PURPOSE. 90 * 91 * 4.2. IN NO EVENT SHALL INTEL HAVE ANY LIABILITY TO LICENSEE, ITS LICENSEES 92 * OR ANY OTHER THIRD PARTY, FOR ANY LOST PROFITS, LOST DATA, LOSS OF USE OR 93 * COSTS OF PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES, OR FOR ANY INDIRECT, 94 * SPECIAL OR CONSEQUENTIAL DAMAGES ARISING OUT OF THIS AGREEMENT, UNDER ANY 95 * CAUSE OF ACTION OR THEORY OF LIABILITY, AND IRRESPECTIVE OF WHETHER INTEL 96 * HAS ADVANCE NOTICE OF THE POSSIBILITY OF SUCH DAMAGES. THESE LIMITATIONS 97 * SHALL APPLY NOTWITHSTANDING THE FAILURE OF THE ESSENTIAL PURPOSE OF ANY 98 * LIMITED REMEDY. 99 * 100 * 4.3. Licensee shall not export, either directly or indirectly, any of this 101 * software or system incorporating such software without first obtaining any 102 * required license or other approval from the U. S. Department of Commerce or 103 * any other agency or department of the United States Government. In the 104 * event Licensee exports any such software from the United States or 105 * re-exports any such software from a foreign destination, Licensee shall 106 * ensure that the distribution and export/re-export of the software is in 107 * compliance with all laws, regulations, orders, or other restrictions of the 108 * U.S. Export Administration Regulations. Licensee agrees that neither it nor 109 * any of its subsidiaries will export/re-export any technical data, process, 110 * software, or service, directly or indirectly, to any country for which the 111 * United States government or any agency thereof requires an export license, 112 * other governmental approval, or letter of assurance, without first obtaining 113 * such license, approval or letter. 114 * 115 *****************************************************************************/ 116 117 #define __HWREGS_C__ 118 119 #include "acpi.h" 120 #include "accommon.h" 121 #include "acevents.h" 122 123 #define _COMPONENT ACPI_HARDWARE 124 ACPI_MODULE_NAME ("hwregs") 125 126 127 #if (!ACPI_REDUCED_HARDWARE) 128 129 /* Local Prototypes */ 130 131 static ACPI_STATUS 132 AcpiHwReadMultiple ( 133 UINT32 *Value, 134 ACPI_GENERIC_ADDRESS *RegisterA, 135 ACPI_GENERIC_ADDRESS *RegisterB); 136 137 static ACPI_STATUS 138 AcpiHwWriteMultiple ( 139 UINT32 Value, 140 ACPI_GENERIC_ADDRESS *RegisterA, 141 ACPI_GENERIC_ADDRESS *RegisterB); 142 143 #endif /* !ACPI_REDUCED_HARDWARE */ 144 145 /****************************************************************************** 146 * 147 * FUNCTION: AcpiHwValidateRegister 148 * 149 * PARAMETERS: Reg - GAS register structure 150 * MaxBitWidth - Max BitWidth supported (32 or 64) 151 * Address - Pointer to where the gas->address 152 * is returned 153 * 154 * RETURN: Status 155 * 156 * DESCRIPTION: Validate the contents of a GAS register. Checks the GAS 157 * pointer, Address, SpaceId, BitWidth, and BitOffset. 158 * 159 ******************************************************************************/ 160 161 ACPI_STATUS 162 AcpiHwValidateRegister ( 163 ACPI_GENERIC_ADDRESS *Reg, 164 UINT8 MaxBitWidth, 165 UINT64 *Address) 166 { 167 168 /* Must have a valid pointer to a GAS structure */ 169 170 if (!Reg) 171 { 172 return (AE_BAD_PARAMETER); 173 } 174 175 /* 176 * Copy the target address. This handles possible alignment issues. 177 * Address must not be null. A null address also indicates an optional 178 * ACPI register that is not supported, so no error message. 179 */ 180 ACPI_MOVE_64_TO_64 (Address, &Reg->Address); 181 if (!(*Address)) 182 { 183 return (AE_BAD_ADDRESS); 184 } 185 186 /* Validate the SpaceID */ 187 188 if ((Reg->SpaceId != ACPI_ADR_SPACE_SYSTEM_MEMORY) && 189 (Reg->SpaceId != ACPI_ADR_SPACE_SYSTEM_IO)) 190 { 191 ACPI_ERROR ((AE_INFO, 192 "Unsupported address space: 0x%X", Reg->SpaceId)); 193 return (AE_SUPPORT); 194 } 195 196 /* Validate the BitWidth */ 197 198 if ((Reg->BitWidth != 8) && 199 (Reg->BitWidth != 16) && 200 (Reg->BitWidth != 32) && 201 (Reg->BitWidth != MaxBitWidth)) 202 { 203 ACPI_ERROR ((AE_INFO, 204 "Unsupported register bit width: 0x%X", Reg->BitWidth)); 205 return (AE_SUPPORT); 206 } 207 208 /* Validate the BitOffset. Just a warning for now. */ 209 210 if (Reg->BitOffset != 0) 211 { 212 ACPI_WARNING ((AE_INFO, 213 "Unsupported register bit offset: 0x%X", Reg->BitOffset)); 214 } 215 216 return (AE_OK); 217 } 218 219 220 /****************************************************************************** 221 * 222 * FUNCTION: AcpiHwRead 223 * 224 * PARAMETERS: Value - Where the value is returned 225 * Reg - GAS register structure 226 * 227 * RETURN: Status 228 * 229 * DESCRIPTION: Read from either memory or IO space. This is a 32-bit max 230 * version of AcpiRead, used internally since the overhead of 231 * 64-bit values is not needed. 232 * 233 * LIMITATIONS: <These limitations also apply to AcpiHwWrite> 234 * BitWidth must be exactly 8, 16, or 32. 235 * SpaceID must be SystemMemory or SystemIO. 236 * BitOffset and AccessWidth are currently ignored, as there has 237 * not been a need to implement these. 238 * 239 ******************************************************************************/ 240 241 ACPI_STATUS 242 AcpiHwRead ( 243 UINT32 *Value, 244 ACPI_GENERIC_ADDRESS *Reg) 245 { 246 UINT64 Address; 247 UINT64 Value64; 248 ACPI_STATUS Status; 249 250 251 ACPI_FUNCTION_NAME (HwRead); 252 253 254 /* Validate contents of the GAS register */ 255 256 Status = AcpiHwValidateRegister (Reg, 32, &Address); 257 if (ACPI_FAILURE (Status)) 258 { 259 return (Status); 260 } 261 262 /* Initialize entire 32-bit return value to zero */ 263 264 *Value = 0; 265 266 /* 267 * Two address spaces supported: Memory or IO. PCI_Config is 268 * not supported here because the GAS structure is insufficient 269 */ 270 if (Reg->SpaceId == ACPI_ADR_SPACE_SYSTEM_MEMORY) 271 { 272 Status = AcpiOsReadMemory ((ACPI_PHYSICAL_ADDRESS) 273 Address, &Value64, Reg->BitWidth); 274 275 *Value = (UINT32) Value64; 276 } 277 else /* ACPI_ADR_SPACE_SYSTEM_IO, validated earlier */ 278 { 279 Status = AcpiHwReadPort ((ACPI_IO_ADDRESS) 280 Address, Value, Reg->BitWidth); 281 } 282 283 ACPI_DEBUG_PRINT ((ACPI_DB_IO, 284 "Read: %8.8X width %2d from %8.8X%8.8X (%s)\n", 285 *Value, Reg->BitWidth, ACPI_FORMAT_UINT64 (Address), 286 AcpiUtGetRegionName (Reg->SpaceId))); 287 288 return (Status); 289 } 290 291 292 /****************************************************************************** 293 * 294 * FUNCTION: AcpiHwWrite 295 * 296 * PARAMETERS: Value - Value to be written 297 * Reg - GAS register structure 298 * 299 * RETURN: Status 300 * 301 * DESCRIPTION: Write to either memory or IO space. This is a 32-bit max 302 * version of AcpiWrite, used internally since the overhead of 303 * 64-bit values is not needed. 304 * 305 ******************************************************************************/ 306 307 ACPI_STATUS 308 AcpiHwWrite ( 309 UINT32 Value, 310 ACPI_GENERIC_ADDRESS *Reg) 311 { 312 UINT64 Address; 313 ACPI_STATUS Status; 314 315 316 ACPI_FUNCTION_NAME (HwWrite); 317 318 319 /* Validate contents of the GAS register */ 320 321 Status = AcpiHwValidateRegister (Reg, 32, &Address); 322 if (ACPI_FAILURE (Status)) 323 { 324 return (Status); 325 } 326 327 /* 328 * Two address spaces supported: Memory or IO. PCI_Config is 329 * not supported here because the GAS structure is insufficient 330 */ 331 if (Reg->SpaceId == ACPI_ADR_SPACE_SYSTEM_MEMORY) 332 { 333 Status = AcpiOsWriteMemory ((ACPI_PHYSICAL_ADDRESS) 334 Address, (UINT64) Value, Reg->BitWidth); 335 } 336 else /* ACPI_ADR_SPACE_SYSTEM_IO, validated earlier */ 337 { 338 Status = AcpiHwWritePort ((ACPI_IO_ADDRESS) 339 Address, Value, Reg->BitWidth); 340 } 341 342 ACPI_DEBUG_PRINT ((ACPI_DB_IO, 343 "Wrote: %8.8X width %2d to %8.8X%8.8X (%s)\n", 344 Value, Reg->BitWidth, ACPI_FORMAT_UINT64 (Address), 345 AcpiUtGetRegionName (Reg->SpaceId))); 346 347 return (Status); 348 } 349 350 351 #if (!ACPI_REDUCED_HARDWARE) 352 /******************************************************************************* 353 * 354 * FUNCTION: AcpiHwClearAcpiStatus 355 * 356 * PARAMETERS: None 357 * 358 * RETURN: Status 359 * 360 * DESCRIPTION: Clears all fixed and general purpose status bits 361 * 362 ******************************************************************************/ 363 364 ACPI_STATUS 365 AcpiHwClearAcpiStatus ( 366 void) 367 { 368 ACPI_STATUS Status; 369 ACPI_CPU_FLAGS LockFlags = 0; 370 371 372 ACPI_FUNCTION_TRACE (HwClearAcpiStatus); 373 374 375 ACPI_DEBUG_PRINT ((ACPI_DB_IO, "About to write %04X to %8.8X%8.8X\n", 376 ACPI_BITMASK_ALL_FIXED_STATUS, 377 ACPI_FORMAT_UINT64 (AcpiGbl_XPm1aStatus.Address))); 378 379 LockFlags = AcpiOsAcquireLock (AcpiGbl_HardwareLock); 380 381 /* Clear the fixed events in PM1 A/B */ 382 383 Status = AcpiHwRegisterWrite (ACPI_REGISTER_PM1_STATUS, 384 ACPI_BITMASK_ALL_FIXED_STATUS); 385 if (ACPI_FAILURE (Status)) 386 { 387 goto UnlockAndExit; 388 } 389 390 /* Clear the GPE Bits in all GPE registers in all GPE blocks */ 391 392 Status = AcpiEvWalkGpeList (AcpiHwClearGpeBlock, NULL); 393 394 UnlockAndExit: 395 AcpiOsReleaseLock (AcpiGbl_HardwareLock, LockFlags); 396 return_ACPI_STATUS (Status); 397 } 398 399 400 /******************************************************************************* 401 * 402 * FUNCTION: AcpiHwGetBitRegisterInfo 403 * 404 * PARAMETERS: RegisterId - Index of ACPI Register to access 405 * 406 * RETURN: The bitmask to be used when accessing the register 407 * 408 * DESCRIPTION: Map RegisterId into a register bitmask. 409 * 410 ******************************************************************************/ 411 412 ACPI_BIT_REGISTER_INFO * 413 AcpiHwGetBitRegisterInfo ( 414 UINT32 RegisterId) 415 { 416 ACPI_FUNCTION_ENTRY (); 417 418 419 if (RegisterId > ACPI_BITREG_MAX) 420 { 421 ACPI_ERROR ((AE_INFO, "Invalid BitRegister ID: 0x%X", RegisterId)); 422 return (NULL); 423 } 424 425 return (&AcpiGbl_BitRegisterInfo[RegisterId]); 426 } 427 428 429 /****************************************************************************** 430 * 431 * FUNCTION: AcpiHwWritePm1Control 432 * 433 * PARAMETERS: Pm1aControl - Value to be written to PM1A control 434 * Pm1bControl - Value to be written to PM1B control 435 * 436 * RETURN: Status 437 * 438 * DESCRIPTION: Write the PM1 A/B control registers. These registers are 439 * different than than the PM1 A/B status and enable registers 440 * in that different values can be written to the A/B registers. 441 * Most notably, the SLP_TYP bits can be different, as per the 442 * values returned from the _Sx predefined methods. 443 * 444 ******************************************************************************/ 445 446 ACPI_STATUS 447 AcpiHwWritePm1Control ( 448 UINT32 Pm1aControl, 449 UINT32 Pm1bControl) 450 { 451 ACPI_STATUS Status; 452 453 454 ACPI_FUNCTION_TRACE (HwWritePm1Control); 455 456 457 Status = AcpiHwWrite (Pm1aControl, &AcpiGbl_FADT.XPm1aControlBlock); 458 if (ACPI_FAILURE (Status)) 459 { 460 return_ACPI_STATUS (Status); 461 } 462 463 if (AcpiGbl_FADT.XPm1bControlBlock.Address) 464 { 465 Status = AcpiHwWrite (Pm1bControl, &AcpiGbl_FADT.XPm1bControlBlock); 466 } 467 return_ACPI_STATUS (Status); 468 } 469 470 471 /****************************************************************************** 472 * 473 * FUNCTION: AcpiHwRegisterRead 474 * 475 * PARAMETERS: RegisterId - ACPI Register ID 476 * ReturnValue - Where the register value is returned 477 * 478 * RETURN: Status and the value read. 479 * 480 * DESCRIPTION: Read from the specified ACPI register 481 * 482 ******************************************************************************/ 483 484 ACPI_STATUS 485 AcpiHwRegisterRead ( 486 UINT32 RegisterId, 487 UINT32 *ReturnValue) 488 { 489 UINT32 Value = 0; 490 ACPI_STATUS Status; 491 492 493 ACPI_FUNCTION_TRACE (HwRegisterRead); 494 495 496 switch (RegisterId) 497 { 498 case ACPI_REGISTER_PM1_STATUS: /* PM1 A/B: 16-bit access each */ 499 500 Status = AcpiHwReadMultiple (&Value, 501 &AcpiGbl_XPm1aStatus, 502 &AcpiGbl_XPm1bStatus); 503 break; 504 505 506 case ACPI_REGISTER_PM1_ENABLE: /* PM1 A/B: 16-bit access each */ 507 508 Status = AcpiHwReadMultiple (&Value, 509 &AcpiGbl_XPm1aEnable, 510 &AcpiGbl_XPm1bEnable); 511 break; 512 513 514 case ACPI_REGISTER_PM1_CONTROL: /* PM1 A/B: 16-bit access each */ 515 516 Status = AcpiHwReadMultiple (&Value, 517 &AcpiGbl_FADT.XPm1aControlBlock, 518 &AcpiGbl_FADT.XPm1bControlBlock); 519 520 /* 521 * Zero the write-only bits. From the ACPI specification, "Hardware 522 * Write-Only Bits": "Upon reads to registers with write-only bits, 523 * software masks out all write-only bits." 524 */ 525 Value &= ~ACPI_PM1_CONTROL_WRITEONLY_BITS; 526 break; 527 528 529 case ACPI_REGISTER_PM2_CONTROL: /* 8-bit access */ 530 531 Status = AcpiHwRead (&Value, &AcpiGbl_FADT.XPm2ControlBlock); 532 break; 533 534 535 case ACPI_REGISTER_PM_TIMER: /* 32-bit access */ 536 537 Status = AcpiHwRead (&Value, &AcpiGbl_FADT.XPmTimerBlock); 538 break; 539 540 541 case ACPI_REGISTER_SMI_COMMAND_BLOCK: /* 8-bit access */ 542 543 Status = AcpiHwReadPort (AcpiGbl_FADT.SmiCommand, &Value, 8); 544 break; 545 546 547 default: 548 ACPI_ERROR ((AE_INFO, "Unknown Register ID: 0x%X", 549 RegisterId)); 550 Status = AE_BAD_PARAMETER; 551 break; 552 } 553 554 if (ACPI_SUCCESS (Status)) 555 { 556 *ReturnValue = Value; 557 } 558 559 return_ACPI_STATUS (Status); 560 } 561 562 563 /****************************************************************************** 564 * 565 * FUNCTION: AcpiHwRegisterWrite 566 * 567 * PARAMETERS: RegisterId - ACPI Register ID 568 * Value - The value to write 569 * 570 * RETURN: Status 571 * 572 * DESCRIPTION: Write to the specified ACPI register 573 * 574 * NOTE: In accordance with the ACPI specification, this function automatically 575 * preserves the value of the following bits, meaning that these bits cannot be 576 * changed via this interface: 577 * 578 * PM1_CONTROL[0] = SCI_EN 579 * PM1_CONTROL[9] 580 * PM1_STATUS[11] 581 * 582 * ACPI References: 583 * 1) Hardware Ignored Bits: When software writes to a register with ignored 584 * bit fields, it preserves the ignored bit fields 585 * 2) SCI_EN: OSPM always preserves this bit position 586 * 587 ******************************************************************************/ 588 589 ACPI_STATUS 590 AcpiHwRegisterWrite ( 591 UINT32 RegisterId, 592 UINT32 Value) 593 { 594 ACPI_STATUS Status; 595 UINT32 ReadValue; 596 597 598 ACPI_FUNCTION_TRACE (HwRegisterWrite); 599 600 601 switch (RegisterId) 602 { 603 case ACPI_REGISTER_PM1_STATUS: /* PM1 A/B: 16-bit access each */ 604 /* 605 * Handle the "ignored" bit in PM1 Status. According to the ACPI 606 * specification, ignored bits are to be preserved when writing. 607 * Normally, this would mean a read/modify/write sequence. However, 608 * preserving a bit in the status register is different. Writing a 609 * one clears the status, and writing a zero preserves the status. 610 * Therefore, we must always write zero to the ignored bit. 611 * 612 * This behavior is clarified in the ACPI 4.0 specification. 613 */ 614 Value &= ~ACPI_PM1_STATUS_PRESERVED_BITS; 615 616 Status = AcpiHwWriteMultiple (Value, 617 &AcpiGbl_XPm1aStatus, 618 &AcpiGbl_XPm1bStatus); 619 break; 620 621 622 case ACPI_REGISTER_PM1_ENABLE: /* PM1 A/B: 16-bit access each */ 623 624 Status = AcpiHwWriteMultiple (Value, 625 &AcpiGbl_XPm1aEnable, 626 &AcpiGbl_XPm1bEnable); 627 break; 628 629 630 case ACPI_REGISTER_PM1_CONTROL: /* PM1 A/B: 16-bit access each */ 631 632 /* 633 * Perform a read first to preserve certain bits (per ACPI spec) 634 * Note: This includes SCI_EN, we never want to change this bit 635 */ 636 Status = AcpiHwReadMultiple (&ReadValue, 637 &AcpiGbl_FADT.XPm1aControlBlock, 638 &AcpiGbl_FADT.XPm1bControlBlock); 639 if (ACPI_FAILURE (Status)) 640 { 641 goto Exit; 642 } 643 644 /* Insert the bits to be preserved */ 645 646 ACPI_INSERT_BITS (Value, ACPI_PM1_CONTROL_PRESERVED_BITS, ReadValue); 647 648 /* Now we can write the data */ 649 650 Status = AcpiHwWriteMultiple (Value, 651 &AcpiGbl_FADT.XPm1aControlBlock, 652 &AcpiGbl_FADT.XPm1bControlBlock); 653 break; 654 655 656 case ACPI_REGISTER_PM2_CONTROL: /* 8-bit access */ 657 658 /* 659 * For control registers, all reserved bits must be preserved, 660 * as per the ACPI spec. 661 */ 662 Status = AcpiHwRead (&ReadValue, &AcpiGbl_FADT.XPm2ControlBlock); 663 if (ACPI_FAILURE (Status)) 664 { 665 goto Exit; 666 } 667 668 /* Insert the bits to be preserved */ 669 670 ACPI_INSERT_BITS (Value, ACPI_PM2_CONTROL_PRESERVED_BITS, ReadValue); 671 672 Status = AcpiHwWrite (Value, &AcpiGbl_FADT.XPm2ControlBlock); 673 break; 674 675 676 case ACPI_REGISTER_PM_TIMER: /* 32-bit access */ 677 678 Status = AcpiHwWrite (Value, &AcpiGbl_FADT.XPmTimerBlock); 679 break; 680 681 682 case ACPI_REGISTER_SMI_COMMAND_BLOCK: /* 8-bit access */ 683 684 /* SMI_CMD is currently always in IO space */ 685 686 Status = AcpiHwWritePort (AcpiGbl_FADT.SmiCommand, Value, 8); 687 break; 688 689 690 default: 691 ACPI_ERROR ((AE_INFO, "Unknown Register ID: 0x%X", 692 RegisterId)); 693 Status = AE_BAD_PARAMETER; 694 break; 695 } 696 697 Exit: 698 return_ACPI_STATUS (Status); 699 } 700 701 702 /****************************************************************************** 703 * 704 * FUNCTION: AcpiHwReadMultiple 705 * 706 * PARAMETERS: Value - Where the register value is returned 707 * RegisterA - First ACPI register (required) 708 * RegisterB - Second ACPI register (optional) 709 * 710 * RETURN: Status 711 * 712 * DESCRIPTION: Read from the specified two-part ACPI register (such as PM1 A/B) 713 * 714 ******************************************************************************/ 715 716 static ACPI_STATUS 717 AcpiHwReadMultiple ( 718 UINT32 *Value, 719 ACPI_GENERIC_ADDRESS *RegisterA, 720 ACPI_GENERIC_ADDRESS *RegisterB) 721 { 722 UINT32 ValueA = 0; 723 UINT32 ValueB = 0; 724 ACPI_STATUS Status; 725 726 727 /* The first register is always required */ 728 729 Status = AcpiHwRead (&ValueA, RegisterA); 730 if (ACPI_FAILURE (Status)) 731 { 732 return (Status); 733 } 734 735 /* Second register is optional */ 736 737 if (RegisterB->Address) 738 { 739 Status = AcpiHwRead (&ValueB, RegisterB); 740 if (ACPI_FAILURE (Status)) 741 { 742 return (Status); 743 } 744 } 745 746 /* 747 * OR the two return values together. No shifting or masking is necessary, 748 * because of how the PM1 registers are defined in the ACPI specification: 749 * 750 * "Although the bits can be split between the two register blocks (each 751 * register block has a unique pointer within the FADT), the bit positions 752 * are maintained. The register block with unimplemented bits (that is, 753 * those implemented in the other register block) always returns zeros, 754 * and writes have no side effects" 755 */ 756 *Value = (ValueA | ValueB); 757 return (AE_OK); 758 } 759 760 761 /****************************************************************************** 762 * 763 * FUNCTION: AcpiHwWriteMultiple 764 * 765 * PARAMETERS: Value - The value to write 766 * RegisterA - First ACPI register (required) 767 * RegisterB - Second ACPI register (optional) 768 * 769 * RETURN: Status 770 * 771 * DESCRIPTION: Write to the specified two-part ACPI register (such as PM1 A/B) 772 * 773 ******************************************************************************/ 774 775 static ACPI_STATUS 776 AcpiHwWriteMultiple ( 777 UINT32 Value, 778 ACPI_GENERIC_ADDRESS *RegisterA, 779 ACPI_GENERIC_ADDRESS *RegisterB) 780 { 781 ACPI_STATUS Status; 782 783 784 /* The first register is always required */ 785 786 Status = AcpiHwWrite (Value, RegisterA); 787 if (ACPI_FAILURE (Status)) 788 { 789 return (Status); 790 } 791 792 /* 793 * Second register is optional 794 * 795 * No bit shifting or clearing is necessary, because of how the PM1 796 * registers are defined in the ACPI specification: 797 * 798 * "Although the bits can be split between the two register blocks (each 799 * register block has a unique pointer within the FADT), the bit positions 800 * are maintained. The register block with unimplemented bits (that is, 801 * those implemented in the other register block) always returns zeros, 802 * and writes have no side effects" 803 */ 804 if (RegisterB->Address) 805 { 806 Status = AcpiHwWrite (Value, RegisterB); 807 } 808 809 return (Status); 810 } 811 812 #endif /* !ACPI_REDUCED_HARDWARE */ 813