1 /******************************************************************************* 2 * 3 * Module Name: hwregs - Read/write access functions for the various ACPI 4 * control and status registers. 5 * 6 ******************************************************************************/ 7 8 /****************************************************************************** 9 * 10 * 1. Copyright Notice 11 * 12 * Some or all of this work - Copyright (c) 1999 - 2015, Intel Corp. 13 * All rights reserved. 14 * 15 * 2. License 16 * 17 * 2.1. This is your license from Intel Corp. under its intellectual property 18 * rights. You may have additional license terms from the party that provided 19 * you this software, covering your right to use that party's intellectual 20 * property rights. 21 * 22 * 2.2. Intel grants, free of charge, to any person ("Licensee") obtaining a 23 * copy of the source code appearing in this file ("Covered Code") an 24 * irrevocable, perpetual, worldwide license under Intel's copyrights in the 25 * base code distributed originally by Intel ("Original Intel Code") to copy, 26 * make derivatives, distribute, use and display any portion of the Covered 27 * Code in any form, with the right to sublicense such rights; and 28 * 29 * 2.3. Intel grants Licensee a non-exclusive and non-transferable patent 30 * license (with the right to sublicense), under only those claims of Intel 31 * patents that are infringed by the Original Intel Code, to make, use, sell, 32 * offer to sell, and import the Covered Code and derivative works thereof 33 * solely to the minimum extent necessary to exercise the above copyright 34 * license, and in no event shall the patent license extend to any additions 35 * to or modifications of the Original Intel Code. No other license or right 36 * is granted directly or by implication, estoppel or otherwise; 37 * 38 * The above copyright and patent license is granted only if the following 39 * conditions are met: 40 * 41 * 3. Conditions 42 * 43 * 3.1. Redistribution of Source with Rights to Further Distribute Source. 44 * Redistribution of source code of any substantial portion of the Covered 45 * Code or modification with rights to further distribute source must include 46 * the above Copyright Notice, the above License, this list of Conditions, 47 * and the following Disclaimer and Export Compliance provision. In addition, 48 * Licensee must cause all Covered Code to which Licensee contributes to 49 * contain a file documenting the changes Licensee made to create that Covered 50 * Code and the date of any change. Licensee must include in that file the 51 * documentation of any changes made by any predecessor Licensee. Licensee 52 * must include a prominent statement that the modification is derived, 53 * directly or indirectly, from Original Intel Code. 54 * 55 * 3.2. Redistribution of Source with no Rights to Further Distribute Source. 56 * Redistribution of source code of any substantial portion of the Covered 57 * Code or modification without rights to further distribute source must 58 * include the following Disclaimer and Export Compliance provision in the 59 * documentation and/or other materials provided with distribution. In 60 * addition, Licensee may not authorize further sublicense of source of any 61 * portion of the Covered Code, and must include terms to the effect that the 62 * license from Licensee to its licensee is limited to the intellectual 63 * property embodied in the software Licensee provides to its licensee, and 64 * not to intellectual property embodied in modifications its licensee may 65 * make. 66 * 67 * 3.3. Redistribution of Executable. Redistribution in executable form of any 68 * substantial portion of the Covered Code or modification must reproduce the 69 * above Copyright Notice, and the following Disclaimer and Export Compliance 70 * provision in the documentation and/or other materials provided with the 71 * distribution. 72 * 73 * 3.4. Intel retains all right, title, and interest in and to the Original 74 * Intel Code. 75 * 76 * 3.5. Neither the name Intel nor any other trademark owned or controlled by 77 * Intel shall be used in advertising or otherwise to promote the sale, use or 78 * other dealings in products derived from or relating to the Covered Code 79 * without prior written authorization from Intel. 80 * 81 * 4. Disclaimer and Export Compliance 82 * 83 * 4.1. INTEL MAKES NO WARRANTY OF ANY KIND REGARDING ANY SOFTWARE PROVIDED 84 * HERE. ANY SOFTWARE ORIGINATING FROM INTEL OR DERIVED FROM INTEL SOFTWARE 85 * IS PROVIDED "AS IS," AND INTEL WILL NOT PROVIDE ANY SUPPORT, ASSISTANCE, 86 * INSTALLATION, TRAINING OR OTHER SERVICES. INTEL WILL NOT PROVIDE ANY 87 * UPDATES, ENHANCEMENTS OR EXTENSIONS. INTEL SPECIFICALLY DISCLAIMS ANY 88 * IMPLIED WARRANTIES OF MERCHANTABILITY, NONINFRINGEMENT AND FITNESS FOR A 89 * PARTICULAR PURPOSE. 90 * 91 * 4.2. IN NO EVENT SHALL INTEL HAVE ANY LIABILITY TO LICENSEE, ITS LICENSEES 92 * OR ANY OTHER THIRD PARTY, FOR ANY LOST PROFITS, LOST DATA, LOSS OF USE OR 93 * COSTS OF PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES, OR FOR ANY INDIRECT, 94 * SPECIAL OR CONSEQUENTIAL DAMAGES ARISING OUT OF THIS AGREEMENT, UNDER ANY 95 * CAUSE OF ACTION OR THEORY OF LIABILITY, AND IRRESPECTIVE OF WHETHER INTEL 96 * HAS ADVANCE NOTICE OF THE POSSIBILITY OF SUCH DAMAGES. THESE LIMITATIONS 97 * SHALL APPLY NOTWITHSTANDING THE FAILURE OF THE ESSENTIAL PURPOSE OF ANY 98 * LIMITED REMEDY. 99 * 100 * 4.3. Licensee shall not export, either directly or indirectly, any of this 101 * software or system incorporating such software without first obtaining any 102 * required license or other approval from the U. S. Department of Commerce or 103 * any other agency or department of the United States Government. In the 104 * event Licensee exports any such software from the United States or 105 * re-exports any such software from a foreign destination, Licensee shall 106 * ensure that the distribution and export/re-export of the software is in 107 * compliance with all laws, regulations, orders, or other restrictions of the 108 * U.S. Export Administration Regulations. Licensee agrees that neither it nor 109 * any of its subsidiaries will export/re-export any technical data, process, 110 * software, or service, directly or indirectly, to any country for which the 111 * United States government or any agency thereof requires an export license, 112 * other governmental approval, or letter of assurance, without first obtaining 113 * such license, approval or letter. 114 * 115 *****************************************************************************/ 116 117 #include "acpi.h" 118 #include "accommon.h" 119 #include "acevents.h" 120 121 #define _COMPONENT ACPI_HARDWARE 122 ACPI_MODULE_NAME ("hwregs") 123 124 125 #if (!ACPI_REDUCED_HARDWARE) 126 127 /* Local Prototypes */ 128 129 static ACPI_STATUS 130 AcpiHwReadMultiple ( 131 UINT32 *Value, 132 ACPI_GENERIC_ADDRESS *RegisterA, 133 ACPI_GENERIC_ADDRESS *RegisterB); 134 135 static ACPI_STATUS 136 AcpiHwWriteMultiple ( 137 UINT32 Value, 138 ACPI_GENERIC_ADDRESS *RegisterA, 139 ACPI_GENERIC_ADDRESS *RegisterB); 140 141 #endif /* !ACPI_REDUCED_HARDWARE */ 142 143 /****************************************************************************** 144 * 145 * FUNCTION: AcpiHwValidateRegister 146 * 147 * PARAMETERS: Reg - GAS register structure 148 * MaxBitWidth - Max BitWidth supported (32 or 64) 149 * Address - Pointer to where the gas->address 150 * is returned 151 * 152 * RETURN: Status 153 * 154 * DESCRIPTION: Validate the contents of a GAS register. Checks the GAS 155 * pointer, Address, SpaceId, BitWidth, and BitOffset. 156 * 157 ******************************************************************************/ 158 159 ACPI_STATUS 160 AcpiHwValidateRegister ( 161 ACPI_GENERIC_ADDRESS *Reg, 162 UINT8 MaxBitWidth, 163 UINT64 *Address) 164 { 165 166 /* Must have a valid pointer to a GAS structure */ 167 168 if (!Reg) 169 { 170 return (AE_BAD_PARAMETER); 171 } 172 173 /* 174 * Copy the target address. This handles possible alignment issues. 175 * Address must not be null. A null address also indicates an optional 176 * ACPI register that is not supported, so no error message. 177 */ 178 ACPI_MOVE_64_TO_64 (Address, &Reg->Address); 179 if (!(*Address)) 180 { 181 return (AE_BAD_ADDRESS); 182 } 183 184 /* Validate the SpaceID */ 185 186 if ((Reg->SpaceId != ACPI_ADR_SPACE_SYSTEM_MEMORY) && 187 (Reg->SpaceId != ACPI_ADR_SPACE_SYSTEM_IO)) 188 { 189 ACPI_ERROR ((AE_INFO, 190 "Unsupported address space: 0x%X", Reg->SpaceId)); 191 return (AE_SUPPORT); 192 } 193 194 /* Validate the BitWidth */ 195 196 if ((Reg->BitWidth != 8) && 197 (Reg->BitWidth != 16) && 198 (Reg->BitWidth != 32) && 199 (Reg->BitWidth != MaxBitWidth)) 200 { 201 ACPI_ERROR ((AE_INFO, 202 "Unsupported register bit width: 0x%X", Reg->BitWidth)); 203 return (AE_SUPPORT); 204 } 205 206 /* Validate the BitOffset. Just a warning for now. */ 207 208 if (Reg->BitOffset != 0) 209 { 210 ACPI_WARNING ((AE_INFO, 211 "Unsupported register bit offset: 0x%X", Reg->BitOffset)); 212 } 213 214 return (AE_OK); 215 } 216 217 218 /****************************************************************************** 219 * 220 * FUNCTION: AcpiHwRead 221 * 222 * PARAMETERS: Value - Where the value is returned 223 * Reg - GAS register structure 224 * 225 * RETURN: Status 226 * 227 * DESCRIPTION: Read from either memory or IO space. This is a 32-bit max 228 * version of AcpiRead, used internally since the overhead of 229 * 64-bit values is not needed. 230 * 231 * LIMITATIONS: <These limitations also apply to AcpiHwWrite> 232 * BitWidth must be exactly 8, 16, or 32. 233 * SpaceID must be SystemMemory or SystemIO. 234 * BitOffset and AccessWidth are currently ignored, as there has 235 * not been a need to implement these. 236 * 237 ******************************************************************************/ 238 239 ACPI_STATUS 240 AcpiHwRead ( 241 UINT32 *Value, 242 ACPI_GENERIC_ADDRESS *Reg) 243 { 244 UINT64 Address; 245 UINT64 Value64; 246 ACPI_STATUS Status; 247 248 249 ACPI_FUNCTION_NAME (HwRead); 250 251 252 /* Validate contents of the GAS register */ 253 254 Status = AcpiHwValidateRegister (Reg, 32, &Address); 255 if (ACPI_FAILURE (Status)) 256 { 257 return (Status); 258 } 259 260 /* Initialize entire 32-bit return value to zero */ 261 262 *Value = 0; 263 264 /* 265 * Two address spaces supported: Memory or IO. PCI_Config is 266 * not supported here because the GAS structure is insufficient 267 */ 268 if (Reg->SpaceId == ACPI_ADR_SPACE_SYSTEM_MEMORY) 269 { 270 Status = AcpiOsReadMemory ((ACPI_PHYSICAL_ADDRESS) 271 Address, &Value64, Reg->BitWidth); 272 273 *Value = (UINT32) Value64; 274 } 275 else /* ACPI_ADR_SPACE_SYSTEM_IO, validated earlier */ 276 { 277 Status = AcpiHwReadPort ((ACPI_IO_ADDRESS) 278 Address, Value, Reg->BitWidth); 279 } 280 281 ACPI_DEBUG_PRINT ((ACPI_DB_IO, 282 "Read: %8.8X width %2d from %8.8X%8.8X (%s)\n", 283 *Value, Reg->BitWidth, ACPI_FORMAT_UINT64 (Address), 284 AcpiUtGetRegionName (Reg->SpaceId))); 285 286 return (Status); 287 } 288 289 290 /****************************************************************************** 291 * 292 * FUNCTION: AcpiHwWrite 293 * 294 * PARAMETERS: Value - Value to be written 295 * Reg - GAS register structure 296 * 297 * RETURN: Status 298 * 299 * DESCRIPTION: Write to either memory or IO space. This is a 32-bit max 300 * version of AcpiWrite, used internally since the overhead of 301 * 64-bit values is not needed. 302 * 303 ******************************************************************************/ 304 305 ACPI_STATUS 306 AcpiHwWrite ( 307 UINT32 Value, 308 ACPI_GENERIC_ADDRESS *Reg) 309 { 310 UINT64 Address; 311 ACPI_STATUS Status; 312 313 314 ACPI_FUNCTION_NAME (HwWrite); 315 316 317 /* Validate contents of the GAS register */ 318 319 Status = AcpiHwValidateRegister (Reg, 32, &Address); 320 if (ACPI_FAILURE (Status)) 321 { 322 return (Status); 323 } 324 325 /* 326 * Two address spaces supported: Memory or IO. PCI_Config is 327 * not supported here because the GAS structure is insufficient 328 */ 329 if (Reg->SpaceId == ACPI_ADR_SPACE_SYSTEM_MEMORY) 330 { 331 Status = AcpiOsWriteMemory ((ACPI_PHYSICAL_ADDRESS) 332 Address, (UINT64) Value, Reg->BitWidth); 333 } 334 else /* ACPI_ADR_SPACE_SYSTEM_IO, validated earlier */ 335 { 336 Status = AcpiHwWritePort ((ACPI_IO_ADDRESS) 337 Address, Value, Reg->BitWidth); 338 } 339 340 ACPI_DEBUG_PRINT ((ACPI_DB_IO, 341 "Wrote: %8.8X width %2d to %8.8X%8.8X (%s)\n", 342 Value, Reg->BitWidth, ACPI_FORMAT_UINT64 (Address), 343 AcpiUtGetRegionName (Reg->SpaceId))); 344 345 return (Status); 346 } 347 348 349 #if (!ACPI_REDUCED_HARDWARE) 350 /******************************************************************************* 351 * 352 * FUNCTION: AcpiHwClearAcpiStatus 353 * 354 * PARAMETERS: None 355 * 356 * RETURN: Status 357 * 358 * DESCRIPTION: Clears all fixed and general purpose status bits 359 * 360 ******************************************************************************/ 361 362 ACPI_STATUS 363 AcpiHwClearAcpiStatus ( 364 void) 365 { 366 ACPI_STATUS Status; 367 ACPI_CPU_FLAGS LockFlags = 0; 368 369 370 ACPI_FUNCTION_TRACE (HwClearAcpiStatus); 371 372 373 ACPI_DEBUG_PRINT ((ACPI_DB_IO, "About to write %04X to %8.8X%8.8X\n", 374 ACPI_BITMASK_ALL_FIXED_STATUS, 375 ACPI_FORMAT_UINT64 (AcpiGbl_XPm1aStatus.Address))); 376 377 LockFlags = AcpiOsAcquireLock (AcpiGbl_HardwareLock); 378 379 /* Clear the fixed events in PM1 A/B */ 380 381 Status = AcpiHwRegisterWrite (ACPI_REGISTER_PM1_STATUS, 382 ACPI_BITMASK_ALL_FIXED_STATUS); 383 384 AcpiOsReleaseLock (AcpiGbl_HardwareLock, LockFlags); 385 386 if (ACPI_FAILURE (Status)) 387 { 388 goto Exit; 389 } 390 391 /* Clear the GPE Bits in all GPE registers in all GPE blocks */ 392 393 Status = AcpiEvWalkGpeList (AcpiHwClearGpeBlock, NULL); 394 395 Exit: 396 return_ACPI_STATUS (Status); 397 } 398 399 400 /******************************************************************************* 401 * 402 * FUNCTION: AcpiHwGetBitRegisterInfo 403 * 404 * PARAMETERS: RegisterId - Index of ACPI Register to access 405 * 406 * RETURN: The bitmask to be used when accessing the register 407 * 408 * DESCRIPTION: Map RegisterId into a register bitmask. 409 * 410 ******************************************************************************/ 411 412 ACPI_BIT_REGISTER_INFO * 413 AcpiHwGetBitRegisterInfo ( 414 UINT32 RegisterId) 415 { 416 ACPI_FUNCTION_ENTRY (); 417 418 419 if (RegisterId > ACPI_BITREG_MAX) 420 { 421 ACPI_ERROR ((AE_INFO, "Invalid BitRegister ID: 0x%X", RegisterId)); 422 return (NULL); 423 } 424 425 return (&AcpiGbl_BitRegisterInfo[RegisterId]); 426 } 427 428 429 /****************************************************************************** 430 * 431 * FUNCTION: AcpiHwWritePm1Control 432 * 433 * PARAMETERS: Pm1aControl - Value to be written to PM1A control 434 * Pm1bControl - Value to be written to PM1B control 435 * 436 * RETURN: Status 437 * 438 * DESCRIPTION: Write the PM1 A/B control registers. These registers are 439 * different than than the PM1 A/B status and enable registers 440 * in that different values can be written to the A/B registers. 441 * Most notably, the SLP_TYP bits can be different, as per the 442 * values returned from the _Sx predefined methods. 443 * 444 ******************************************************************************/ 445 446 ACPI_STATUS 447 AcpiHwWritePm1Control ( 448 UINT32 Pm1aControl, 449 UINT32 Pm1bControl) 450 { 451 ACPI_STATUS Status; 452 453 454 ACPI_FUNCTION_TRACE (HwWritePm1Control); 455 456 457 Status = AcpiHwWrite (Pm1aControl, &AcpiGbl_FADT.XPm1aControlBlock); 458 if (ACPI_FAILURE (Status)) 459 { 460 return_ACPI_STATUS (Status); 461 } 462 463 if (AcpiGbl_FADT.XPm1bControlBlock.Address) 464 { 465 Status = AcpiHwWrite (Pm1bControl, &AcpiGbl_FADT.XPm1bControlBlock); 466 } 467 return_ACPI_STATUS (Status); 468 } 469 470 471 /****************************************************************************** 472 * 473 * FUNCTION: AcpiHwRegisterRead 474 * 475 * PARAMETERS: RegisterId - ACPI Register ID 476 * ReturnValue - Where the register value is returned 477 * 478 * RETURN: Status and the value read. 479 * 480 * DESCRIPTION: Read from the specified ACPI register 481 * 482 ******************************************************************************/ 483 484 ACPI_STATUS 485 AcpiHwRegisterRead ( 486 UINT32 RegisterId, 487 UINT32 *ReturnValue) 488 { 489 UINT32 Value = 0; 490 ACPI_STATUS Status; 491 492 493 ACPI_FUNCTION_TRACE (HwRegisterRead); 494 495 496 switch (RegisterId) 497 { 498 case ACPI_REGISTER_PM1_STATUS: /* PM1 A/B: 16-bit access each */ 499 500 Status = AcpiHwReadMultiple (&Value, 501 &AcpiGbl_XPm1aStatus, 502 &AcpiGbl_XPm1bStatus); 503 break; 504 505 case ACPI_REGISTER_PM1_ENABLE: /* PM1 A/B: 16-bit access each */ 506 507 Status = AcpiHwReadMultiple (&Value, 508 &AcpiGbl_XPm1aEnable, 509 &AcpiGbl_XPm1bEnable); 510 break; 511 512 case ACPI_REGISTER_PM1_CONTROL: /* PM1 A/B: 16-bit access each */ 513 514 Status = AcpiHwReadMultiple (&Value, 515 &AcpiGbl_FADT.XPm1aControlBlock, 516 &AcpiGbl_FADT.XPm1bControlBlock); 517 518 /* 519 * Zero the write-only bits. From the ACPI specification, "Hardware 520 * Write-Only Bits": "Upon reads to registers with write-only bits, 521 * software masks out all write-only bits." 522 */ 523 Value &= ~ACPI_PM1_CONTROL_WRITEONLY_BITS; 524 break; 525 526 case ACPI_REGISTER_PM2_CONTROL: /* 8-bit access */ 527 528 Status = AcpiHwRead (&Value, &AcpiGbl_FADT.XPm2ControlBlock); 529 break; 530 531 case ACPI_REGISTER_PM_TIMER: /* 32-bit access */ 532 533 Status = AcpiHwRead (&Value, &AcpiGbl_FADT.XPmTimerBlock); 534 break; 535 536 case ACPI_REGISTER_SMI_COMMAND_BLOCK: /* 8-bit access */ 537 538 Status = AcpiHwReadPort (AcpiGbl_FADT.SmiCommand, &Value, 8); 539 break; 540 541 default: 542 543 ACPI_ERROR ((AE_INFO, "Unknown Register ID: 0x%X", 544 RegisterId)); 545 Status = AE_BAD_PARAMETER; 546 break; 547 } 548 549 if (ACPI_SUCCESS (Status)) 550 { 551 *ReturnValue = Value; 552 } 553 554 return_ACPI_STATUS (Status); 555 } 556 557 558 /****************************************************************************** 559 * 560 * FUNCTION: AcpiHwRegisterWrite 561 * 562 * PARAMETERS: RegisterId - ACPI Register ID 563 * Value - The value to write 564 * 565 * RETURN: Status 566 * 567 * DESCRIPTION: Write to the specified ACPI register 568 * 569 * NOTE: In accordance with the ACPI specification, this function automatically 570 * preserves the value of the following bits, meaning that these bits cannot be 571 * changed via this interface: 572 * 573 * PM1_CONTROL[0] = SCI_EN 574 * PM1_CONTROL[9] 575 * PM1_STATUS[11] 576 * 577 * ACPI References: 578 * 1) Hardware Ignored Bits: When software writes to a register with ignored 579 * bit fields, it preserves the ignored bit fields 580 * 2) SCI_EN: OSPM always preserves this bit position 581 * 582 ******************************************************************************/ 583 584 ACPI_STATUS 585 AcpiHwRegisterWrite ( 586 UINT32 RegisterId, 587 UINT32 Value) 588 { 589 ACPI_STATUS Status; 590 UINT32 ReadValue; 591 592 593 ACPI_FUNCTION_TRACE (HwRegisterWrite); 594 595 596 switch (RegisterId) 597 { 598 case ACPI_REGISTER_PM1_STATUS: /* PM1 A/B: 16-bit access each */ 599 /* 600 * Handle the "ignored" bit in PM1 Status. According to the ACPI 601 * specification, ignored bits are to be preserved when writing. 602 * Normally, this would mean a read/modify/write sequence. However, 603 * preserving a bit in the status register is different. Writing a 604 * one clears the status, and writing a zero preserves the status. 605 * Therefore, we must always write zero to the ignored bit. 606 * 607 * This behavior is clarified in the ACPI 4.0 specification. 608 */ 609 Value &= ~ACPI_PM1_STATUS_PRESERVED_BITS; 610 611 Status = AcpiHwWriteMultiple (Value, 612 &AcpiGbl_XPm1aStatus, 613 &AcpiGbl_XPm1bStatus); 614 break; 615 616 case ACPI_REGISTER_PM1_ENABLE: /* PM1 A/B: 16-bit access each */ 617 618 Status = AcpiHwWriteMultiple (Value, 619 &AcpiGbl_XPm1aEnable, 620 &AcpiGbl_XPm1bEnable); 621 break; 622 623 case ACPI_REGISTER_PM1_CONTROL: /* PM1 A/B: 16-bit access each */ 624 /* 625 * Perform a read first to preserve certain bits (per ACPI spec) 626 * Note: This includes SCI_EN, we never want to change this bit 627 */ 628 Status = AcpiHwReadMultiple (&ReadValue, 629 &AcpiGbl_FADT.XPm1aControlBlock, 630 &AcpiGbl_FADT.XPm1bControlBlock); 631 if (ACPI_FAILURE (Status)) 632 { 633 goto Exit; 634 } 635 636 /* Insert the bits to be preserved */ 637 638 ACPI_INSERT_BITS (Value, ACPI_PM1_CONTROL_PRESERVED_BITS, ReadValue); 639 640 /* Now we can write the data */ 641 642 Status = AcpiHwWriteMultiple (Value, 643 &AcpiGbl_FADT.XPm1aControlBlock, 644 &AcpiGbl_FADT.XPm1bControlBlock); 645 break; 646 647 case ACPI_REGISTER_PM2_CONTROL: /* 8-bit access */ 648 /* 649 * For control registers, all reserved bits must be preserved, 650 * as per the ACPI spec. 651 */ 652 Status = AcpiHwRead (&ReadValue, &AcpiGbl_FADT.XPm2ControlBlock); 653 if (ACPI_FAILURE (Status)) 654 { 655 goto Exit; 656 } 657 658 /* Insert the bits to be preserved */ 659 660 ACPI_INSERT_BITS (Value, ACPI_PM2_CONTROL_PRESERVED_BITS, ReadValue); 661 662 Status = AcpiHwWrite (Value, &AcpiGbl_FADT.XPm2ControlBlock); 663 break; 664 665 case ACPI_REGISTER_PM_TIMER: /* 32-bit access */ 666 667 Status = AcpiHwWrite (Value, &AcpiGbl_FADT.XPmTimerBlock); 668 break; 669 670 case ACPI_REGISTER_SMI_COMMAND_BLOCK: /* 8-bit access */ 671 672 /* SMI_CMD is currently always in IO space */ 673 674 Status = AcpiHwWritePort (AcpiGbl_FADT.SmiCommand, Value, 8); 675 break; 676 677 default: 678 679 ACPI_ERROR ((AE_INFO, "Unknown Register ID: 0x%X", 680 RegisterId)); 681 Status = AE_BAD_PARAMETER; 682 break; 683 } 684 685 Exit: 686 return_ACPI_STATUS (Status); 687 } 688 689 690 /****************************************************************************** 691 * 692 * FUNCTION: AcpiHwReadMultiple 693 * 694 * PARAMETERS: Value - Where the register value is returned 695 * RegisterA - First ACPI register (required) 696 * RegisterB - Second ACPI register (optional) 697 * 698 * RETURN: Status 699 * 700 * DESCRIPTION: Read from the specified two-part ACPI register (such as PM1 A/B) 701 * 702 ******************************************************************************/ 703 704 static ACPI_STATUS 705 AcpiHwReadMultiple ( 706 UINT32 *Value, 707 ACPI_GENERIC_ADDRESS *RegisterA, 708 ACPI_GENERIC_ADDRESS *RegisterB) 709 { 710 UINT32 ValueA = 0; 711 UINT32 ValueB = 0; 712 ACPI_STATUS Status; 713 714 715 /* The first register is always required */ 716 717 Status = AcpiHwRead (&ValueA, RegisterA); 718 if (ACPI_FAILURE (Status)) 719 { 720 return (Status); 721 } 722 723 /* Second register is optional */ 724 725 if (RegisterB->Address) 726 { 727 Status = AcpiHwRead (&ValueB, RegisterB); 728 if (ACPI_FAILURE (Status)) 729 { 730 return (Status); 731 } 732 } 733 734 /* 735 * OR the two return values together. No shifting or masking is necessary, 736 * because of how the PM1 registers are defined in the ACPI specification: 737 * 738 * "Although the bits can be split between the two register blocks (each 739 * register block has a unique pointer within the FADT), the bit positions 740 * are maintained. The register block with unimplemented bits (that is, 741 * those implemented in the other register block) always returns zeros, 742 * and writes have no side effects" 743 */ 744 *Value = (ValueA | ValueB); 745 return (AE_OK); 746 } 747 748 749 /****************************************************************************** 750 * 751 * FUNCTION: AcpiHwWriteMultiple 752 * 753 * PARAMETERS: Value - The value to write 754 * RegisterA - First ACPI register (required) 755 * RegisterB - Second ACPI register (optional) 756 * 757 * RETURN: Status 758 * 759 * DESCRIPTION: Write to the specified two-part ACPI register (such as PM1 A/B) 760 * 761 ******************************************************************************/ 762 763 static ACPI_STATUS 764 AcpiHwWriteMultiple ( 765 UINT32 Value, 766 ACPI_GENERIC_ADDRESS *RegisterA, 767 ACPI_GENERIC_ADDRESS *RegisterB) 768 { 769 ACPI_STATUS Status; 770 771 772 /* The first register is always required */ 773 774 Status = AcpiHwWrite (Value, RegisterA); 775 if (ACPI_FAILURE (Status)) 776 { 777 return (Status); 778 } 779 780 /* 781 * Second register is optional 782 * 783 * No bit shifting or clearing is necessary, because of how the PM1 784 * registers are defined in the ACPI specification: 785 * 786 * "Although the bits can be split between the two register blocks (each 787 * register block has a unique pointer within the FADT), the bit positions 788 * are maintained. The register block with unimplemented bits (that is, 789 * those implemented in the other register block) always returns zeros, 790 * and writes have no side effects" 791 */ 792 if (RegisterB->Address) 793 { 794 Status = AcpiHwWrite (Value, RegisterB); 795 } 796 797 return (Status); 798 } 799 800 #endif /* !ACPI_REDUCED_HARDWARE */ 801