1 /* 2 * Copyright 2011, Haiku, Inc. All Rights Reserved. 3 * Distributed under the terms of the MIT License. 4 * 5 * Authors: 6 * Alexander von Gluck IV, kallisti5@unixzen.com 7 */ 8 #ifndef RADEON_HD_DISPLAYPORT_H 9 #define RADEON_HD_DISPLAYPORT_H 10 11 12 #include <create_display_modes.h> 13 #include <stdint.h> 14 #include <SupportDefs.h> 15 16 #include "accelerant.h" 17 #include "dp.h" 18 19 20 // Radeon HD specific DisplayPort Configuration Data 21 #define DP_TRAINING_AUX_RD_INTERVAL 0x000e 22 #define DP_TPS3_SUPPORTED (1 << 6) // Stored within MAX_LANE_COUNT 23 24 25 uint8 dpcd_reg_read(uint32 hwPin, uint16 address); 26 void dpcd_reg_write(uint32 hwPin, uint16 address, uint8 value); 27 28 int dp_aux_write(uint32 hwPin, uint16 address, uint8* send, 29 uint8 sendBytes, uint8 delay); 30 int dp_aux_read(uint32 hwPin, uint16 address, uint8* recv, 31 int recvBytes, uint8 delay); 32 status_t dp_aux_set_i2c_byte(uint32 hwPin, uint16 address, 33 uint8* data, bool end); 34 status_t dp_aux_get_i2c_byte(uint32 hwPin, uint16 address, 35 uint8* data, bool end); 36 37 uint32 dp_get_link_rate(uint32 connectorIndex, display_mode* mode); 38 uint32 dp_get_lane_count(uint32 connectorIndex, display_mode* mode); 39 40 void dp_setup_connectors(); 41 42 status_t dp_link_train(uint32 connectorIndex, display_mode* mode); 43 status_t dp_link_train_cr(uint32 connectorIndex); 44 status_t dp_link_train_ce(uint32 connectorIndex); 45 46 void debug_dp_info(); 47 48 #endif /* RADEON_HD_DISPLAYPORT_H */ 49