196587f13SAlexander von Gluck IV /* 204234432SAlexander von Gluck IV * Copyright 2011-2013, Haiku, Inc. All Rights Reserved. 396587f13SAlexander von Gluck IV * Distributed under the terms of the MIT License. 496587f13SAlexander von Gluck IV * 596587f13SAlexander von Gluck IV * Authors: 696587f13SAlexander von Gluck IV * Alexander von Gluck IV, kallisti5@unixzen.com 704234432SAlexander von Gluck IV * Bill Randle, billr@neocat.org 896587f13SAlexander von Gluck IV */ 996587f13SAlexander von Gluck IV #ifndef RADEON_HD_DISPLAYPORT_H 1096587f13SAlexander von Gluck IV #define RADEON_HD_DISPLAYPORT_H 1196587f13SAlexander von Gluck IV 1296587f13SAlexander von Gluck IV 13c8677fb1SAlexander von Gluck IV #include <create_display_modes.h> 1496587f13SAlexander von Gluck IV #include <stdint.h> 1596587f13SAlexander von Gluck IV #include <SupportDefs.h> 1696587f13SAlexander von Gluck IV 1783e3a8eaSAlexander von Gluck IV #include "accelerant.h" 180de9d6cdSAlexander von Gluck IV #include "dp.h" 19c8677fb1SAlexander von Gluck IV 2096587f13SAlexander von Gluck IV 21c6799d8aSAlexander von Gluck IV // Radeon HD specific DisplayPort Configuration Data 22c6799d8aSAlexander von Gluck IV #define DP_TRAINING_AUX_RD_INTERVAL 0x000e 238dfc5dbbSAlexander von Gluck IV #define DP_TPS3_SUPPORTED (1 << 6) // Stored within MAX_LANE_COUNT 24c6799d8aSAlexander von Gluck IV 25c6799d8aSAlexander von Gluck IV 26339a0181SAlexander von Gluck IV uint8 dpcd_reg_read(uint32 connectorIndex, uint16 address); 27339a0181SAlexander von Gluck IV void dpcd_reg_write(uint32 connectorIndex, uint16 address, uint8 value); 285f44fcceSAlexander von Gluck IV 29bd1c4402SAlexander von Gluck IV // Communication over DisplayPort AUX channel 309816a89aSAlexander von Gluck IV status_t dp_aux_transaction(uint32 connectorIndex, dp_aux_msg* message); 31bd1c4402SAlexander von Gluck IV 32339a0181SAlexander von Gluck IV status_t dp_aux_set_i2c_byte(uint32 connectorIndex, uint16 address, 3304234432SAlexander von Gluck IV uint8* data, bool start, bool stop); 34339a0181SAlexander von Gluck IV status_t dp_aux_get_i2c_byte(uint32 connectorIndex, uint16 address, 3504234432SAlexander von Gluck IV uint8* data, bool start, bool stop); 3696587f13SAlexander von Gluck IV 374e7e3e33SAlexander von Gluck IV uint32 dp_get_link_rate(uint32 connectorIndex, display_mode* mode); 384e7e3e33SAlexander von Gluck IV uint32 dp_get_lane_count(uint32 connectorIndex, display_mode* mode); 39*b82657abSAlexander von Gluck IV uint32 dp_get_encoder_config(uint32 connectorIndex); 4025a087bcSAlexander von Gluck IV uint8 dp_get_sink_type(uint32 connectorIndex); 41c8677fb1SAlexander von Gluck IV 42f2c3cbf7SAlexander von Gluck IV void dp_setup_connectors(); 430de9d6cdSAlexander von Gluck IV 4400bc40adSAlexander von Gluck IV status_t dp_link_train(uint8 crtcID); 450de9d6cdSAlexander von Gluck IV status_t dp_link_train_cr(uint32 connectorIndex); 465006aac2SAlexander von Gluck IV status_t dp_link_train_ce(uint32 connectorIndex, bool tp3Support); 4796587f13SAlexander von Gluck IV 489c2d51d6SAlexander von Gluck IV bool dp_is_dp12_capable(uint32 connectorIndex); 499c2d51d6SAlexander von Gluck IV 50d92959abSAlexander von Gluck IV void debug_dp_info(); 5196587f13SAlexander von Gluck IV 5204234432SAlexander von Gluck IV status_t dp_get_pixel_size_for(color_space space, size_t *pixelChunk, 5304234432SAlexander von Gluck IV size_t *rowAlignment, size_t *pixelsPerChunk); 5400bc40adSAlexander von Gluck IV 5500bc40adSAlexander von Gluck IV bool ddc2_dp_read_edid1(uint32 connectorIndex, edid1_info *edid); 5604234432SAlexander von Gluck IV 5704234432SAlexander von Gluck IV 5896587f13SAlexander von Gluck IV #endif /* RADEON_HD_DISPLAYPORT_H */ 59