xref: /haiku/src/add-ons/accelerants/nvidia/engine/nv_globals.h (revision 893988af824e65e49e55f517b157db8386e8002b)
1 extern int fd;
2 extern shared_info *si;
3 extern area_id shared_info_area;
4 extern area_id dma_cmd_buf_area;
5 extern area_id regs_area;
6 extern vuint32 *regs;
7 extern display_mode *my_mode_list;
8 extern area_id my_mode_list_area;
9 extern int accelerantIsClone;
10 
11 extern nv_get_set_pci nv_pci_access;
12 extern nv_in_out_isa nv_isa_access;
13 
14 typedef status_t (*crtc_interrupt_enable)(bool);
15 typedef status_t (*crtc_update_fifo)(void);
16 typedef status_t (*crtc_validate_timing)(uint16*, uint16*, uint16*, uint16*, uint16*, uint16*, uint16*, uint16*);
17 typedef status_t (*crtc_set_timing)(display_mode);
18 typedef status_t (*crtc_depth)(int);
19 typedef status_t (*crtc_dpms)(bool, bool, bool, bool);
20 typedef status_t (*crtc_set_display_pitch)(void);
21 typedef status_t (*crtc_set_display_start)(uint32, uint8);
22 typedef status_t (*crtc_cursor_init)(void);
23 typedef status_t (*crtc_cursor_show)(void);
24 typedef status_t (*crtc_cursor_hide)(void);
25 typedef status_t (*crtc_cursor_define)(uint8*, uint8*);
26 typedef status_t (*crtc_cursor_position)(uint16, uint16);
27 typedef status_t (*crtc_stop_tvout)(void);
28 typedef status_t (*crtc_start_tvout)(void);
29 
30 typedef status_t (*dac_mode)(int, float);
31 typedef status_t (*dac_palette)(uint8[256], uint8[256], uint8[256]);
32 typedef status_t (*dac_set_pix_pll)(display_mode);
33 typedef status_t (*dac_pix_pll_find)(display_mode, float*, uint8*, uint8*, uint8*, uint8);
34 
35 crtc_interrupt_enable	head1_interrupt_enable;
36 crtc_update_fifo		head1_update_fifo;
37 crtc_validate_timing 	head1_validate_timing;
38 crtc_set_timing 		head1_set_timing;
39 crtc_depth				head1_depth;
40 crtc_dpms				head1_dpms;
41 crtc_set_display_pitch	head1_set_display_pitch;
42 crtc_set_display_start	head1_set_display_start;
43 crtc_cursor_init		head1_cursor_init;
44 crtc_cursor_show		head1_cursor_show;
45 crtc_cursor_hide		head1_cursor_hide;
46 crtc_cursor_define		head1_cursor_define;
47 crtc_cursor_position	head1_cursor_position;
48 crtc_stop_tvout			head1_stop_tvout;
49 crtc_start_tvout		head1_start_tvout;
50 
51 crtc_interrupt_enable	head2_interrupt_enable;
52 crtc_update_fifo		head2_update_fifo;
53 crtc_validate_timing	head2_validate_timing;
54 crtc_set_timing			head2_set_timing;
55 crtc_depth				head2_depth;
56 crtc_dpms				head2_dpms;
57 crtc_set_display_pitch	head2_set_display_pitch;
58 crtc_set_display_start	head2_set_display_start;
59 crtc_cursor_init		head2_cursor_init;
60 crtc_cursor_show		head2_cursor_show;
61 crtc_cursor_hide		head2_cursor_hide;
62 crtc_cursor_define		head2_cursor_define;
63 crtc_cursor_position	head2_cursor_position;
64 crtc_stop_tvout			head2_stop_tvout;
65 crtc_start_tvout		head2_start_tvout;
66 
67 dac_mode				head1_mode;
68 dac_palette				head1_palette;
69 dac_set_pix_pll			head1_set_pix_pll;
70 dac_pix_pll_find		head1_pix_pll_find;
71 
72 dac_mode				head2_mode;
73 dac_palette				head2_palette;
74 dac_set_pix_pll			head2_set_pix_pll;
75 dac_pix_pll_find		head2_pix_pll_find;
76