xref: /haiku/src/add-ons/accelerants/nvidia/engine/nv_globals.c (revision 6f80a9801fedbe7355c4360bd204ba746ec3ec2d)
1 /*
2 	Copyright 1999, Be Incorporated.   All Rights Reserved.
3 	This file may be used under the terms of the Be Sample Code License.
4 
5 	Other authors:
6 	Mark Watson,
7 	Rudolf Cornelissen 8/2004-5/2005
8 */
9 
10 #include "nv_std.h"
11 
12 int fd;
13 shared_info *si;
14 area_id shared_info_area;
15 area_id dma_cmd_buf_area;
16 vuint32 *regs;
17 area_id regs_area;
18 display_mode *my_mode_list;
19 area_id	my_mode_list_area;
20 int accelerantIsClone;
21 
22 crtc_interrupt_enable	head1_interrupt_enable;
23 crtc_update_fifo		head1_update_fifo;
24 crtc_validate_timing 	head1_validate_timing;
25 crtc_set_timing 		head1_set_timing;
26 crtc_depth				head1_depth;
27 crtc_dpms				head1_dpms;
28 crtc_set_display_pitch	head1_set_display_pitch;
29 crtc_set_display_start	head1_set_display_start;
30 crtc_cursor_init		head1_cursor_init;
31 crtc_cursor_show		head1_cursor_show;
32 crtc_cursor_hide		head1_cursor_hide;
33 crtc_cursor_define		head1_cursor_define;
34 crtc_cursor_position	head1_cursor_position;
35 crtc_stop_tvout			head1_stop_tvout;
36 crtc_start_tvout		head1_start_tvout;
37 
38 crtc_interrupt_enable	head2_interrupt_enable;
39 crtc_update_fifo		head2_update_fifo;
40 crtc_validate_timing	head2_validate_timing;
41 crtc_set_timing			head2_set_timing;
42 crtc_depth				head2_depth;
43 crtc_dpms				head2_dpms;
44 crtc_set_display_pitch	head2_set_display_pitch;
45 crtc_set_display_start	head2_set_display_start;
46 crtc_cursor_init		head2_cursor_init;
47 crtc_cursor_show		head2_cursor_show;
48 crtc_cursor_hide		head2_cursor_hide;
49 crtc_cursor_define		head2_cursor_define;
50 crtc_cursor_position	head2_cursor_position;
51 crtc_stop_tvout			head2_stop_tvout;
52 crtc_start_tvout		head2_start_tvout;
53 
54 dac_mode				head1_mode;
55 dac_palette				head1_palette;
56 dac_set_pix_pll			head1_set_pix_pll;
57 dac_pix_pll_find		head1_pix_pll_find;
58 
59 dac_mode				head2_mode;
60 dac_palette				head2_palette;
61 dac_set_pix_pll			head2_set_pix_pll;
62 dac_pix_pll_find		head2_pix_pll_find;
63 
64 nv_get_set_pci nv_pci_access=
65 	{
66 		NV_PRIVATE_DATA_MAGIC,
67 		0,
68 		4,
69 		0
70 	};
71 
72 nv_in_out_isa nv_isa_access=
73 	{
74 		NV_PRIVATE_DATA_MAGIC,
75 		0,
76 		1,
77 		0
78 	};
79