1 /* Authors: 2 Mark Watson 12/1999, 3 Apsed, 4 Rudolf Cornelissen 10/2002-9/2007 5 */ 6 7 #define MODULE_BIT 0x00008000 8 9 #include "nv_std.h" 10 11 static status_t test_ram(void); 12 static status_t nvxx_general_powerup (void); 13 static void unlock_card(void); 14 static status_t nv_general_bios_to_powergraphics(void); 15 16 static void nv_dump_configuration_space (void) 17 { 18 #define DUMP_CFG(reg, type) if (si->ps.card_type >= type) do { \ 19 uint32 value = CFGR(reg); \ 20 MSG(("configuration_space 0x%02x %20s 0x%08x\n", \ 21 NVCFG_##reg, #reg, value)); \ 22 } while (0) 23 DUMP_CFG (DEVID, 0); 24 DUMP_CFG (DEVCTRL, 0); 25 DUMP_CFG (CLASS, 0); 26 DUMP_CFG (HEADER, 0); 27 DUMP_CFG (BASE1REGS,0); 28 DUMP_CFG (BASE2FB, 0); 29 DUMP_CFG (BASE3, 0); 30 DUMP_CFG (BASE4, 0); 31 DUMP_CFG (BASE5, 0); 32 DUMP_CFG (BASE6, 0); 33 DUMP_CFG (BASE7, 0); 34 DUMP_CFG (SUBSYSID1,0); 35 DUMP_CFG (ROMBASE, 0); 36 DUMP_CFG (CAPPTR, 0); 37 DUMP_CFG (CFG_1, 0); 38 DUMP_CFG (INTERRUPT,0); 39 DUMP_CFG (SUBSYSID2,0); 40 DUMP_CFG (AGPREF, 0); 41 DUMP_CFG (AGPSTAT, 0); 42 DUMP_CFG (AGPCMD, 0); 43 DUMP_CFG (ROMSHADOW,0); 44 DUMP_CFG (VGA, 0); 45 DUMP_CFG (SCHRATCH, 0); 46 DUMP_CFG (CFG_10, 0); 47 DUMP_CFG (CFG_11, 0); 48 DUMP_CFG (CFG_12, 0); 49 DUMP_CFG (CFG_13, 0); 50 DUMP_CFG (CFG_14, 0); 51 DUMP_CFG (CFG_15, 0); 52 DUMP_CFG (CFG_16, 0); 53 DUMP_CFG (PCIEREF, 0); 54 DUMP_CFG (PCIEDCAP, 0); 55 DUMP_CFG (PCIEDCTST,0); 56 DUMP_CFG (PCIELCAP, 0); 57 DUMP_CFG (PCIELCTST,0); 58 DUMP_CFG (CFG_22, 0); 59 DUMP_CFG (CFG_23, 0); 60 DUMP_CFG (CFG_24, 0); 61 DUMP_CFG (CFG_25, 0); 62 DUMP_CFG (CFG_26, 0); 63 DUMP_CFG (CFG_27, 0); 64 DUMP_CFG (CFG_28, 0); 65 DUMP_CFG (CFG_29, 0); 66 DUMP_CFG (CFG_30, 0); 67 DUMP_CFG (CFG_31, 0); 68 DUMP_CFG (CFG_32, 0); 69 DUMP_CFG (CFG_33, 0); 70 DUMP_CFG (CFG_34, 0); 71 DUMP_CFG (CFG_35, 0); 72 DUMP_CFG (CFG_36, 0); 73 DUMP_CFG (CFG_37, 0); 74 DUMP_CFG (CFG_38, 0); 75 DUMP_CFG (CFG_39, 0); 76 DUMP_CFG (CFG_40, 0); 77 DUMP_CFG (CFG_41, 0); 78 DUMP_CFG (CFG_42, 0); 79 DUMP_CFG (CFG_43, 0); 80 DUMP_CFG (CFG_44, 0); 81 DUMP_CFG (CFG_45, 0); 82 DUMP_CFG (CFG_46, 0); 83 DUMP_CFG (CFG_47, 0); 84 DUMP_CFG (CFG_48, 0); 85 DUMP_CFG (CFG_49, 0); 86 DUMP_CFG (CFG_50, 0); 87 #undef DUMP_CFG 88 } 89 90 status_t nv_general_powerup() 91 { 92 status_t status; 93 94 LOG(1,("POWERUP: Haiku nVidia Accelerant 0.82 running.\n")); 95 96 /* log VBLANK INT usability status */ 97 if (si->ps.int_assigned) 98 LOG(4,("POWERUP: Usable INT assigned to HW; Vblank semaphore enabled\n")); 99 else 100 LOG(4,("POWERUP: No (usable) INT assigned to HW; Vblank semaphore disabled\n")); 101 102 /* preset no laptop */ 103 si->ps.laptop = false; 104 105 /* WARNING: 106 * _adi.name_ and _adi.chipset_ can contain 31 readable characters max.!!! */ 107 108 /* detect card type and power it up */ 109 switch(CFGR(DEVID)) 110 { 111 /* Vendor Nvidia */ 112 case 0x002010de: /* Nvidia TNT1 */ 113 si->ps.card_type = NV04; 114 si->ps.card_arch = NV04A; 115 sprintf(si->adi.name, "Nvidia TNT1"); 116 sprintf(si->adi.chipset, "NV04"); 117 status = nvxx_general_powerup(); 118 break; 119 case 0x002810de: /* Nvidia TNT2 (pro) */ 120 case 0x002910de: /* Nvidia TNT2 Ultra */ 121 case 0x002a10de: /* Nvidia TNT2 */ 122 case 0x002b10de: /* Nvidia TNT2 */ 123 si->ps.card_type = NV05; 124 si->ps.card_arch = NV04A; 125 sprintf(si->adi.name, "Nvidia TNT2"); 126 sprintf(si->adi.chipset, "NV05"); 127 status = nvxx_general_powerup(); 128 break; 129 case 0x002c10de: /* Nvidia Vanta (Lt) */ 130 si->ps.card_type = NV05; 131 si->ps.card_arch = NV04A; 132 sprintf(si->adi.name, "Nvidia Vanta (Lt)"); 133 sprintf(si->adi.chipset, "NV05"); 134 status = nvxx_general_powerup(); 135 break; 136 case 0x002d10de: /* Nvidia TNT2-M64 (Pro) */ 137 si->ps.card_type = NV05M64; 138 si->ps.card_arch = NV04A; 139 sprintf(si->adi.name, "Nvidia TNT2-M64 (Pro)"); 140 sprintf(si->adi.chipset, "NV05 model 64"); 141 status = nvxx_general_powerup(); 142 break; 143 case 0x002e10de: /* Nvidia NV06 Vanta */ 144 case 0x002f10de: /* Nvidia NV06 Vanta */ 145 si->ps.card_type = NV06; 146 si->ps.card_arch = NV04A; 147 sprintf(si->adi.name, "Nvidia Vanta"); 148 sprintf(si->adi.chipset, "NV06"); 149 status = nvxx_general_powerup(); 150 break; 151 case 0x004010de: /* Nvidia GeForce FX 6800 Ultra */ 152 case 0x004110de: /* Nvidia GeForce FX 6800 */ 153 case 0x004210de: /* Nvidia GeForce FX 6800LE */ 154 si->ps.card_type = NV40; 155 si->ps.card_arch = NV40A; 156 sprintf(si->adi.name, "Nvidia GeForce FX 6800"); 157 sprintf(si->adi.chipset, "NV40"); 158 status = nvxx_general_powerup(); 159 break; 160 case 0x004310de: /* Nvidia unknown FX */ 161 si->ps.card_type = NV40; 162 si->ps.card_arch = NV40A; 163 sprintf(si->adi.name, "Nvidia unknown FX"); 164 sprintf(si->adi.chipset, "NV40"); 165 status = nvxx_general_powerup(); 166 break; 167 case 0x004510de: /* Nvidia GeForce FX 6800 GT */ 168 case 0x004610de: /* Nvidia GeForce FX 6800 GT */ 169 case 0x004810de: /* Nvidia GeForce FX 6800 XT */ 170 si->ps.card_type = NV40; 171 si->ps.card_arch = NV40A; 172 sprintf(si->adi.name, "Nvidia GeForce FX 6800"); 173 sprintf(si->adi.chipset, "NV40"); 174 status = nvxx_general_powerup(); 175 break; 176 case 0x004910de: /* Nvidia unknown FX */ 177 si->ps.card_type = NV40; 178 si->ps.card_arch = NV40A; 179 sprintf(si->adi.name, "Nvidia unknown FX"); 180 sprintf(si->adi.chipset, "NV40"); 181 status = nvxx_general_powerup(); 182 break; 183 case 0x004d10de: /* Nvidia Quadro FX 4400 */ 184 case 0x004e10de: /* Nvidia Quadro FX 4000 */ 185 si->ps.card_type = NV40; 186 si->ps.card_arch = NV40A; 187 sprintf(si->adi.name, "Nvidia Quadro FX 4000/4400"); 188 sprintf(si->adi.chipset, "NV40"); 189 status = nvxx_general_powerup(); 190 break; 191 case 0x009110de: /* Nvidia GeForce 7800 GTX PCIe */ 192 case 0x009210de: /* Nvidia Geforce 7800 GT PCIe */ 193 si->ps.card_type = G70; 194 si->ps.card_arch = NV40A; 195 sprintf(si->adi.name, "Nvidia Geforce 7800 GT PCIe"); 196 sprintf(si->adi.chipset, "G70"); 197 status = nvxx_general_powerup(); 198 break; 199 case 0x009810de: /* Nvidia Geforce 7800 Go PCIe */ 200 case 0x009910de: /* Nvidia Geforce 7800 GTX Go PCIe */ 201 si->ps.card_type = G70; 202 si->ps.card_arch = NV40A; 203 si->ps.laptop = true; 204 sprintf(si->adi.name, "Nvidia Geforce 7800 GTX Go PCIe"); 205 sprintf(si->adi.chipset, "G70"); 206 status = nvxx_general_powerup(); 207 break; 208 case 0x009d10de: /* Nvidia Quadro FX 4500 */ 209 si->ps.card_type = G70; 210 si->ps.card_arch = NV40A; 211 sprintf(si->adi.name, "Nvidia Quadro FX 4500"); 212 sprintf(si->adi.chipset, "G70"); 213 status = nvxx_general_powerup(); 214 break; 215 case 0x00a010de: /* Nvidia Aladdin TNT2 */ 216 si->ps.card_type = NV05; 217 si->ps.card_arch = NV04A; 218 sprintf(si->adi.name, "Nvidia Aladdin TNT2"); 219 sprintf(si->adi.chipset, "NV05"); 220 status = nvxx_general_powerup(); 221 break; 222 case 0x00c010de: /* Nvidia unknown FX */ 223 si->ps.card_type = NV41; 224 si->ps.card_arch = NV40A; 225 sprintf(si->adi.name, "Nvidia unknown FX"); 226 sprintf(si->adi.chipset, "NV41"); 227 status = nvxx_general_powerup(); 228 break; 229 case 0x00c110de: /* Nvidia GeForce FX 6800 */ 230 case 0x00c210de: /* Nvidia GeForce FX 6800LE */ 231 case 0x00c310de: /* Nvidia GeForce FX 6800 XT */ 232 si->ps.card_type = NV41; 233 si->ps.card_arch = NV40A; 234 sprintf(si->adi.name, "Nvidia GeForce FX 6800"); 235 sprintf(si->adi.chipset, "NV41"); 236 status = nvxx_general_powerup(); 237 break; 238 case 0x00c810de: /* Nvidia GeForce FX 6800 Go */ 239 case 0x00c910de: /* Nvidia GeForce FX 6800 Ultra Go */ 240 si->ps.card_type = NV41; 241 si->ps.card_arch = NV40A; 242 si->ps.laptop = true; 243 sprintf(si->adi.name, "Nvidia GeForce FX 6800 Go"); 244 sprintf(si->adi.chipset, "NV41"); 245 status = nvxx_general_powerup(); 246 break; 247 case 0x00cc10de: /* Nvidia Quadro FX 1400 Go */ 248 si->ps.card_type = NV41; 249 si->ps.card_arch = NV40A; 250 si->ps.laptop = true; 251 sprintf(si->adi.name, "Nvidia Quadro FX 1400 Go"); 252 sprintf(si->adi.chipset, "NV41"); 253 status = nvxx_general_powerup(); 254 break; 255 case 0x00cd10de: /* Nvidia Quadro FX 3450/4000 SDI */ 256 si->ps.card_type = NV41; 257 si->ps.card_arch = NV40A; 258 sprintf(si->adi.name, "Nvidia Quadro FX 3450/4000 SDI"); 259 sprintf(si->adi.chipset, "NV41"); 260 status = nvxx_general_powerup(); 261 break; 262 case 0x00ce10de: /* Nvidia Quadro FX 1400 */ 263 si->ps.card_type = NV41; 264 si->ps.card_arch = NV40A; 265 sprintf(si->adi.name, "Nvidia Quadro FX 1400"); 266 sprintf(si->adi.chipset, "NV41"); 267 status = nvxx_general_powerup(); 268 break; 269 case 0x00f010de: /* Nvidia GeForce FX 6800 (Ultra) AGP(?) */ 270 si->ps.card_type = NV40; 271 si->ps.card_arch = NV40A; 272 sprintf(si->adi.name, "Nvidia GeForce FX 6800 AGP(?)"); 273 sprintf(si->adi.chipset, "NV40(?)"); 274 status = nvxx_general_powerup(); 275 break; 276 case 0x00f110de: /* Nvidia GeForce FX 6600 GT AGP */ 277 case 0x00f210de: /* Nvidia GeForce FX 6600 AGP */ 278 si->ps.card_type = NV43; 279 si->ps.card_arch = NV40A; 280 sprintf(si->adi.name, "Nvidia GeForce FX 6600 (GT) AGP"); 281 sprintf(si->adi.chipset, "NV43"); 282 status = nvxx_general_powerup(); 283 break; 284 case 0x00f310de: /* Nvidia GeForce 6200 */ 285 si->ps.card_type = NV44; 286 si->ps.card_arch = NV40A; 287 sprintf(si->adi.name, "Nvidia GeForce 6200"); 288 sprintf(si->adi.chipset, "NV44"); 289 status = nvxx_general_powerup(); 290 break; 291 case 0x00f510de: /* Nvidia GeForce FX 7800 GS AGP */ 292 si->ps.card_type = G70; 293 si->ps.card_arch = NV40A; 294 sprintf(si->adi.name, "Nvidia GeForce 7800 GS AGP"); 295 sprintf(si->adi.chipset, "G70"); 296 status = nvxx_general_powerup(); 297 break; 298 case 0x00f810de: /* Nvidia Quadro FX 3400/4400 PCIe */ 299 si->ps.card_type = NV45; 300 si->ps.card_arch = NV40A; 301 sprintf(si->adi.name, "Nvidia Quadro FX 3400 PCIe"); 302 sprintf(si->adi.chipset, "NV45"); 303 status = nvxx_general_powerup(); 304 break; 305 case 0x00f910de: /* Nvidia GeForce PCX 6800 PCIe */ 306 si->ps.card_type = NV45; 307 si->ps.card_arch = NV40A; 308 sprintf(si->adi.name, "Nvidia GeForce PCX 6800 PCIe"); 309 sprintf(si->adi.chipset, "NV45"); 310 status = nvxx_general_powerup(); 311 break; 312 case 0x00fa10de: /* Nvidia GeForce PCX 5750 PCIe */ 313 si->ps.card_type = NV36; 314 si->ps.card_arch = NV30A; 315 sprintf(si->adi.name, "Nvidia GeForce PCX 5750 PCIe"); 316 sprintf(si->adi.chipset, "NV36"); 317 status = nvxx_general_powerup(); 318 break; 319 case 0x00fb10de: /* Nvidia GeForce PCX 5900 PCIe */ 320 si->ps.card_type = NV35; 321 si->ps.card_arch = NV30A; 322 sprintf(si->adi.name, "Nvidia GeForce PCX 5900 PCIe"); 323 sprintf(si->adi.chipset, "NV35(?)"); 324 status = nvxx_general_powerup(); 325 break; 326 case 0x00fc10de: /* Nvidia GeForce PCX 5300 PCIe */ 327 si->ps.card_type = NV34; 328 si->ps.card_arch = NV30A; 329 sprintf(si->adi.name, "Nvidia GeForce PCX 5300 PCIe"); 330 sprintf(si->adi.chipset, "NV34"); 331 status = nvxx_general_powerup(); 332 break; 333 case 0x00fd10de: /* Nvidia Quadro PCX PCIe */ 334 si->ps.card_type = NV45; 335 si->ps.card_arch = NV40A; 336 sprintf(si->adi.name, "Nvidia Quadro PCX PCIe"); 337 sprintf(si->adi.chipset, "NV45"); 338 status = nvxx_general_powerup(); 339 break; 340 case 0x00fe10de: /* Nvidia Quadro FX 1300 PCIe(?) */ 341 si->ps.card_type = NV36; 342 si->ps.card_arch = NV30A; 343 sprintf(si->adi.name, "Nvidia Quadro FX 1300 PCIe(?)"); 344 sprintf(si->adi.chipset, "NV36(?)"); 345 status = nvxx_general_powerup(); 346 break; 347 case 0x00ff10de: /* Nvidia GeForce PCX 4300 PCIe */ 348 si->ps.card_type = NV18; 349 si->ps.card_arch = NV10A; 350 sprintf(si->adi.name, "Nvidia GeForce PCX 4300 PCIe"); 351 sprintf(si->adi.chipset, "NV18"); 352 status = nvxx_general_powerup(); 353 break; 354 case 0x010010de: /* Nvidia GeForce256 SDR */ 355 case 0x010110de: /* Nvidia GeForce256 DDR */ 356 case 0x010210de: /* Nvidia GeForce256 Ultra */ 357 si->ps.card_type = NV10; 358 si->ps.card_arch = NV10A; 359 sprintf(si->adi.name, "Nvidia GeForce256"); 360 sprintf(si->adi.chipset, "NV10"); 361 status = nvxx_general_powerup(); 362 break; 363 case 0x010310de: /* Nvidia Quadro */ 364 si->ps.card_type = NV10; 365 si->ps.card_arch = NV10A; 366 sprintf(si->adi.name, "Nvidia Quadro"); 367 sprintf(si->adi.chipset, "NV10"); 368 status = nvxx_general_powerup(); 369 break; 370 case 0x011010de: /* Nvidia GeForce2 MX/MX400 */ 371 case 0x011110de: /* Nvidia GeForce2 MX100/MX200 DDR */ 372 si->ps.card_type = NV11; 373 si->ps.card_arch = NV10A; 374 sprintf(si->adi.name, "Nvidia GeForce2 MX"); 375 sprintf(si->adi.chipset, "NV11"); 376 status = nvxx_general_powerup(); 377 break; 378 case 0x011210de: /* Nvidia GeForce2 Go */ 379 si->ps.card_type = NV11; 380 si->ps.card_arch = NV10A; 381 si->ps.laptop = true; 382 sprintf(si->adi.name, "Nvidia GeForce2 Go"); 383 sprintf(si->adi.chipset, "NV11"); 384 status = nvxx_general_powerup(); 385 break; 386 case 0x011310de: /* Nvidia Quadro2 MXR/EX/Go */ 387 si->ps.card_type = NV11; 388 si->ps.card_arch = NV10A; 389 sprintf(si->adi.name, "Nvidia Quadro2 MXR/EX/Go"); 390 sprintf(si->adi.chipset, "NV11"); 391 status = nvxx_general_powerup(); 392 break; 393 case 0x014010de: /* Nvidia GeForce FX 6600 GT */ 394 case 0x014110de: /* Nvidia GeForce FX 6600 */ 395 case 0x014210de: /* Nvidia GeForce FX 6600LE */ 396 si->ps.card_type = NV43; 397 si->ps.card_arch = NV40A; 398 sprintf(si->adi.name, "Nvidia GeForce FX 6600"); 399 sprintf(si->adi.chipset, "NV43"); 400 status = nvxx_general_powerup(); 401 break; 402 case 0x014310de: /* Nvidia unknown FX */ 403 si->ps.card_type = NV43; 404 si->ps.card_arch = NV40A; 405 sprintf(si->adi.name, "Nvidia unknown FX"); 406 sprintf(si->adi.chipset, "NV43"); 407 status = nvxx_general_powerup(); 408 break; 409 case 0x014410de: /* Nvidia GeForce FX 6600 Go */ 410 si->ps.card_type = NV43; 411 si->ps.card_arch = NV40A; 412 si->ps.laptop = true; 413 sprintf(si->adi.name, "Nvidia GeForce FX 6600 Go"); 414 sprintf(si->adi.chipset, "NV43"); 415 status = nvxx_general_powerup(); 416 break; 417 case 0x014510de: /* Nvidia GeForce FX 6610 XL */ 418 si->ps.card_type = NV43; 419 si->ps.card_arch = NV40A; 420 sprintf(si->adi.name, "Nvidia GeForce FX 6610 XL"); 421 sprintf(si->adi.chipset, "NV43"); 422 status = nvxx_general_powerup(); 423 break; 424 case 0x014710de: /* Nvidia GeForce FX 6700 XL */ 425 si->ps.card_type = NV43; 426 si->ps.card_arch = NV40A; 427 sprintf(si->adi.name, "Nvidia GeForce FX 6700 XL"); 428 sprintf(si->adi.chipset, "NV43"); 429 status = nvxx_general_powerup(); 430 break; 431 case 0x014610de: /* Nvidia GeForce FX 6600 TE Go / 6200 TE Go */ 432 case 0x014810de: /* Nvidia GeForce FX 6600 Go */ 433 case 0x014910de: /* Nvidia GeForce FX 6600 GT Go */ 434 si->ps.card_type = NV43; 435 si->ps.card_arch = NV40A; 436 si->ps.laptop = true; 437 sprintf(si->adi.name, "Nvidia GeForce FX 6600Go/6200Go"); 438 sprintf(si->adi.chipset, "NV43"); 439 status = nvxx_general_powerup(); 440 break; 441 case 0x014b10de: /* Nvidia unknown FX */ 442 case 0x014c10de: /* Nvidia unknown FX */ 443 case 0x014d10de: /* Nvidia unknown FX */ 444 si->ps.card_type = NV43; 445 si->ps.card_arch = NV40A; 446 sprintf(si->adi.name, "Nvidia unknown FX"); 447 sprintf(si->adi.chipset, "NV43"); 448 status = nvxx_general_powerup(); 449 break; 450 case 0x014e10de: /* Nvidia Quadro FX 540 */ 451 si->ps.card_type = NV43; 452 si->ps.card_arch = NV40A; 453 sprintf(si->adi.name, "Nvidia Quadro FX 540"); 454 sprintf(si->adi.chipset, "NV43"); 455 status = nvxx_general_powerup(); 456 break; 457 case 0x014f10de: /* Nvidia GeForce 6200 PCIe (128Mb) */ 458 si->ps.card_type = NV44; 459 si->ps.card_arch = NV40A; 460 sprintf(si->adi.name, "Nvidia GeForce 6200 PCIe 128Mb"); 461 sprintf(si->adi.chipset, "NV44"); 462 status = nvxx_general_powerup(); 463 break; 464 case 0x015010de: /* Nvidia GeForce2 GTS/Pro */ 465 case 0x015110de: /* Nvidia GeForce2 Ti DDR */ 466 case 0x015210de: /* Nvidia GeForce2 Ultra */ 467 si->ps.card_type = NV15; 468 si->ps.card_arch = NV10A; 469 sprintf(si->adi.name, "Nvidia GeForce2"); 470 sprintf(si->adi.chipset, "NV15"); 471 status = nvxx_general_powerup(); 472 break; 473 case 0x015310de: /* Nvidia Quadro2 Pro */ 474 si->ps.card_type = NV15; 475 si->ps.card_arch = NV10A; 476 sprintf(si->adi.name, "Nvidia Quadro2 Pro"); 477 sprintf(si->adi.chipset, "NV15"); 478 status = nvxx_general_powerup(); 479 break; 480 case 0x016010de: /* Nvidia GeForce 6500 Go */ 481 si->ps.card_type = NV44; 482 si->ps.card_arch = NV40A; 483 si->ps.laptop = true; 484 sprintf(si->adi.name, "Nvidia GeForce 6500 Go"); 485 sprintf(si->adi.chipset, "NV44"); 486 status = nvxx_general_powerup(); 487 break; 488 case 0x016110de: /* Nvidia GeForce 6200 TurboCache */ 489 si->ps.card_type = NV44; 490 si->ps.card_arch = NV40A; 491 sprintf(si->adi.name, "Nvidia GeForce 6200 TC"); 492 sprintf(si->adi.chipset, "NV44"); 493 status = nvxx_general_powerup(); 494 break; 495 case 0x016210de: /* Nvidia GeForce 6200SE TurboCache */ 496 si->ps.card_type = NV44; 497 si->ps.card_arch = NV40A; 498 sprintf(si->adi.name, "Nvidia GeForce 6200SE TC"); 499 sprintf(si->adi.chipset, "NV44"); 500 status = nvxx_general_powerup(); 501 break; 502 case 0x016310de: /* Nvidia GeForce 6200LE */ 503 si->ps.card_type = NV44; 504 si->ps.card_arch = NV40A; 505 sprintf(si->adi.name, "Nvidia GeForce 6200LE"); 506 sprintf(si->adi.chipset, "NV44"); 507 status = nvxx_general_powerup(); 508 break; 509 case 0x016410de: /* Nvidia GeForce FX 6200 Go */ 510 si->ps.card_type = NV44; 511 si->ps.card_arch = NV40A; 512 si->ps.laptop = true; 513 sprintf(si->adi.name, "Nvidia GeForce FX 6200 Go"); 514 sprintf(si->adi.chipset, "NV44"); 515 status = nvxx_general_powerup(); 516 break; 517 case 0x016510de: /* Nvidia Quadro FX NVS 285 */ 518 si->ps.card_type = NV44; 519 si->ps.card_arch = NV40A; 520 sprintf(si->adi.name, "Nvidia Quadro FX NVS 285"); 521 sprintf(si->adi.chipset, "NV44"); 522 status = nvxx_general_powerup(); 523 break; 524 case 0x016610de: /* Nvidia GeForce 6400 Go */ 525 si->ps.card_type = NV44; 526 si->ps.card_arch = NV40A; 527 si->ps.laptop = true; 528 sprintf(si->adi.name, "Nvidia GeForce 6400 Go"); 529 sprintf(si->adi.chipset, "NV44"); 530 status = nvxx_general_powerup(); 531 break; 532 case 0x016710de: /* Nvidia GeForce 6200 Go */ 533 si->ps.card_type = NV44; 534 si->ps.card_arch = NV40A; 535 si->ps.laptop = true; 536 sprintf(si->adi.name, "Nvidia GeForce 6200 Go"); 537 sprintf(si->adi.chipset, "NV44"); 538 status = nvxx_general_powerup(); 539 break; 540 case 0x016810de: /* Nvidia GeForce 6400 Go */ 541 si->ps.card_type = NV44; 542 si->ps.card_arch = NV40A; 543 si->ps.laptop = true; 544 sprintf(si->adi.name, "Nvidia GeForce 6400 Go"); 545 sprintf(si->adi.chipset, "NV44"); 546 status = nvxx_general_powerup(); 547 break; 548 case 0x016910de: /* Nvidia GeForce 6250 Go */ 549 si->ps.card_type = NV44; 550 si->ps.card_arch = NV40A; 551 si->ps.laptop = true; 552 sprintf(si->adi.name, "Nvidia GeForce 6250 Go"); 553 sprintf(si->adi.chipset, "NV44"); 554 status = nvxx_general_powerup(); 555 break; 556 case 0x016a10de: /* Nvidia 7100 GS */ 557 si->ps.card_type = NV44; 558 si->ps.card_arch = NV40A; 559 sprintf(si->adi.name, "Nvidia GeForce 7100 GS"); 560 sprintf(si->adi.chipset, "NV44"); 561 status = nvxx_general_powerup(); 562 break; 563 case 0x016b10de: /* Nvidia unknown FX Go */ 564 case 0x016c10de: /* Nvidia unknown FX Go */ 565 case 0x016d10de: /* Nvidia unknown FX Go */ 566 si->ps.card_type = NV44; 567 si->ps.card_arch = NV40A; 568 si->ps.laptop = true; 569 sprintf(si->adi.name, "Nvidia unknown FX Go"); 570 sprintf(si->adi.chipset, "NV44"); 571 status = nvxx_general_powerup(); 572 break; 573 case 0x016e10de: /* Nvidia unknown FX */ 574 si->ps.card_type = NV44; 575 si->ps.card_arch = NV40A; 576 sprintf(si->adi.name, "Nvidia unknown FX"); 577 sprintf(si->adi.chipset, "NV44"); 578 status = nvxx_general_powerup(); 579 break; 580 case 0x017010de: /* Nvidia GeForce4 MX 460 */ 581 case 0x017110de: /* Nvidia GeForce4 MX 440 */ 582 case 0x017210de: /* Nvidia GeForce4 MX 420 */ 583 case 0x017310de: /* Nvidia GeForce4 MX 440SE */ 584 si->ps.card_type = NV17; 585 si->ps.card_arch = NV10A; 586 sprintf(si->adi.name, "Nvidia GeForce4 MX"); 587 sprintf(si->adi.chipset, "NV17"); 588 status = nvxx_general_powerup(); 589 break; 590 case 0x017410de: /* Nvidia GeForce4 440 Go */ 591 case 0x017510de: /* Nvidia GeForce4 420 Go */ 592 case 0x017610de: /* Nvidia GeForce4 420 Go 32M */ 593 case 0x017710de: /* Nvidia GeForce4 460 Go */ 594 case 0x017910de: /* Nvidia GeForce4 440 Go 64M (on PPC GeForce4 MX) */ 595 si->ps.card_type = NV17; 596 si->ps.card_arch = NV10A; 597 si->ps.laptop = true; 598 sprintf(si->adi.name, "Nvidia GeForce4 Go"); 599 sprintf(si->adi.chipset, "NV17"); 600 status = nvxx_general_powerup(); 601 break; 602 case 0x017810de: /* Nvidia Quadro4 500 XGL/550 XGL */ 603 case 0x017a10de: /* Nvidia Quadro4 200 NVS/400 NVS */ 604 si->ps.card_type = NV17; 605 si->ps.card_arch = NV10A; 606 sprintf(si->adi.name, "Nvidia Quadro4"); 607 sprintf(si->adi.chipset, "NV17"); 608 status = nvxx_general_powerup(); 609 break; 610 case 0x017c10de: /* Nvidia Quadro4 500 GoGL */ 611 si->ps.card_type = NV17; 612 si->ps.card_arch = NV10A; 613 si->ps.laptop = true; 614 sprintf(si->adi.name, "Nvidia Quadro4 500 GoGL"); 615 sprintf(si->adi.chipset, "NV17"); 616 status = nvxx_general_powerup(); 617 break; 618 case 0x017d10de: /* Nvidia GeForce4 410 Go 16M*/ 619 si->ps.card_type = NV17; 620 si->ps.card_arch = NV10A; 621 si->ps.laptop = true; 622 sprintf(si->adi.name, "Nvidia GeForce4 410 Go"); 623 sprintf(si->adi.chipset, "NV17"); 624 status = nvxx_general_powerup(); 625 break; 626 case 0x018110de: /* Nvidia GeForce4 MX 440 AGP8X */ 627 case 0x018210de: /* Nvidia GeForce4 MX 440SE AGP8X */ 628 case 0x018310de: /* Nvidia GeForce4 MX 420 AGP8X */ 629 case 0x018510de: /* Nvidia GeForce4 MX 4000 AGP8X */ 630 si->ps.card_type = NV18; 631 si->ps.card_arch = NV10A; 632 sprintf(si->adi.name, "Nvidia GeForce4 MX AGP8X"); 633 sprintf(si->adi.chipset, "NV18"); 634 status = nvxx_general_powerup(); 635 break; 636 case 0x018610de: /* Nvidia GeForce4 448 Go */ 637 case 0x018710de: /* Nvidia GeForce4 488 Go */ 638 si->ps.card_type = NV18; 639 si->ps.card_arch = NV10A; 640 si->ps.laptop = true; 641 sprintf(si->adi.name, "Nvidia GeForce4 Go"); 642 sprintf(si->adi.chipset, "NV18"); 643 status = nvxx_general_powerup(); 644 break; 645 case 0x018810de: /* Nvidia Quadro4 580 XGL */ 646 si->ps.card_type = NV18; 647 si->ps.card_arch = NV10A; 648 sprintf(si->adi.name, "Nvidia Quadro4"); 649 sprintf(si->adi.chipset, "NV18"); 650 status = nvxx_general_powerup(); 651 break; 652 case 0x018910de: /* Nvidia GeForce4 MX AGP8X (PPC) */ 653 si->ps.card_type = NV18; 654 si->ps.card_arch = NV10A; 655 sprintf(si->adi.name, "Nvidia GeForce4 MX AGP8X"); 656 sprintf(si->adi.chipset, "NV18"); 657 status = nvxx_general_powerup(); 658 break; 659 case 0x018a10de: /* Nvidia Quadro4 280 NVS AGP8X */ 660 case 0x018b10de: /* Nvidia Quadro4 380 XGL */ 661 case 0x018c10de: /* Nvidia Quadro4 NVS 50 PCI */ 662 si->ps.card_type = NV18; 663 si->ps.card_arch = NV10A; 664 sprintf(si->adi.name, "Nvidia Quadro4"); 665 sprintf(si->adi.chipset, "NV18"); 666 status = nvxx_general_powerup(); 667 break; 668 case 0x018d10de: /* Nvidia GeForce4 448 Go */ 669 si->ps.card_type = NV18; 670 si->ps.card_arch = NV10A; 671 si->ps.laptop = true; 672 sprintf(si->adi.name, "Nvidia GeForce4 Go"); 673 sprintf(si->adi.chipset, "NV18"); 674 status = nvxx_general_powerup(); 675 break; 676 case 0x01a010de: /* Nvidia GeForce2 Integrated GPU */ 677 si->ps.card_type = NV11; 678 si->ps.card_arch = NV10A; 679 sprintf(si->adi.name, "Nvidia GeForce2 Integrated GPU"); 680 sprintf(si->adi.chipset, "CRUSH, NV11"); 681 status = nvxx_general_powerup(); 682 break; 683 case 0x01d110de: /* Nvidia GeForce 7300 LE */ 684 case 0x01df10de: /* Nvidia GeForce 7300 GS */ 685 si->ps.card_type = G72; 686 si->ps.card_arch = NV40A; 687 sprintf(si->adi.name, "Nvidia GeForce 7300"); 688 sprintf(si->adi.chipset, "G72"); 689 status = nvxx_general_powerup(); 690 break; 691 case 0x01d810de: /* Nvidia GeForce 7400 GO */ 692 si->ps.card_type = G72; 693 si->ps.card_arch = NV40A; 694 sprintf(si->adi.name, "Nvidia GeForce 7400 Go"); 695 sprintf(si->adi.chipset, "G72"); 696 status = nvxx_general_powerup(); 697 break; 698 case 0x01f010de: /* Nvidia GeForce4 MX Integrated GPU */ 699 si->ps.card_type = NV17; 700 si->ps.card_arch = NV10A; 701 sprintf(si->adi.name, "Nvidia GeForce4 MX Integr. GPU"); 702 sprintf(si->adi.chipset, "NFORCE2, NV17"); 703 status = nvxx_general_powerup(); 704 break; 705 case 0x020010de: /* Nvidia GeForce3 */ 706 case 0x020110de: /* Nvidia GeForce3 Ti 200 */ 707 case 0x020210de: /* Nvidia GeForce3 Ti 500 */ 708 si->ps.card_type = NV20; 709 si->ps.card_arch = NV20A; 710 sprintf(si->adi.name, "Nvidia GeForce3"); 711 sprintf(si->adi.chipset, "NV20"); 712 status = nvxx_general_powerup(); 713 break; 714 case 0x020310de: /* Nvidia Quadro DCC */ 715 si->ps.card_type = NV20; 716 si->ps.card_arch = NV20A; 717 sprintf(si->adi.name, "Nvidia Quadro DCC"); 718 sprintf(si->adi.chipset, "NV20"); 719 status = nvxx_general_powerup(); 720 break; 721 case 0x021110de: /* Nvidia GeForce FX 6800 */ 722 case 0x021210de: /* Nvidia GeForce FX 6800LE */ 723 case 0x021510de: /* Nvidia GeForce FX 6800 GT */ 724 si->ps.card_type = NV45; /* NV48 is NV45 with 512Mb */ 725 si->ps.card_arch = NV40A; 726 sprintf(si->adi.name, "Nvidia GeForce FX 6800"); 727 sprintf(si->adi.chipset, "NV48"); 728 status = nvxx_general_powerup(); 729 break; 730 case 0x022010de: /* Nvidia unknown FX */ 731 si->ps.card_type = NV44; 732 si->ps.card_arch = NV40A; 733 sprintf(si->adi.name, "Nvidia unknown FX"); 734 sprintf(si->adi.chipset, "NV44"); 735 status = nvxx_general_powerup(); 736 break; 737 case 0x022110de: /* Nvidia GeForce 6200 AGP (256Mb - 128bit) */ 738 si->ps.card_type = NV44; 739 si->ps.card_arch = NV40A; 740 sprintf(si->adi.name, "Nvidia GeForce 6200 AGP 256Mb"); 741 sprintf(si->adi.chipset, "NV44"); 742 status = nvxx_general_powerup(); 743 break; 744 case 0x022210de: /* Nvidia unknown FX */ 745 si->ps.card_type = NV44; 746 si->ps.card_arch = NV40A; 747 sprintf(si->adi.name, "Nvidia unknown FX"); 748 sprintf(si->adi.chipset, "NV44"); 749 status = nvxx_general_powerup(); 750 break; 751 case 0x022810de: /* Nvidia unknown FX Go */ 752 si->ps.card_type = NV44; 753 si->ps.card_arch = NV40A; 754 si->ps.laptop = true; 755 sprintf(si->adi.name, "Nvidia unknown FX Go"); 756 sprintf(si->adi.chipset, "NV44"); 757 status = nvxx_general_powerup(); 758 break; 759 case 0x024010de: /* Nvidia GeForce 6150 (NFORCE4 Integr.GPU) */ 760 case 0x024110de: /* Nvidia GeForce 6150 LE (NFORCE4 Integr.GPU) */ 761 si->ps.card_type = NV44; 762 si->ps.card_arch = NV40A; 763 sprintf(si->adi.name, "Nvidia GeForce 6150"); 764 sprintf(si->adi.chipset, "NV44"); 765 status = nvxx_general_powerup(); 766 break; 767 case 0x024210de: /* Nvidia GeForce 6100 (NFORCE4 Integr.GPU) */ 768 si->ps.card_type = NV44; 769 si->ps.card_arch = NV40A; 770 sprintf(si->adi.name, "Nvidia GeForce 6100"); 771 sprintf(si->adi.chipset, "NV44"); 772 status = nvxx_general_powerup(); 773 break; 774 case 0x025010de: /* Nvidia GeForce4 Ti 4600 */ 775 case 0x025110de: /* Nvidia GeForce4 Ti 4400 */ 776 case 0x025210de: /* Nvidia GeForce4 Ti 4600 */ 777 case 0x025310de: /* Nvidia GeForce4 Ti 4200 */ 778 si->ps.card_type = NV25; 779 si->ps.card_arch = NV20A; 780 sprintf(si->adi.name, "Nvidia GeForce4 Ti"); 781 sprintf(si->adi.chipset, "NV25"); 782 status = nvxx_general_powerup(); 783 break; 784 case 0x025810de: /* Nvidia Quadro4 900 XGL */ 785 case 0x025910de: /* Nvidia Quadro4 750 XGL */ 786 case 0x025b10de: /* Nvidia Quadro4 700 XGL */ 787 si->ps.card_type = NV25; 788 si->ps.card_arch = NV20A; 789 sprintf(si->adi.name, "Nvidia Quadro4 XGL"); 790 sprintf(si->adi.chipset, "NV25"); 791 status = nvxx_general_powerup(); 792 break; 793 case 0x028010de: /* Nvidia GeForce4 Ti 4800 AGP8X */ 794 case 0x028110de: /* Nvidia GeForce4 Ti 4200 AGP8X */ 795 si->ps.card_type = NV28; 796 si->ps.card_arch = NV20A; 797 sprintf(si->adi.name, "Nvidia GeForce4 Ti AGP8X"); 798 sprintf(si->adi.chipset, "NV28"); 799 status = nvxx_general_powerup(); 800 break; 801 case 0x028210de: /* Nvidia GeForce4 Ti 4800SE */ 802 si->ps.card_type = NV28; 803 si->ps.card_arch = NV20A; 804 sprintf(si->adi.name, "Nvidia GeForce4 Ti 4800SE"); 805 sprintf(si->adi.chipset, "NV28"); 806 status = nvxx_general_powerup(); 807 break; 808 case 0x028610de: /* Nvidia GeForce4 4200 Go */ 809 si->ps.card_type = NV28; 810 si->ps.card_arch = NV20A; 811 si->ps.laptop = true; 812 sprintf(si->adi.name, "Nvidia GeForce4 4200 Go"); 813 sprintf(si->adi.chipset, "NV28"); 814 status = nvxx_general_powerup(); 815 break; 816 case 0x028810de: /* Nvidia Quadro4 980 XGL */ 817 case 0x028910de: /* Nvidia Quadro4 780 XGL */ 818 si->ps.card_type = NV28; 819 si->ps.card_arch = NV20A; 820 sprintf(si->adi.name, "Nvidia Quadro4 XGL"); 821 sprintf(si->adi.chipset, "NV28"); 822 status = nvxx_general_powerup(); 823 break; 824 case 0x028c10de: /* Nvidia Quadro4 700 GoGL */ 825 si->ps.card_type = NV28; 826 si->ps.card_arch = NV20A; 827 si->ps.laptop = true; 828 sprintf(si->adi.name, "Nvidia Quadro4 700 GoGL"); 829 sprintf(si->adi.chipset, "NV28"); 830 status = nvxx_general_powerup(); 831 break; 832 case 0x029010de: /* Nvidia GeForce 7900 GTX */ 833 case 0x029110de: /* Nvidia GeForce 7900 GT */ 834 si->ps.card_type = G71; 835 si->ps.card_arch = NV40A; 836 sprintf(si->adi.name, "Nvidia GeForce 7900 GT(X)"); 837 sprintf(si->adi.chipset, "G71"); 838 status = nvxx_general_powerup(); 839 break; 840 case 0x02a010de: /* Nvidia GeForce3 Integrated GPU */ 841 si->ps.card_type = NV20; 842 si->ps.card_arch = NV20A; 843 sprintf(si->adi.name, "Nvidia GeForce3 Integrated GPU"); 844 sprintf(si->adi.chipset, "XBOX, NV20"); 845 status = nvxx_general_powerup(); 846 break; 847 case 0x02e110de: 848 si->ps.card_type = G73; 849 si->ps.card_arch = NV40A; 850 sprintf(si->adi.name, "Nvidia GeForce 7600 GS"); 851 sprintf(si->adi.chipset, "G73"); 852 status = nvxx_general_powerup(); 853 break; 854 case 0x030110de: /* Nvidia GeForce FX 5800 Ultra */ 855 case 0x030210de: /* Nvidia GeForce FX 5800 */ 856 si->ps.card_type = NV30; 857 si->ps.card_arch = NV30A; 858 sprintf(si->adi.name, "Nvidia GeForce FX 5800"); 859 sprintf(si->adi.chipset, "NV30"); 860 status = nvxx_general_powerup(); 861 break; 862 case 0x030810de: /* Nvidia Quadro FX 2000 */ 863 case 0x030910de: /* Nvidia Quadro FX 1000 */ 864 si->ps.card_type = NV30; 865 si->ps.card_arch = NV30A; 866 sprintf(si->adi.name, "Nvidia Quadro FX"); 867 sprintf(si->adi.chipset, "NV30"); 868 status = nvxx_general_powerup(); 869 break; 870 case 0x031110de: /* Nvidia GeForce FX 5600 Ultra */ 871 case 0x031210de: /* Nvidia GeForce FX 5600 */ 872 si->ps.card_type = NV31; 873 si->ps.card_arch = NV30A; 874 sprintf(si->adi.name, "Nvidia GeForce FX 5600"); 875 sprintf(si->adi.chipset, "NV31"); 876 status = nvxx_general_powerup(); 877 break; 878 case 0x031310de: /* Nvidia unknown FX */ 879 si->ps.card_type = NV31; 880 si->ps.card_arch = NV30A; 881 sprintf(si->adi.name, "Nvidia unknown FX"); 882 sprintf(si->adi.chipset, "NV31"); 883 status = nvxx_general_powerup(); 884 break; 885 case 0x031410de: /* Nvidia GeForce FX 5600XT */ 886 si->ps.card_type = NV31; 887 si->ps.card_arch = NV30A; 888 sprintf(si->adi.name, "Nvidia GeForce FX 5600XT"); 889 sprintf(si->adi.chipset, "NV31"); 890 status = nvxx_general_powerup(); 891 break; 892 case 0x031610de: /* Nvidia unknown FX Go */ 893 case 0x031710de: /* Nvidia unknown FX Go */ 894 si->ps.card_type = NV31; 895 si->ps.card_arch = NV30A; 896 si->ps.laptop = true; 897 sprintf(si->adi.name, "Nvidia unknown FX Go"); 898 sprintf(si->adi.chipset, "NV31"); 899 status = nvxx_general_powerup(); 900 break; 901 case 0x031a10de: /* Nvidia GeForce FX 5600 Go */ 902 si->ps.card_type = NV31; 903 si->ps.card_arch = NV30A; 904 si->ps.laptop = true; 905 sprintf(si->adi.name, "Nvidia GeForce FX 5600 Go"); 906 sprintf(si->adi.chipset, "NV31"); 907 status = nvxx_general_powerup(); 908 break; 909 case 0x031b10de: /* Nvidia GeForce FX 5650 Go */ 910 si->ps.card_type = NV31; 911 si->ps.card_arch = NV30A; 912 si->ps.laptop = true; 913 sprintf(si->adi.name, "Nvidia GeForce FX 5650 Go"); 914 sprintf(si->adi.chipset, "NV31"); 915 status = nvxx_general_powerup(); 916 break; 917 case 0x031c10de: /* Nvidia Quadro FX 700 Go */ 918 si->ps.card_type = NV31; 919 si->ps.card_arch = NV30A; 920 si->ps.laptop = true; 921 sprintf(si->adi.name, "Nvidia Quadro FX 700 Go"); 922 sprintf(si->adi.chipset, "NV31"); 923 status = nvxx_general_powerup(); 924 break; 925 case 0x031d10de: /* Nvidia unknown FX Go */ 926 case 0x031e10de: /* Nvidia unknown FX Go */ 927 case 0x031f10de: /* Nvidia unknown FX Go */ 928 si->ps.card_type = NV31; 929 si->ps.card_arch = NV30A; 930 si->ps.laptop = true; 931 sprintf(si->adi.name, "Nvidia unknown FX Go"); 932 sprintf(si->adi.chipset, "NV31"); 933 status = nvxx_general_powerup(); 934 break; 935 case 0x032010de: /* Nvidia GeForce FX 5200 */ 936 case 0x032110de: /* Nvidia GeForce FX 5200 Ultra */ 937 case 0x032210de: /* Nvidia GeForce FX 5200 */ 938 case 0x032310de: /* Nvidia GeForce FX 5200LE */ 939 si->ps.card_type = NV34; 940 si->ps.card_arch = NV30A; 941 sprintf(si->adi.name, "Nvidia GeForce FX 5200"); 942 sprintf(si->adi.chipset, "NV34"); 943 status = nvxx_general_powerup(); 944 break; 945 case 0x032410de: /* Nvidia GeForce FX 5200 Go */ 946 si->ps.card_type = NV34; 947 si->ps.card_arch = NV30A; 948 si->ps.laptop = true; 949 sprintf(si->adi.name, "Nvidia GeForce FX 5200 Go"); 950 sprintf(si->adi.chipset, "NV34"); 951 status = nvxx_general_powerup(); 952 break; 953 case 0x032510de: /* Nvidia GeForce FX 5250 Go */ 954 si->ps.card_type = NV34; 955 si->ps.card_arch = NV30A; 956 si->ps.laptop = true; 957 sprintf(si->adi.name, "Nvidia GeForce FX 5250 Go"); 958 sprintf(si->adi.chipset, "NV34"); 959 status = nvxx_general_powerup(); 960 break; 961 case 0x032610de: /* Nvidia GeForce FX 5500 */ 962 si->ps.card_type = NV34; 963 si->ps.card_arch = NV30A; 964 sprintf(si->adi.name, "Nvidia GeForce FX 5500"); 965 sprintf(si->adi.chipset, "NV34"); 966 status = nvxx_general_powerup(); 967 break; 968 case 0x032710de: /* Nvidia GeForce FX 5100 */ 969 si->ps.card_type = NV34; 970 si->ps.card_arch = NV30A; 971 sprintf(si->adi.name, "Nvidia GeForce FX 5100"); 972 sprintf(si->adi.chipset, "NV34"); 973 status = nvxx_general_powerup(); 974 break; 975 case 0x032810de: /* Nvidia GeForce FX 5200 Go 32M/64M */ 976 si->ps.card_type = NV34; 977 si->ps.card_arch = NV30A; 978 si->ps.laptop = true; 979 sprintf(si->adi.name, "Nvidia GeForce FX 5200 Go"); 980 sprintf(si->adi.chipset, "NV34"); 981 status = nvxx_general_powerup(); 982 break; 983 case 0x032910de: /* Nvidia GeForce FX 5200 (PPC) */ 984 si->ps.card_type = NV34; 985 si->ps.card_arch = NV30A; 986 sprintf(si->adi.name, "Nvidia GeForce FX 5200"); 987 sprintf(si->adi.chipset, "NV34"); 988 status = nvxx_general_powerup(); 989 break; 990 case 0x032a10de: /* Nvidia Quadro NVS 280 PCI */ 991 si->ps.card_type = NV34; 992 si->ps.card_arch = NV30A; 993 sprintf(si->adi.name, "Nvidia Quadro NVS 280 PCI"); 994 sprintf(si->adi.chipset, "NV34"); 995 status = nvxx_general_powerup(); 996 break; 997 case 0x032b10de: /* Nvidia Quadro FX 500/600 PCI */ 998 si->ps.card_type = NV34; 999 si->ps.card_arch = NV30A; 1000 sprintf(si->adi.name, "Nvidia Quadro FX 500/600 PCI"); 1001 sprintf(si->adi.chipset, "NV34"); 1002 status = nvxx_general_powerup(); 1003 break; 1004 case 0x032c10de: /* Nvidia GeForce FX 5300 Go */ 1005 case 0x032d10de: /* Nvidia GeForce FX 5100 Go */ 1006 si->ps.card_type = NV34; 1007 si->ps.card_arch = NV30A; 1008 si->ps.laptop = true; 1009 sprintf(si->adi.name, "Nvidia GeForce FX Go"); 1010 sprintf(si->adi.chipset, "NV34"); 1011 status = nvxx_general_powerup(); 1012 break; 1013 case 0x032e10de: /* Nvidia unknown FX Go */ 1014 case 0x032f10de: /* Nvidia unknown FX Go */ 1015 si->ps.card_type = NV34; 1016 si->ps.card_arch = NV30A; 1017 si->ps.laptop = true; 1018 sprintf(si->adi.name, "Nvidia unknown FX Go"); 1019 sprintf(si->adi.chipset, "NV34"); 1020 status = nvxx_general_powerup(); 1021 break; 1022 case 0x033010de: /* Nvidia GeForce FX 5900 Ultra */ 1023 case 0x033110de: /* Nvidia GeForce FX 5900 */ 1024 si->ps.card_type = NV35; 1025 si->ps.card_arch = NV30A; 1026 sprintf(si->adi.name, "Nvidia GeForce FX 5900"); 1027 sprintf(si->adi.chipset, "NV35"); 1028 status = nvxx_general_powerup(); 1029 break; 1030 case 0x033210de: /* Nvidia GeForce FX 5900 XT */ 1031 si->ps.card_type = NV35; 1032 si->ps.card_arch = NV30A; 1033 sprintf(si->adi.name, "Nvidia GeForce FX 5900 XT"); 1034 sprintf(si->adi.chipset, "NV35"); 1035 status = nvxx_general_powerup(); 1036 break; 1037 case 0x033310de: /* Nvidia GeForce FX 5950 Ultra */ 1038 si->ps.card_type = NV38; 1039 si->ps.card_arch = NV30A; 1040 sprintf(si->adi.name, "Nvidia GeForce FX 5950 Ultra"); 1041 sprintf(si->adi.chipset, "NV38"); 1042 status = nvxx_general_powerup(); 1043 break; 1044 case 0x033410de: /* Nvidia GeForce FX 5900 ZT */ 1045 si->ps.card_type = NV38; 1046 si->ps.card_arch = NV30A; 1047 sprintf(si->adi.name, "Nvidia GeForce FX 5900 ZT"); 1048 sprintf(si->adi.chipset, "NV38(?)"); 1049 status = nvxx_general_powerup(); 1050 break; 1051 case 0x033810de: /* Nvidia Quadro FX 3000 */ 1052 si->ps.card_type = NV35; 1053 si->ps.card_arch = NV30A; 1054 sprintf(si->adi.name, "Nvidia Quadro FX 3000"); 1055 sprintf(si->adi.chipset, "NV35"); 1056 status = nvxx_general_powerup(); 1057 break; 1058 case 0x033f10de: /* Nvidia Quadro FX 700 */ 1059 si->ps.card_type = NV35; 1060 si->ps.card_arch = NV30A; 1061 sprintf(si->adi.name, "Nvidia Quadro FX 700"); 1062 sprintf(si->adi.chipset, "NV35"); 1063 status = nvxx_general_powerup(); 1064 break; 1065 case 0x034110de: /* Nvidia GeForce FX 5700 Ultra */ 1066 case 0x034210de: /* Nvidia GeForce FX 5700 */ 1067 case 0x034310de: /* Nvidia GeForce FX 5700LE */ 1068 case 0x034410de: /* Nvidia GeForce FX 5700VE */ 1069 si->ps.card_type = NV36; 1070 si->ps.card_arch = NV30A; 1071 sprintf(si->adi.name, "Nvidia GeForce FX 5700"); 1072 sprintf(si->adi.chipset, "NV36"); 1073 status = nvxx_general_powerup(); 1074 break; 1075 case 0x034510de: /* Nvidia unknown FX */ 1076 si->ps.card_type = NV36; 1077 si->ps.card_arch = NV30A; 1078 sprintf(si->adi.name, "Nvidia unknown FX"); 1079 sprintf(si->adi.chipset, "NV36"); 1080 status = nvxx_general_powerup(); 1081 break; 1082 case 0x034710de: /* Nvidia GeForce FX 5700 Go */ 1083 case 0x034810de: /* Nvidia GeForce FX 5700 Go */ 1084 si->ps.card_type = NV36; 1085 si->ps.card_arch = NV30A; 1086 si->ps.laptop = true; 1087 sprintf(si->adi.name, "Nvidia GeForce FX 5700 Go"); 1088 sprintf(si->adi.chipset, "NV36"); 1089 status = nvxx_general_powerup(); 1090 break; 1091 case 0x034910de: /* Nvidia unknown FX Go */ 1092 case 0x034b10de: /* Nvidia unknown FX Go */ 1093 si->ps.card_type = NV36; 1094 si->ps.card_arch = NV30A; 1095 si->ps.laptop = true; 1096 sprintf(si->adi.name, "Nvidia unknown FX Go"); 1097 sprintf(si->adi.chipset, "NV36"); 1098 status = nvxx_general_powerup(); 1099 break; 1100 case 0x034c10de: /* Nvidia Quadro FX 1000 Go */ 1101 si->ps.card_type = NV36; 1102 si->ps.card_arch = NV30A; 1103 si->ps.laptop = true; 1104 sprintf(si->adi.name, "Nvidia Quadro FX 1000 Go"); 1105 sprintf(si->adi.chipset, "NV36"); 1106 status = nvxx_general_powerup(); 1107 break; 1108 case 0x034e10de: /* Nvidia Quadro FX 1100 */ 1109 si->ps.card_type = NV36; 1110 si->ps.card_arch = NV30A; 1111 sprintf(si->adi.name, "Nvidia Quadro FX 1100"); 1112 sprintf(si->adi.chipset, "NV36"); 1113 status = nvxx_general_powerup(); 1114 break; 1115 case 0x034f10de: /* Nvidia unknown FX */ 1116 si->ps.card_type = NV36; 1117 si->ps.card_arch = NV30A; 1118 sprintf(si->adi.name, "Nvidia unknown FX"); 1119 sprintf(si->adi.chipset, "NV36(?)"); 1120 status = nvxx_general_powerup(); 1121 break; 1122 case 0x039110de: /* Nvidia GeForce 7600 GT */ 1123 si->ps.card_type = G73; 1124 si->ps.card_arch = NV40A; 1125 sprintf(si->adi.name, "Nvidia GeForce 7600 GT"); 1126 sprintf(si->adi.chipset, "G73"); 1127 status = nvxx_general_powerup(); 1128 break; 1129 case 0x039210de: /* Nvidia GeForce 7600 GS */ 1130 si->ps.card_type = G73; 1131 si->ps.card_arch = NV40A; 1132 sprintf(si->adi.name, "Nvidia GeForce 7600 GS"); 1133 sprintf(si->adi.chipset, "G73"); 1134 status = nvxx_general_powerup(); 1135 break; 1136 case 0x039310de: /* Nvidia GeForce 7300 GT */ 1137 si->ps.card_type = G73; 1138 si->ps.card_arch = NV40A; 1139 sprintf(si->adi.name, "Nvidia GeForce 7300 GT"); 1140 sprintf(si->adi.chipset, "G73"); 1141 status = nvxx_general_powerup(); 1142 break; 1143 case 0x039810de: /* Nvidia GeForce 7600 GO */ 1144 si->ps.card_type = G73; 1145 si->ps.card_arch = NV40A; 1146 si->ps.laptop = true; 1147 sprintf(si->adi.name, "Nvidia GeForce 7600 GO"); 1148 sprintf(si->adi.chipset, "G73"); 1149 status = nvxx_general_powerup(); 1150 break; 1151 case 0x03d110de: /* Nvidia GeForce 6100 nForce 405 */ 1152 si->ps.card_type = NV44; 1153 si->ps.card_arch = NV40A; 1154 sprintf(si->adi.name, "Nvidia GeForce 6100"); 1155 sprintf(si->adi.chipset, "NV44"); 1156 status = nvxx_general_powerup(); 1157 break; 1158 /* Vendor Elsa GmbH */ 1159 case 0x0c601048: /* Elsa Gladiac Geforce2 MX */ 1160 si->ps.card_type = NV11; 1161 si->ps.card_arch = NV10A; 1162 sprintf(si->adi.name, "Elsa Gladiac Geforce2 MX"); 1163 sprintf(si->adi.chipset, "NV11"); 1164 status = nvxx_general_powerup(); 1165 break; 1166 /* Vendor Nvidia STB/SGS-Thompson */ 1167 case 0x002012d2: /* Nvidia STB/SGS-Thompson TNT1 */ 1168 si->ps.card_type = NV04; 1169 si->ps.card_arch = NV04A; 1170 sprintf(si->adi.name, "Nvidia STB/SGS-Thompson TNT1"); 1171 sprintf(si->adi.chipset, "NV04"); 1172 status = nvxx_general_powerup(); 1173 break; 1174 case 0x002812d2: /* Nvidia STB/SGS-Thompson TNT2 (pro) */ 1175 case 0x002912d2: /* Nvidia STB/SGS-Thompson TNT2 Ultra */ 1176 case 0x002a12d2: /* Nvidia STB/SGS-Thompson TNT2 */ 1177 case 0x002b12d2: /* Nvidia STB/SGS-Thompson TNT2 */ 1178 si->ps.card_type = NV05; 1179 si->ps.card_arch = NV04A; 1180 sprintf(si->adi.name, "Nvidia STB/SGS-Thompson TNT2"); 1181 sprintf(si->adi.chipset, "NV05"); 1182 status = nvxx_general_powerup(); 1183 break; 1184 case 0x002c12d2: /* Nvidia STB/SGS-Thompson Vanta (Lt) */ 1185 si->ps.card_type = NV05; 1186 si->ps.card_arch = NV04A; 1187 sprintf(si->adi.name, "Nvidia STB/SGS-Thompson Vanta"); 1188 sprintf(si->adi.chipset, "NV05"); 1189 status = nvxx_general_powerup(); 1190 break; 1191 case 0x002d12d2: /* Nvidia STB/SGS-Thompson TNT2-M64 (Pro) */ 1192 si->ps.card_type = NV05M64; 1193 si->ps.card_arch = NV04A; 1194 sprintf(si->adi.name, "Nvidia STB/SGS-Thompson TNT2M64"); 1195 sprintf(si->adi.chipset, "NV05 model 64"); 1196 status = nvxx_general_powerup(); 1197 break; 1198 case 0x002e12d2: /* Nvidia STB/SGS-Thompson NV06 Vanta */ 1199 case 0x002f12d2: /* Nvidia STB/SGS-Thompson NV06 Vanta */ 1200 si->ps.card_type = NV06; 1201 si->ps.card_arch = NV04A; 1202 sprintf(si->adi.name, "Nvidia STB/SGS-Thompson Vanta"); 1203 sprintf(si->adi.chipset, "NV06"); 1204 status = nvxx_general_powerup(); 1205 break; 1206 case 0x00a012d2: /* Nvidia STB/SGS-Thompson Aladdin TNT2 */ 1207 si->ps.card_type = NV05; 1208 si->ps.card_arch = NV04A; 1209 sprintf(si->adi.name, "Nvidia STB/SGS-Thompson TNT2"); 1210 sprintf(si->adi.chipset, "NV05"); 1211 status = nvxx_general_powerup(); 1212 break; 1213 /* Vendor Varisys Limited */ 1214 case 0x35031888: /* Varisys GeForce4 MX440 */ 1215 si->ps.card_type = NV17; 1216 si->ps.card_arch = NV10A; 1217 sprintf(si->adi.name, "Varisys GeForce4 MX440"); 1218 sprintf(si->adi.chipset, "NV17"); 1219 status = nvxx_general_powerup(); 1220 break; 1221 case 0x35051888: /* Varisys GeForce4 Ti 4200 */ 1222 si->ps.card_type = NV25; 1223 si->ps.card_arch = NV20A; 1224 sprintf(si->adi.name, "Varisys GeForce4 Ti 4200"); 1225 sprintf(si->adi.chipset, "NV25"); 1226 status = nvxx_general_powerup(); 1227 break; 1228 default: 1229 LOG(8,("POWERUP: Failed to detect valid card 0x%08x\n",CFGR(DEVID))); 1230 return B_ERROR; 1231 } 1232 1233 return status; 1234 } 1235 1236 static status_t test_ram() 1237 { 1238 uint32 value, offset; 1239 status_t result = B_OK; 1240 1241 /* make sure we don't corrupt the hardware cursor by using fbc.frame_buffer. */ 1242 if (si->fbc.frame_buffer == NULL) 1243 { 1244 LOG(8,("INIT: test_ram detected NULL pointer.\n")); 1245 return B_ERROR; 1246 } 1247 1248 for (offset = 0, value = 0x55aa55aa; offset < 256; offset++) 1249 { 1250 /* write testpattern to cardRAM */ 1251 ((uint32 *)si->fbc.frame_buffer)[offset] = value; 1252 /* toggle testpattern */ 1253 value = 0xffffffff - value; 1254 } 1255 1256 for (offset = 0, value = 0x55aa55aa; offset < 256; offset++) 1257 { 1258 /* readback and verify testpattern from cardRAM */ 1259 if (((uint32 *)si->fbc.frame_buffer)[offset] != value) result = B_ERROR; 1260 /* toggle testpattern */ 1261 value = 0xffffffff - value; 1262 } 1263 return result; 1264 } 1265 1266 /* NOTE: 1267 * This routine *has* to be done *after* SetDispplayMode has been executed, 1268 * or test results will not be representative! 1269 * (CAS latency is dependant on NV setup on some (DRAM) boards) */ 1270 status_t nv_set_cas_latency() 1271 { 1272 status_t result = B_ERROR; 1273 uint8 latency = 0; 1274 1275 /* check current RAM access to see if we need to change anything */ 1276 if (test_ram() == B_OK) 1277 { 1278 LOG(4,("INIT: RAM access OK.\n")); 1279 return B_OK; 1280 } 1281 1282 /* check if we read PINS at starttime so we have valid registersettings at our disposal */ 1283 if (si->ps.pins_status != B_OK) 1284 { 1285 LOG(4,("INIT: RAM access errors; not fixable: PINS was not read from cardBIOS.\n")); 1286 return B_ERROR; 1287 } 1288 1289 /* OK. We might have a problem, try to fix it now.. */ 1290 LOG(4,("INIT: RAM access errors; tuning CAS latency if prudent...\n")); 1291 1292 switch(si->ps.card_type) 1293 { 1294 default: 1295 LOG(4,("INIT: RAM CAS tuning not implemented for this card, aborting.\n")); 1296 return B_OK; 1297 break; 1298 } 1299 if (result == B_OK) 1300 LOG(4,("INIT: RAM access OK. CAS latency set to %d cycles.\n", latency)); 1301 else 1302 LOG(4,("INIT: RAM access not fixable. CAS latency set to %d cycles.\n", latency)); 1303 1304 return result; 1305 } 1306 1307 void setup_virtualized_heads(bool cross) 1308 { 1309 if (cross) 1310 { 1311 head1_interrupt_enable = (crtc_interrupt_enable) nv_crtc2_interrupt_enable; 1312 head1_update_fifo = (crtc_update_fifo) nv_crtc2_update_fifo; 1313 head1_validate_timing = (crtc_validate_timing) nv_crtc2_validate_timing; 1314 head1_set_timing = (crtc_set_timing) nv_crtc2_set_timing; 1315 head1_depth = (crtc_depth) nv_crtc2_depth; 1316 head1_dpms = (crtc_dpms) nv_crtc2_dpms; 1317 head1_set_display_pitch = (crtc_set_display_pitch) nv_crtc2_set_display_pitch; 1318 head1_set_display_start = (crtc_set_display_start) nv_crtc2_set_display_start; 1319 head1_cursor_init = (crtc_cursor_init) nv_crtc2_cursor_init; 1320 head1_cursor_show = (crtc_cursor_show) nv_crtc2_cursor_show; 1321 head1_cursor_hide = (crtc_cursor_hide) nv_crtc2_cursor_hide; 1322 head1_cursor_define = (crtc_cursor_define) nv_crtc2_cursor_define; 1323 head1_cursor_position = (crtc_cursor_position) nv_crtc2_cursor_position; 1324 head1_stop_tvout = (crtc_stop_tvout) nv_crtc2_stop_tvout; 1325 head1_start_tvout = (crtc_start_tvout) nv_crtc2_start_tvout; 1326 1327 head1_mode = (dac_mode) nv_dac2_mode; 1328 head1_palette = (dac_palette) nv_dac2_palette; 1329 head1_set_pix_pll = (dac_set_pix_pll) nv_dac2_set_pix_pll; 1330 head1_pix_pll_find = (dac_pix_pll_find) nv_dac2_pix_pll_find; 1331 1332 head2_interrupt_enable = (crtc_interrupt_enable) nv_crtc_interrupt_enable; 1333 head2_update_fifo = (crtc_update_fifo) nv_crtc_update_fifo; 1334 head2_validate_timing = (crtc_validate_timing) nv_crtc_validate_timing; 1335 head2_set_timing = (crtc_set_timing) nv_crtc_set_timing; 1336 head2_depth = (crtc_depth) nv_crtc_depth; 1337 head2_dpms = (crtc_dpms) nv_crtc_dpms; 1338 head2_set_display_pitch = (crtc_set_display_pitch) nv_crtc_set_display_pitch; 1339 head2_set_display_start = (crtc_set_display_start) nv_crtc_set_display_start; 1340 head2_cursor_init = (crtc_cursor_init) nv_crtc_cursor_init; 1341 head2_cursor_show = (crtc_cursor_show) nv_crtc_cursor_show; 1342 head2_cursor_hide = (crtc_cursor_hide) nv_crtc_cursor_hide; 1343 head2_cursor_define = (crtc_cursor_define) nv_crtc_cursor_define; 1344 head2_cursor_position = (crtc_cursor_position) nv_crtc_cursor_position; 1345 head2_stop_tvout = (crtc_stop_tvout) nv_crtc_stop_tvout; 1346 head2_start_tvout = (crtc_start_tvout) nv_crtc_start_tvout; 1347 1348 head2_mode = (dac_mode) nv_dac_mode; 1349 head2_palette = (dac_palette) nv_dac_palette; 1350 head2_set_pix_pll = (dac_set_pix_pll) nv_dac_set_pix_pll; 1351 head2_pix_pll_find = (dac_pix_pll_find) nv_dac_pix_pll_find; 1352 } 1353 else 1354 { 1355 head1_interrupt_enable = (crtc_interrupt_enable) nv_crtc_interrupt_enable; 1356 head1_update_fifo = (crtc_update_fifo) nv_crtc_update_fifo; 1357 head1_validate_timing = (crtc_validate_timing) nv_crtc_validate_timing; 1358 head1_set_timing = (crtc_set_timing) nv_crtc_set_timing; 1359 head1_depth = (crtc_depth) nv_crtc_depth; 1360 head1_dpms = (crtc_dpms) nv_crtc_dpms; 1361 head1_set_display_pitch = (crtc_set_display_pitch) nv_crtc_set_display_pitch; 1362 head1_set_display_start = (crtc_set_display_start) nv_crtc_set_display_start; 1363 head1_cursor_init = (crtc_cursor_init) nv_crtc_cursor_init; 1364 head1_cursor_show = (crtc_cursor_show) nv_crtc_cursor_show; 1365 head1_cursor_hide = (crtc_cursor_hide) nv_crtc_cursor_hide; 1366 head1_cursor_define = (crtc_cursor_define) nv_crtc_cursor_define; 1367 head1_cursor_position = (crtc_cursor_position) nv_crtc_cursor_position; 1368 head1_stop_tvout = (crtc_stop_tvout) nv_crtc_stop_tvout; 1369 head1_start_tvout = (crtc_start_tvout) nv_crtc_start_tvout; 1370 1371 head1_mode = (dac_mode) nv_dac_mode; 1372 head1_palette = (dac_palette) nv_dac_palette; 1373 head1_set_pix_pll = (dac_set_pix_pll) nv_dac_set_pix_pll; 1374 head1_pix_pll_find = (dac_pix_pll_find) nv_dac_pix_pll_find; 1375 1376 head2_interrupt_enable = (crtc_interrupt_enable) nv_crtc2_interrupt_enable; 1377 head2_update_fifo = (crtc_update_fifo) nv_crtc2_update_fifo; 1378 head2_validate_timing = (crtc_validate_timing) nv_crtc2_validate_timing; 1379 head2_set_timing = (crtc_set_timing) nv_crtc2_set_timing; 1380 head2_depth = (crtc_depth) nv_crtc2_depth; 1381 head2_dpms = (crtc_dpms) nv_crtc2_dpms; 1382 head2_set_display_pitch = (crtc_set_display_pitch) nv_crtc2_set_display_pitch; 1383 head2_set_display_start = (crtc_set_display_start) nv_crtc2_set_display_start; 1384 head2_cursor_init = (crtc_cursor_init) nv_crtc2_cursor_init; 1385 head2_cursor_show = (crtc_cursor_show) nv_crtc2_cursor_show; 1386 head2_cursor_hide = (crtc_cursor_hide) nv_crtc2_cursor_hide; 1387 head2_cursor_define = (crtc_cursor_define) nv_crtc2_cursor_define; 1388 head2_cursor_position = (crtc_cursor_position) nv_crtc2_cursor_position; 1389 head2_stop_tvout = (crtc_stop_tvout) nv_crtc2_stop_tvout; 1390 head2_start_tvout = (crtc_start_tvout) nv_crtc2_start_tvout; 1391 1392 head2_mode = (dac_mode) nv_dac2_mode; 1393 head2_palette = (dac_palette) nv_dac2_palette; 1394 head2_set_pix_pll = (dac_set_pix_pll) nv_dac2_set_pix_pll; 1395 head2_pix_pll_find = (dac_pix_pll_find) nv_dac2_pix_pll_find; 1396 } 1397 } 1398 1399 void set_crtc_owner(bool head) 1400 { 1401 if (si->ps.secondary_head) 1402 { 1403 if (!head) 1404 { 1405 /* note: 'OWNER' is a non-standard register in behaviour(!) on NV11's, 1406 * while non-NV11 cards behave normally. 1407 * 1408 * Double-write action needed on those strange NV11 cards: */ 1409 /* RESET: needed on NV11 */ 1410 CRTCW(OWNER, 0xff); 1411 /* enable access to CRTC1, SEQ1, GRPH1, ATB1, ??? */ 1412 CRTCW(OWNER, 0x00); 1413 } 1414 else 1415 { 1416 /* note: 'OWNER' is a non-standard register in behaviour(!) on NV11's, 1417 * while non-NV11 cards behave normally. 1418 * 1419 * Double-write action needed on those strange NV11 cards: */ 1420 /* RESET: needed on NV11 */ 1421 CRTC2W(OWNER, 0xff); 1422 /* enable access to CRTC2, SEQ2, GRPH2, ATB2, ??? */ 1423 CRTC2W(OWNER, 0x03); 1424 } 1425 } 1426 } 1427 1428 static status_t nvxx_general_powerup() 1429 { 1430 LOG(4, ("INIT: NV powerup\n")); 1431 LOG(4,("POWERUP: Detected %s (%s)\n", si->adi.name, si->adi.chipset)); 1432 1433 /* setup cardspecs */ 1434 /* note: 1435 * this MUST be done before the driver attempts a card coldstart */ 1436 set_specs(); 1437 1438 /* only process BIOS for finetuning specs and coldstarting card if requested 1439 * by the user; 1440 * note: 1441 * this in fact frees the driver from relying on the BIOS to be executed 1442 * at system power-up POST time. */ 1443 if (!si->settings.usebios) 1444 { 1445 /* Make sure we are running in PCI (not AGP) mode: 1446 * This is a requirement for safely coldstarting cards! 1447 * (some cards reset their AGP PLL during startup which makes acceleration 1448 * engine DMA fail later on. A reboot is needed to overcome that.) 1449 * Note: 1450 * This may only be done when no transfers are in progress on the bus, so now 1451 * is probably a good time.. */ 1452 nv_agp_setup(false); 1453 1454 LOG(2, ("INIT: Attempting card coldstart!\n")); 1455 /* update the cardspecs in the shared_info PINS struct according to reported 1456 * specs as much as is possible; 1457 * this also coldstarts the card if possible (executes BIOS CMD script(s)) */ 1458 parse_pins(); 1459 } 1460 else 1461 { 1462 LOG(2, ("INIT: Skipping card coldstart!\n")); 1463 } 1464 1465 unlock_card(); 1466 1467 /* get RAM size, detect TV encoder and do fake panel startup (panel init code 1468 * is still missing). */ 1469 fake_panel_start(); 1470 1471 /* log the final card specifications */ 1472 dump_pins(); 1473 1474 /* dump config space as it is after a possible coldstart attempt */ 1475 if (si->settings.logmask & 0x80000000) nv_dump_configuration_space(); 1476 1477 /* setup CRTC and DAC functions access: determined in fake_panel_start */ 1478 setup_virtualized_heads(si->ps.crtc2_prim); 1479 1480 /* do powerup needed from pre-inited card state as done by system POST cardBIOS 1481 * execution or driver coldstart above */ 1482 return nv_general_bios_to_powergraphics(); 1483 } 1484 1485 /* this routine switches the CRTC/DAC sets to 'connectors', but only for analog 1486 * outputs. We need this to make sure the analog 'switch' is set in the same way the 1487 * digital 'switch' is set by the BIOS or we might not be able to use dualhead. */ 1488 status_t nv_general_output_select(bool cross) 1489 { 1490 /* make sure this call is warranted */ 1491 if (si->ps.secondary_head) 1492 { 1493 /* NV11 cards can't switch heads (confirmed) */ 1494 if (si->ps.card_type != NV11) 1495 { 1496 if (cross) 1497 { 1498 LOG(4,("INIT: switching analog outputs to be cross-connected\n")); 1499 1500 /* enable head 2 on connector 1 */ 1501 /* (b8 = select CRTC (head) for output, 1502 * b4 = ??? (confirmed not to be a FP switch), 1503 * b0 = enable CRT) */ 1504 DACW(OUTPUT, 0x00000101); 1505 /* enable head 1 on connector 2 */ 1506 DAC2W(OUTPUT, 0x00000001); 1507 } 1508 else 1509 { 1510 LOG(4,("INIT: switching analog outputs to be straight-through\n")); 1511 1512 /* enable head 1 on connector 1 */ 1513 DACW(OUTPUT, 0x00000001); 1514 /* enable head 2 on connector 2 */ 1515 DAC2W(OUTPUT, 0x00000101); 1516 } 1517 } 1518 else 1519 { 1520 LOG(4,("INIT: NV11 analog outputs are hardwired to be straight-through\n")); 1521 } 1522 return B_OK; 1523 } 1524 else 1525 { 1526 return B_ERROR; 1527 } 1528 } 1529 1530 /* this routine switches CRTC/DAC set use. We need this because it's unknown howto 1531 * switch digital panels to/from a specific CRTC/DAC set. */ 1532 status_t nv_general_head_select(bool cross) 1533 { 1534 /* make sure this call is warranted */ 1535 if (si->ps.secondary_head) 1536 { 1537 /* invert CRTC/DAC use to do switching */ 1538 if (cross) 1539 { 1540 LOG(4,("INIT: switching CRTC/DAC use to be cross-connected\n")); 1541 si->crtc_switch_mode = !si->ps.crtc2_prim; 1542 } 1543 else 1544 { 1545 LOG(4,("INIT: switching CRTC/DAC use to be straight-through\n")); 1546 si->crtc_switch_mode = si->ps.crtc2_prim; 1547 } 1548 /* update CRTC and DAC functions access */ 1549 setup_virtualized_heads(si->crtc_switch_mode); 1550 1551 return B_OK; 1552 } 1553 else 1554 { 1555 return B_ERROR; 1556 } 1557 } 1558 1559 static void unlock_card(void) 1560 { 1561 /* power-up all nvidia hardware function blocks */ 1562 /* bit 28: OVERLAY ENGINE (BES), 1563 * bit 25: CRTC2, (> NV04A) 1564 * bit 24: CRTC1, 1565 * bit 20: framebuffer, 1566 * bit 16: PPMI, 1567 * bit 12: PGRAPH, 1568 * bit 8: PFIFO, 1569 * bit 4: PMEDIA, 1570 * bit 0: TVOUT. (> NV04A) */ 1571 NV_REG32(NV32_PWRUPCTRL) = 0x13111111; 1572 1573 /* select colormode CRTC registers base adresses */ 1574 NV_REG8(NV8_MISCW) = 0xcb; 1575 1576 /* enable access to primary head */ 1577 set_crtc_owner(0); 1578 /* unlock head's registers for R/W access */ 1579 CRTCW(LOCK, 0x57); 1580 CRTCW(VSYNCE ,(CRTCR(VSYNCE) & 0x7f)); 1581 if (si->ps.secondary_head) 1582 { 1583 /* enable access to secondary head */ 1584 set_crtc_owner(1); 1585 /* unlock head's registers for R/W access */ 1586 CRTC2W(LOCK, 0x57); 1587 CRTC2W(VSYNCE ,(CRTCR(VSYNCE) & 0x7f)); 1588 } 1589 } 1590 1591 /* basic change of card state from VGA to enhanced mode: 1592 * Should work from VGA BIOS POST init state. */ 1593 static status_t nv_general_bios_to_powergraphics() 1594 { 1595 /* let acc engine make power off/power on cycle to start 'fresh' */ 1596 NV_REG32(NV32_PWRUPCTRL) = 0x13110011; 1597 snooze(1000); 1598 NV_REG32(NV32_PWRUPCTRL) = 0x13111111; 1599 1600 unlock_card(); 1601 1602 /* turn off both displays and the hardcursors (also disables transfers) */ 1603 head1_dpms(false, false, false, true); 1604 head1_cursor_hide(); 1605 if (si->ps.secondary_head) 1606 { 1607 head2_dpms(false, false, false, true); 1608 head2_cursor_hide(); 1609 } 1610 1611 if (si->ps.secondary_head) 1612 { 1613 /* switch overlay engine and TV encoder to CRTC1 */ 1614 /* bit 17: GPU FP port #1 (confirmed NV25, NV28, confirmed not on NV34), 1615 * bit 16: GPU FP port #2 (confirmed NV25, NV28, NV34), 1616 * bit 12: overlay engine (all cards), 1617 * bit 9: TVout chip #2 (confirmed on NV18, NV25, NV28), 1618 * bit 8: TVout chip #1 (all cards), 1619 * bit 4: both I2C busses (all cards) */ 1620 NV_REG32(NV32_2FUNCSEL) &= ~0x00001100; 1621 NV_REG32(NV32_FUNCSEL) |= 0x00001100; 1622 } 1623 si->overlay.crtc = false; 1624 1625 /* enable 'enhanced' mode on primary head: */ 1626 /* enable access to primary head */ 1627 set_crtc_owner(0); 1628 /* note: 'BUFFER' is a non-standard register in behaviour(!) on most 1629 * NV11's like the GeForce2 MX200, while the MX400 and non-NV11 cards 1630 * behave normally. 1631 * Also readback is not nessesarily what was written before! 1632 * 1633 * Double-write action needed on those strange NV11 cards: */ 1634 /* RESET: don't doublebuffer CRTC access: set programmed values immediately... */ 1635 CRTCW(BUFFER, 0xff); 1636 /* ... and use fine pitched CRTC granularity on > NV4 cards (b2 = 0) */ 1637 /* note: this has no effect on possible bandwidth issues. */ 1638 CRTCW(BUFFER, 0xfb); 1639 /* select VGA mode (old VGA register) */ 1640 CRTCW(MODECTL, 0xc3); 1641 /* select graphics mode (old VGA register) */ 1642 SEQW(MEMMODE, 0x0e); 1643 /* select 8 dots character clocks (old VGA register) */ 1644 SEQW(CLKMODE, 0x21); 1645 /* select VGA mode (old VGA register) */ 1646 GRPHW(MODE, 0x00); 1647 /* select graphics mode (old VGA register) */ 1648 GRPHW(MISC, 0x01); 1649 /* select graphics mode (old VGA register) */ 1650 ATBW(MODECTL, 0x01); 1651 /* enable 'enhanced mode', enable Vsync & Hsync, 1652 * set DAC palette to 8-bit width, disable large screen */ 1653 CRTCW(REPAINT1, 0x04); 1654 1655 /* enable 'enhanced' mode on secondary head: */ 1656 if (si->ps.secondary_head) 1657 { 1658 /* enable access to secondary head */ 1659 set_crtc_owner(1); 1660 /* select colormode CRTC2 registers base adresses */ 1661 NV_REG8(NV8_MISCW) = 0xcb; 1662 /* note: 'BUFFER' is a non-standard register in behaviour(!) on most 1663 * NV11's like the GeForce2 MX200, while the MX400 and non-NV11 cards 1664 * behave normally. 1665 * Also readback is not nessesarily what was written before! 1666 * 1667 * Double-write action needed on those strange NV11 cards: */ 1668 /* RESET: don't doublebuffer CRTC2 access: set programmed values immediately... */ 1669 CRTC2W(BUFFER, 0xff); 1670 /* ... and use fine pitched CRTC granularity on > NV4 cards (b2 = 0) */ 1671 /* note: this has no effect on possible bandwidth issues. */ 1672 CRTC2W(BUFFER, 0xfb); 1673 /* select VGA mode (old VGA register) */ 1674 CRTC2W(MODECTL, 0xc3); 1675 /* select graphics mode (old VGA register) */ 1676 SEQW(MEMMODE, 0x0e); 1677 /* select 8 dots character clocks (old VGA register) */ 1678 SEQW(CLKMODE, 0x21); 1679 /* select VGA mode (old VGA register) */ 1680 GRPHW(MODE, 0x00); 1681 /* select graphics mode (old VGA register) */ 1682 GRPHW(MISC, 0x01); 1683 /* select graphics mode (old VGA register) */ 1684 ATB2W(MODECTL, 0x01); 1685 /* enable 'enhanced mode', enable Vsync & Hsync, 1686 * set DAC palette to 8-bit width, disable large screen */ 1687 CRTC2W(REPAINT1, 0x04); 1688 } 1689 1690 /* enable palettes */ 1691 DACW(GENCTRL, 0x00100100); 1692 if (si->ps.secondary_head) DAC2W(GENCTRL, 0x00100100); 1693 1694 /* enable programmable PLLs */ 1695 /* (confirmed PLLSEL to be a write-only register on NV04 and NV11!) */ 1696 if (si->ps.secondary_head) 1697 DACW(PLLSEL, 0x30000f00); 1698 else 1699 DACW(PLLSEL, 0x10000700); 1700 1701 /* turn on DAC and make sure detection testsignal routing is disabled 1702 * (b16 = disable DAC, 1703 * b12 = enable testsignal output */ 1704 //fixme note: b20 ('DACTM_TEST') when set apparantly blocks a DAC's video output 1705 //(confirmed NV43), while it's timing remains operational (black screen). 1706 //It feels like in some screen configurations it can move the output to the other 1707 //output connector as well... 1708 DACW(TSTCTRL, (DACR(TSTCTRL) & 0xfffeefff)); 1709 /* turn on DAC2 if it exists 1710 * (NOTE: testsignal function block resides in DAC1 only (!)) */ 1711 if (si->ps.secondary_head) DAC2W(TSTCTRL, (DAC2R(TSTCTRL) & 0xfffeefff)); 1712 1713 /* NV40 and NV45 need a 'tweak' to make sure the CRTC FIFO's/shiftregisters get 1714 * their data in time (otherwise momentarily ghost images of windows or such 1715 * may appear on heavy acceleration engine use for instance, especially in 32-bit 1716 * colordepth) */ 1717 if ((si->ps.card_type == NV40) || (si->ps.card_type == NV45)) 1718 { 1719 /* clear b15: some framebuffer config item (unknown) */ 1720 NV_REG32(NV32_PFB_CLS_PAGE2) &= 0xffff7fff; 1721 } 1722 1723 /* tweak card GPU-core and RAM speeds if requested (hoping we'll survive)... */ 1724 if (si->settings.gpu_clk) 1725 { 1726 LOG(2,("INIT: tweaking GPU clock!\n")); 1727 1728 set_pll(NV32_COREPLL, si->settings.gpu_clk); 1729 snooze(1000); 1730 } 1731 if (si->settings.ram_clk) 1732 { 1733 LOG(2,("INIT: tweaking cardRAM clock!\n")); 1734 1735 set_pll(NV32_MEMPLL, si->settings.ram_clk); 1736 snooze(1000); 1737 } 1738 1739 /* setup AGP: 1740 * Note: 1741 * This may only be done when no transfers are in progress on the bus, so now 1742 * is probably a good time.. */ 1743 nv_agp_setup(true); 1744 1745 return B_OK; 1746 } 1747 1748 /* Check if mode virtual_size adheres to the cards _maximum_ contraints, and modify 1749 * virtual_size to the nearest valid maximum for the mode on the card if not so. 1750 * Also: check if virtual_width adheres to the cards granularity constraints, and 1751 * create mode slopspace if not so. 1752 * We use acc or crtc granularity constraints based on the 'worst case' scenario. 1753 * 1754 * Mode slopspace is reflected in fbc->bytes_per_row BTW. */ 1755 status_t nv_general_validate_pic_size (display_mode *target, uint32 *bytes_per_row, bool *acc_mode) 1756 { 1757 uint32 video_pitch; 1758 uint32 acc_mask, crtc_mask; 1759 uint32 max_crtc_width, max_acc_width; 1760 uint8 depth = 8; 1761 1762 /* determine pixel multiple based on acceleration engine constraints */ 1763 /* note: 1764 * because of the seemingly 'random' variations in these constraints we take 1765 * a reasonable 'lowest common denominator' instead of always true constraints. */ 1766 switch (si->ps.card_arch) 1767 { 1768 case NV04A: 1769 /* confirmed for: 1770 * TNT1 (NV04), TNT2 (NV05), TNT2-M64 (NV05M64), GeForce2 MX400 (NV11), 1771 * GeForce4 MX440 (NV18), GeForceFX 5200 (NV34) in PIO acc mode; 1772 * confirmed for: 1773 * TNT1 (NV04), TNT2 (NV05), TNT2-M64 (NV05M64), GeForce4 Ti4200 (NV28), 1774 * GeForceFX 5200 (NV34) in DMA acc mode. */ 1775 switch (target->space) 1776 { 1777 case B_CMAP8: acc_mask = 0x0f; depth = 8; break; 1778 case B_RGB15: acc_mask = 0x07; depth = 16; break; 1779 case B_RGB16: acc_mask = 0x07; depth = 16; break; 1780 case B_RGB24: acc_mask = 0x0f; depth = 24; break; 1781 case B_RGB32: acc_mask = 0x03; depth = 32; break; 1782 default: 1783 LOG(8,("INIT: unknown color space: 0x%08x\n", target->space)); 1784 return B_ERROR; 1785 } 1786 break; 1787 default: 1788 /* confirmed for: 1789 * GeForce4 Ti4200 (NV28), GeForceFX 5600 (NV31) in PIO acc mode; 1790 * confirmed for: 1791 * GeForce2 MX400 (NV11), GeForce4 MX440 (NV18), GeForcePCX 5750 (NV36), 1792 * GeForcePCX 6600 GT (NV43) in DMA acc mode. */ 1793 switch (target->space) 1794 { 1795 case B_CMAP8: acc_mask = 0x3f; depth = 8; break; 1796 case B_RGB15: acc_mask = 0x1f; depth = 16; break; 1797 case B_RGB16: acc_mask = 0x1f; depth = 16; break; 1798 case B_RGB24: acc_mask = 0x3f; depth = 24; break; 1799 case B_RGB32: acc_mask = 0x0f; depth = 32; break; 1800 default: 1801 LOG(8,("INIT: unknown color space: 0x%08x\n", target->space)); 1802 return B_ERROR; 1803 } 1804 break; 1805 } 1806 1807 /* determine pixel multiple based on CRTC memory pitch constraints: 1808 * -> all NV cards have same granularity constraints on CRTC1 and CRTC2, 1809 * provided that the CRTC1 and CRTC2 BUFFER register b2 = 0; 1810 * 1811 * (Note: Don't mix this up with CRTC timing contraints! Those are 1812 * multiples of 8 for horizontal, 1 for vertical timing.) */ 1813 switch (si->ps.card_type) 1814 { 1815 default: 1816 // case NV04: 1817 /* confirmed for: 1818 * TNT1 always; 1819 * TNT2, TNT2-M64, GeForce2 MX400, GeForce4 MX440, GeForce4 Ti4200, 1820 * GeForceFX 5200: if the CRTC1 (and CRTC2) BUFFER register b2 = 0 */ 1821 /* NOTE: 1822 * Unfortunately older cards have a hardware fault that prevents use. 1823 * We need doubled granularity on those to prevent the single top line 1824 * from shifting to the left! 1825 * This is confirmed for TNT2, GeForce2 MX200, GeForce2 MX400. 1826 * Confirmed OK are: 1827 * GeForce4 MX440, GeForce4 Ti4200, GeForceFX 5200. */ 1828 switch (target->space) 1829 { 1830 case B_CMAP8: crtc_mask = 0x0f; break; /* 0x07 */ 1831 case B_RGB15: crtc_mask = 0x07; break; /* 0x03 */ 1832 case B_RGB16: crtc_mask = 0x07; break; /* 0x03 */ 1833 case B_RGB24: crtc_mask = 0x0f; break; /* 0x07 */ 1834 case B_RGB32: crtc_mask = 0x03; break; /* 0x01 */ 1835 default: 1836 LOG(8,("INIT: unknown color space: 0x%08x\n", target->space)); 1837 return B_ERROR; 1838 } 1839 break; 1840 // default: 1841 /* confirmed for: 1842 * TNT2, TNT2-M64, GeForce2 MX400, GeForce4 MX440, GeForce4 Ti4200, 1843 * GeForceFX 5200: if the CRTC1 (and CRTC2) BUFFER register b2 = 1 */ 1844 /* switch (target->space) 1845 { 1846 case B_CMAP8: crtc_mask = 0x1f; break; 1847 case B_RGB15: crtc_mask = 0x0f; break; 1848 case B_RGB16: crtc_mask = 0x0f; break; 1849 case B_RGB24: crtc_mask = 0x1f; break; 1850 case B_RGB32: crtc_mask = 0x07; break; 1851 default: 1852 LOG(8,("INIT: unknown color space: 0x%08x\n", target->space)); 1853 return B_ERROR; 1854 } 1855 break; 1856 */ } 1857 1858 /* set virtual_width limit for accelerated modes */ 1859 /* note: 1860 * because of the seemingly 'random' variations in these constraints we take 1861 * a reasonable 'lowest common denominator' instead of always true constraints. */ 1862 switch (si->ps.card_arch) 1863 { 1864 case NV04A: 1865 /* confirmed for: 1866 * TNT1 (NV04), TNT2 (NV05), TNT2-M64 (NV05M64) in both PIO and DMA acc mode. */ 1867 switch(target->space) 1868 { 1869 case B_CMAP8: max_acc_width = 8176; break; 1870 case B_RGB15: max_acc_width = 4088; break; 1871 case B_RGB16: max_acc_width = 4088; break; 1872 case B_RGB24: max_acc_width = 2720; break; 1873 case B_RGB32: max_acc_width = 2044; break; 1874 default: 1875 LOG(8,("INIT: unknown color space: 0x%08x\n", target->space)); 1876 return B_ERROR; 1877 } 1878 break; 1879 default: 1880 /* confirmed for: 1881 * GeForce4 Ti4200 (NV28), GeForceFX 5600 (NV31) in PIO acc mode; 1882 * GeForce2 MX400 (NV11), GeForce4 MX440 (NV18), GeForceFX 5200 (NV34) can do 1883 * 16368/8184/8184/5456/4092, so a bit better in PIO acc mode; 1884 * confirmed for: 1885 * GeForce2 MX400 (NV11), GeForce4 MX440 (NV18), GeForcePCX 5750 (NV36), 1886 * GeForcePCX 6600 GT (NV43) in DMA acc mode; 1887 * GeForce4 Ti4200 (NV28), GeForceFX 5200 (NV34) can do 1888 * 16368/8184/8184/5456/4092, so a bit better in DMA acc mode. */ 1889 switch(target->space) 1890 { 1891 case B_CMAP8: max_acc_width = 16320; break; 1892 case B_RGB15: max_acc_width = 8160; break; 1893 case B_RGB16: max_acc_width = 8160; break; 1894 case B_RGB24: max_acc_width = 5440; break; 1895 case B_RGB32: max_acc_width = 4080; break; 1896 default: 1897 LOG(8,("INIT: unknown color space: 0x%08x\n", target->space)); 1898 return B_ERROR; 1899 } 1900 break; 1901 } 1902 1903 /* set virtual_width limit for unaccelerated modes */ 1904 switch (si->ps.card_type) 1905 { 1906 default: 1907 // case NV04: 1908 /* confirmed for: 1909 * TNT1 always; 1910 * TNT2, TNT2-M64, GeForce2 MX400, GeForce4 MX440, GeForce4 Ti4200, 1911 * GeForceFX 5200: if the CRTC1 (and CRTC2) BUFFER register b2 = 0 */ 1912 /* NOTE: 1913 * Unfortunately older cards have a hardware fault that prevents use. 1914 * We need doubled granularity on those to prevent the single top line 1915 * from shifting to the left! 1916 * This is confirmed for TNT2, GeForce2 MX200, GeForce2 MX400. 1917 * Confirmed OK are: 1918 * GeForce4 MX440, GeForce4 Ti4200, GeForceFX 5200. */ 1919 switch(target->space) 1920 { 1921 case B_CMAP8: max_crtc_width = 16368; break; /* 16376 */ 1922 case B_RGB15: max_crtc_width = 8184; break; /* 8188 */ 1923 case B_RGB16: max_crtc_width = 8184; break; /* 8188 */ 1924 case B_RGB24: max_crtc_width = 5456; break; /* 5456 */ 1925 case B_RGB32: max_crtc_width = 4092; break; /* 4094 */ 1926 default: 1927 LOG(8,("INIT: unknown color space: 0x%08x\n", target->space)); 1928 return B_ERROR; 1929 } 1930 break; 1931 // default: 1932 /* confirmed for: 1933 * TNT2, TNT2-M64, GeForce2 MX400, GeForce4 MX440, GeForce4 Ti4200, 1934 * GeForceFX 5200: if the CRTC1 (and CRTC2) BUFFER register b2 = 1 */ 1935 /* switch(target->space) 1936 { 1937 case B_CMAP8: max_crtc_width = 16352; break; 1938 case B_RGB15: max_crtc_width = 8176; break; 1939 case B_RGB16: max_crtc_width = 8176; break; 1940 case B_RGB24: max_crtc_width = 5440; break; 1941 case B_RGB32: max_crtc_width = 4088; break; 1942 default: 1943 LOG(8,("INIT: unknown color space: 0x%08x\n", target->space)); 1944 return B_ERROR; 1945 } 1946 break; 1947 */ } 1948 1949 /* check for acc capability, and adjust mode to adhere to hardware constraints */ 1950 if (max_acc_width <= max_crtc_width) 1951 { 1952 /* check if we can setup this mode with acceleration */ 1953 *acc_mode = true; 1954 /* virtual_width */ 1955 if (target->virtual_width > max_acc_width) *acc_mode = false; 1956 /* virtual_height */ 1957 /* (NV cards can even do more than this(?)... 1958 * but 4096 is confirmed on all cards at max. accelerated width.) */ 1959 if (target->virtual_height > 4096) *acc_mode = false; 1960 1961 /* now check virtual_size based on CRTC constraints */ 1962 if (target->virtual_width > max_crtc_width) target->virtual_width = max_crtc_width; 1963 /* virtual_height: The only constraint here is the cards memory size which is 1964 * checked later on in ProposeMode: virtual_height is adjusted then if needed. 1965 * 'Limiting here' to the variable size that's at least available (uint16). */ 1966 if (target->virtual_height > 65535) target->virtual_height = 65535; 1967 1968 /* OK, now we know that virtual_width is valid, and it's needing no slopspace if 1969 * it was confined above, so we can finally calculate safely if we need slopspace 1970 * for this mode... */ 1971 if (*acc_mode) 1972 { 1973 /* the mode needs to adhere to the largest granularity imposed... */ 1974 if (acc_mask < crtc_mask) 1975 video_pitch = ((target->virtual_width + crtc_mask) & ~crtc_mask); 1976 else 1977 video_pitch = ((target->virtual_width + acc_mask) & ~acc_mask); 1978 } 1979 else /* unaccelerated mode */ 1980 video_pitch = ((target->virtual_width + crtc_mask) & ~crtc_mask); 1981 } 1982 else /* max_acc_width > max_crtc_width */ 1983 { 1984 /* check if we can setup this mode with acceleration */ 1985 *acc_mode = true; 1986 /* (we already know virtual_width will be no problem) */ 1987 /* virtual_height */ 1988 /* (NV cards can even do more than this(?)... 1989 * but 4096 is confirmed on all cards at max. accelerated width.) */ 1990 if (target->virtual_height > 4096) *acc_mode = false; 1991 1992 /* now check virtual_size based on CRTC constraints */ 1993 if (*acc_mode) 1994 { 1995 /* note that max_crtc_width already adheres to crtc_mask */ 1996 if (target->virtual_width > (max_crtc_width & ~acc_mask)) 1997 target->virtual_width = (max_crtc_width & ~acc_mask); 1998 } 1999 else /* unaccelerated mode */ 2000 { 2001 if (target->virtual_width > max_crtc_width) 2002 target->virtual_width = max_crtc_width; 2003 } 2004 /* virtual_height: The only constraint here is the cards memory size which is 2005 * checked later on in ProposeMode: virtual_height is adjusted then if needed. 2006 * 'Limiting here' to the variable size that's at least available (uint16). */ 2007 if (target->virtual_height > 65535) target->virtual_height = 65535; 2008 2009 /* OK, now we know that virtual_width is valid, and it's needing no slopspace if 2010 * it was confined above, so we can finally calculate safely if we need slopspace 2011 * for this mode... */ 2012 if (*acc_mode) 2013 { 2014 /* the mode needs to adhere to the largest granularity imposed... */ 2015 if (acc_mask < crtc_mask) 2016 video_pitch = ((target->virtual_width + crtc_mask) & ~crtc_mask); 2017 else 2018 video_pitch = ((target->virtual_width + acc_mask) & ~acc_mask); 2019 } 2020 else /* unaccelerated mode */ 2021 video_pitch = ((target->virtual_width + crtc_mask) & ~crtc_mask); 2022 } 2023 2024 LOG(2,("INIT: memory pitch will be set to %d pixels for colorspace 0x%08x\n", 2025 video_pitch, target->space)); 2026 if (target->virtual_width != video_pitch) 2027 LOG(2,("INIT: effective mode slopspace is %d pixels\n", 2028 (video_pitch - target->virtual_width))); 2029 2030 /* now calculate bytes_per_row for this mode */ 2031 *bytes_per_row = video_pitch * (depth >> 3); 2032 2033 return B_OK; 2034 } 2035