1 /* Authors: 2 Mark Watson 12/1999, 3 Apsed, 4 Rudolf Cornelissen 10/2002-8/2009 5 tst.. 6 */ 7 8 #define MODULE_BIT 0x00008000 9 10 #include "nv_std.h" 11 12 static status_t test_ram(void); 13 static status_t nvxx_general_powerup (void); 14 static void unlock_card(void); 15 static status_t nv_general_bios_to_powergraphics(void); 16 17 static void nv_dump_configuration_space (void) 18 { 19 #define DUMP_CFG(reg, type) if (si->ps.card_type >= type) do { \ 20 uint32 value = CFGR(reg); \ 21 MSG(("configuration_space 0x%02x %20s 0x%08x\n", \ 22 NVCFG_##reg, #reg, value)); \ 23 } while (0) 24 DUMP_CFG (DEVID, 0); 25 DUMP_CFG (DEVCTRL, 0); 26 DUMP_CFG (CLASS, 0); 27 DUMP_CFG (HEADER, 0); 28 DUMP_CFG (BASE1REGS,0); 29 DUMP_CFG (BASE2FB, 0); 30 DUMP_CFG (BASE3, 0); 31 DUMP_CFG (BASE4, 0); 32 DUMP_CFG (BASE5, 0); 33 DUMP_CFG (BASE6, 0); 34 DUMP_CFG (BASE7, 0); 35 DUMP_CFG (SUBSYSID1,0); 36 DUMP_CFG (ROMBASE, 0); 37 DUMP_CFG (CAPPTR, 0); 38 DUMP_CFG (CFG_1, 0); 39 DUMP_CFG (INTERRUPT,0); 40 DUMP_CFG (SUBSYSID2,0); 41 DUMP_CFG (AGPREF, 0); 42 DUMP_CFG (AGPSTAT, 0); 43 DUMP_CFG (AGPCMD, 0); 44 DUMP_CFG (ROMSHADOW,0); 45 DUMP_CFG (VGA, 0); 46 DUMP_CFG (SCHRATCH, 0); 47 DUMP_CFG (CFG_10, 0); 48 DUMP_CFG (CFG_11, 0); 49 DUMP_CFG (CFG_12, 0); 50 DUMP_CFG (CFG_13, 0); 51 DUMP_CFG (CFG_14, 0); 52 DUMP_CFG (CFG_15, 0); 53 DUMP_CFG (CFG_16, 0); 54 DUMP_CFG (PCIEREF, 0); 55 DUMP_CFG (PCIEDCAP, 0); 56 DUMP_CFG (PCIEDCTST,0); 57 DUMP_CFG (PCIELCAP, 0); 58 DUMP_CFG (PCIELCTST,0); 59 DUMP_CFG (CFG_22, 0); 60 DUMP_CFG (CFG_23, 0); 61 DUMP_CFG (CFG_24, 0); 62 DUMP_CFG (CFG_25, 0); 63 DUMP_CFG (CFG_26, 0); 64 DUMP_CFG (CFG_27, 0); 65 DUMP_CFG (CFG_28, 0); 66 DUMP_CFG (CFG_29, 0); 67 DUMP_CFG (CFG_30, 0); 68 DUMP_CFG (CFG_31, 0); 69 DUMP_CFG (CFG_32, 0); 70 DUMP_CFG (CFG_33, 0); 71 DUMP_CFG (CFG_34, 0); 72 DUMP_CFG (CFG_35, 0); 73 DUMP_CFG (CFG_36, 0); 74 DUMP_CFG (CFG_37, 0); 75 DUMP_CFG (CFG_38, 0); 76 DUMP_CFG (CFG_39, 0); 77 DUMP_CFG (CFG_40, 0); 78 DUMP_CFG (CFG_41, 0); 79 DUMP_CFG (CFG_42, 0); 80 DUMP_CFG (CFG_43, 0); 81 DUMP_CFG (CFG_44, 0); 82 DUMP_CFG (CFG_45, 0); 83 DUMP_CFG (CFG_46, 0); 84 DUMP_CFG (CFG_47, 0); 85 DUMP_CFG (CFG_48, 0); 86 DUMP_CFG (CFG_49, 0); 87 DUMP_CFG (CFG_50, 0); 88 #undef DUMP_CFG 89 } 90 91 status_t nv_general_powerup() 92 { 93 status_t status; 94 95 LOG(1,("POWERUP: Haiku nVidia Accelerant 0.96 running.\n")); 96 97 /* log VBLANK INT usability status */ 98 if (si->ps.int_assigned) 99 LOG(4,("POWERUP: Usable INT assigned to HW; Vblank semaphore enabled\n")); 100 else 101 LOG(4,("POWERUP: No (usable) INT assigned to HW; Vblank semaphore disabled\n")); 102 103 /* preset no laptop */ 104 si->ps.laptop = false; 105 106 /* WARNING: 107 * _adi.name_ and _adi.chipset_ can contain 31 readable characters max.!!! */ 108 109 /* detect card type and power it up */ 110 switch(CFGR(DEVID)) 111 { 112 /* Vendor Nvidia */ 113 case 0x002010de: /* Nvidia TNT1 */ 114 si->ps.card_type = NV04; 115 si->ps.card_arch = NV04A; 116 sprintf(si->adi.name, "Nvidia TNT1"); 117 sprintf(si->adi.chipset, "NV04"); 118 status = nvxx_general_powerup(); 119 break; 120 case 0x002810de: /* Nvidia TNT2 (pro) */ 121 case 0x002910de: /* Nvidia TNT2 Ultra */ 122 case 0x002a10de: /* Nvidia TNT2 */ 123 case 0x002b10de: /* Nvidia TNT2 */ 124 si->ps.card_type = NV05; 125 si->ps.card_arch = NV04A; 126 sprintf(si->adi.name, "Nvidia TNT2"); 127 sprintf(si->adi.chipset, "NV05"); 128 status = nvxx_general_powerup(); 129 break; 130 case 0x002c10de: /* Nvidia Vanta (Lt) */ 131 si->ps.card_type = NV05; 132 si->ps.card_arch = NV04A; 133 sprintf(si->adi.name, "Nvidia Vanta (Lt)"); 134 sprintf(si->adi.chipset, "NV05"); 135 status = nvxx_general_powerup(); 136 break; 137 case 0x002d10de: /* Nvidia TNT2-M64 (Pro) */ 138 si->ps.card_type = NV05M64; 139 si->ps.card_arch = NV04A; 140 sprintf(si->adi.name, "Nvidia TNT2-M64 (Pro)"); 141 sprintf(si->adi.chipset, "NV05 model 64"); 142 status = nvxx_general_powerup(); 143 break; 144 case 0x002e10de: /* Nvidia NV06 Vanta */ 145 case 0x002f10de: /* Nvidia NV06 Vanta */ 146 si->ps.card_type = NV06; 147 si->ps.card_arch = NV04A; 148 sprintf(si->adi.name, "Nvidia Vanta"); 149 sprintf(si->adi.chipset, "NV06"); 150 status = nvxx_general_powerup(); 151 break; 152 case 0x004010de: /* Nvidia GeForce FX 6800 Ultra */ 153 case 0x004110de: /* Nvidia GeForce FX 6800 */ 154 case 0x004210de: /* Nvidia GeForce FX 6800LE */ 155 si->ps.card_type = NV40; 156 si->ps.card_arch = NV40A; 157 sprintf(si->adi.name, "Nvidia GeForce FX 6800"); 158 sprintf(si->adi.chipset, "NV40"); 159 status = nvxx_general_powerup(); 160 break; 161 case 0x004310de: /* Nvidia GeForce 6800 XE */ 162 si->ps.card_type = NV40; 163 si->ps.card_arch = NV40A; 164 sprintf(si->adi.name, "Nvidia GeForce 6800 XE"); 165 sprintf(si->adi.chipset, "NV40"); 166 status = nvxx_general_powerup(); 167 break; 168 case 0x004510de: /* Nvidia GeForce FX 6800 GT */ 169 case 0x004610de: /* Nvidia GeForce FX 6800 GT */ 170 case 0x004710de: /* Nvidia GeForce FX 6800 GS */ 171 case 0x004810de: /* Nvidia GeForce FX 6800 XT */ 172 si->ps.card_type = NV40; 173 si->ps.card_arch = NV40A; 174 sprintf(si->adi.name, "Nvidia GeForce FX 6800"); 175 sprintf(si->adi.chipset, "NV40"); 176 status = nvxx_general_powerup(); 177 break; 178 case 0x004910de: /* Nvidia unknown FX */ 179 si->ps.card_type = NV40; 180 si->ps.card_arch = NV40A; 181 sprintf(si->adi.name, "Nvidia unknown FX"); 182 sprintf(si->adi.chipset, "NV40"); 183 status = nvxx_general_powerup(); 184 break; 185 case 0x004d10de: /* Nvidia Quadro FX 4400 */ 186 case 0x004e10de: /* Nvidia Quadro FX 4000 */ 187 si->ps.card_type = NV40; 188 si->ps.card_arch = NV40A; 189 sprintf(si->adi.name, "Nvidia Quadro FX 4000/4400"); 190 sprintf(si->adi.chipset, "NV40"); 191 status = nvxx_general_powerup(); 192 break; 193 case 0x009110de: /* Nvidia GeForce 7800 GTX PCIe */ 194 case 0x009210de: /* Nvidia Geforce 7800 GT PCIe */ 195 si->ps.card_type = G70; 196 si->ps.card_arch = NV40A; 197 sprintf(si->adi.name, "Nvidia Geforce 7800 GT PCIe"); 198 sprintf(si->adi.chipset, "G70"); 199 status = nvxx_general_powerup(); 200 break; 201 case 0x009810de: /* Nvidia Geforce 7800 Go PCIe */ 202 case 0x009910de: /* Nvidia Geforce 7800 GTX Go PCIe */ 203 si->ps.card_type = G70; 204 si->ps.card_arch = NV40A; 205 si->ps.laptop = true; 206 sprintf(si->adi.name, "Nvidia Geforce 7800 GTX Go PCIe"); 207 sprintf(si->adi.chipset, "G70"); 208 status = nvxx_general_powerup(); 209 break; 210 case 0x009d10de: /* Nvidia Quadro FX 4500 */ 211 si->ps.card_type = G70; 212 si->ps.card_arch = NV40A; 213 sprintf(si->adi.name, "Nvidia Quadro FX 4500"); 214 sprintf(si->adi.chipset, "G70"); 215 status = nvxx_general_powerup(); 216 break; 217 case 0x00a010de: /* Nvidia Aladdin TNT2 */ 218 si->ps.card_type = NV05; 219 si->ps.card_arch = NV04A; 220 sprintf(si->adi.name, "Nvidia Aladdin TNT2"); 221 sprintf(si->adi.chipset, "NV05"); 222 status = nvxx_general_powerup(); 223 break; 224 case 0x00c010de: /* Nvidia GeForce 6800 GS */ 225 si->ps.card_type = NV41; 226 si->ps.card_arch = NV40A; 227 sprintf(si->adi.name, "Nvidia GeForce 6800 GS"); 228 sprintf(si->adi.chipset, "NV41"); 229 status = nvxx_general_powerup(); 230 break; 231 case 0x00c110de: /* Nvidia GeForce FX 6800 */ 232 case 0x00c210de: /* Nvidia GeForce FX 6800LE */ 233 case 0x00c310de: /* Nvidia GeForce FX 6800 XT */ 234 si->ps.card_type = NV41; 235 si->ps.card_arch = NV40A; 236 sprintf(si->adi.name, "Nvidia GeForce FX 6800"); 237 sprintf(si->adi.chipset, "NV41"); 238 status = nvxx_general_powerup(); 239 break; 240 case 0x00c810de: /* Nvidia GeForce FX 6800 Go */ 241 case 0x00c910de: /* Nvidia GeForce FX 6800 Ultra Go */ 242 si->ps.card_type = NV41; 243 si->ps.card_arch = NV40A; 244 si->ps.laptop = true; 245 sprintf(si->adi.name, "Nvidia GeForce FX 6800 Go"); 246 sprintf(si->adi.chipset, "NV41"); 247 status = nvxx_general_powerup(); 248 break; 249 case 0x00cc10de: /* Nvidia Quadro FX 1400 Go */ 250 si->ps.card_type = NV41; 251 si->ps.card_arch = NV40A; 252 si->ps.laptop = true; 253 sprintf(si->adi.name, "Nvidia Quadro FX 1400 Go"); 254 sprintf(si->adi.chipset, "NV41"); 255 status = nvxx_general_powerup(); 256 break; 257 case 0x00cd10de: /* Nvidia Quadro FX 3450/4000 SDI */ 258 si->ps.card_type = NV41; 259 si->ps.card_arch = NV40A; 260 sprintf(si->adi.name, "Nvidia Quadro FX 3450/4000 SDI"); 261 sprintf(si->adi.chipset, "NV41"); 262 status = nvxx_general_powerup(); 263 break; 264 case 0x00ce10de: /* Nvidia Quadro FX 1400 */ 265 si->ps.card_type = NV41; 266 si->ps.card_arch = NV40A; 267 sprintf(si->adi.name, "Nvidia Quadro FX 1400"); 268 sprintf(si->adi.chipset, "NV41"); 269 status = nvxx_general_powerup(); 270 break; 271 case 0x00f010de: /* Nvidia GeForce FX 6800 (Ultra) AGP(?) */ 272 si->ps.card_type = NV40; 273 si->ps.card_arch = NV40A; 274 sprintf(si->adi.name, "Nvidia GeForce FX 6800 AGP(?)"); 275 sprintf(si->adi.chipset, "NV40(?)"); 276 status = nvxx_general_powerup(); 277 break; 278 case 0x00f110de: /* Nvidia GeForce FX 6600 GT AGP */ 279 case 0x00f210de: /* Nvidia GeForce FX 6600 AGP */ 280 si->ps.card_type = NV43; 281 si->ps.card_arch = NV40A; 282 sprintf(si->adi.name, "Nvidia GeForce FX 6600 (GT) AGP"); 283 sprintf(si->adi.chipset, "NV43"); 284 status = nvxx_general_powerup(); 285 break; 286 case 0x00f310de: /* Nvidia GeForce 6200 */ 287 si->ps.card_type = NV44; 288 si->ps.card_arch = NV40A; 289 sprintf(si->adi.name, "Nvidia GeForce 6200"); 290 sprintf(si->adi.chipset, "NV44"); 291 status = nvxx_general_powerup(); 292 break; 293 case 0x00f410de: /* Nvidia GeForce 6600 LE */ 294 si->ps.card_type = NV43; 295 si->ps.card_arch = NV40A; 296 sprintf(si->adi.name, "Nvidia GeForce 6600 LE"); 297 sprintf(si->adi.chipset, "NV43"); 298 status = nvxx_general_powerup(); 299 break; 300 case 0x00f510de: /* Nvidia GeForce FX 7800 GS AGP */ 301 si->ps.card_type = G70; 302 si->ps.card_arch = NV40A; 303 sprintf(si->adi.name, "Nvidia GeForce 7800 GS AGP"); 304 sprintf(si->adi.chipset, "G70"); 305 status = nvxx_general_powerup(); 306 break; 307 case 0x00f610de: /* Nvidia GeForce 6800 GS */ 308 si->ps.card_type = NV43; 309 si->ps.card_arch = NV40A; 310 sprintf(si->adi.name, "Nvidia GeForce 6800 GS"); 311 sprintf(si->adi.chipset, "NV43"); 312 status = nvxx_general_powerup(); 313 break; 314 case 0x00f810de: /* Nvidia Quadro FX 3400/4400 PCIe */ 315 si->ps.card_type = NV45; 316 si->ps.card_arch = NV40A; 317 sprintf(si->adi.name, "Nvidia Quadro FX 3400 PCIe"); 318 sprintf(si->adi.chipset, "NV45"); 319 status = nvxx_general_powerup(); 320 break; 321 case 0x00f910de: /* Nvidia GeForce PCX 6800 PCIe */ 322 si->ps.card_type = NV45; 323 si->ps.card_arch = NV40A; 324 sprintf(si->adi.name, "Nvidia GeForce PCX 6800 PCIe"); 325 sprintf(si->adi.chipset, "NV45"); 326 status = nvxx_general_powerup(); 327 break; 328 case 0x00fa10de: /* Nvidia GeForce PCX 5750 PCIe */ 329 si->ps.card_type = NV36; 330 si->ps.card_arch = NV30A; 331 sprintf(si->adi.name, "Nvidia GeForce PCX 5750 PCIe"); 332 sprintf(si->adi.chipset, "NV36"); 333 status = nvxx_general_powerup(); 334 break; 335 case 0x00fb10de: /* Nvidia GeForce PCX 5900 PCIe */ 336 si->ps.card_type = NV35; 337 si->ps.card_arch = NV30A; 338 sprintf(si->adi.name, "Nvidia GeForce PCX 5900 PCIe"); 339 sprintf(si->adi.chipset, "NV35(?)"); 340 status = nvxx_general_powerup(); 341 break; 342 case 0x00fc10de: /* Nvidia GeForce PCX 5300 PCIe */ 343 si->ps.card_type = NV34; 344 si->ps.card_arch = NV30A; 345 sprintf(si->adi.name, "Nvidia GeForce PCX 5300 PCIe"); 346 sprintf(si->adi.chipset, "NV34"); 347 status = nvxx_general_powerup(); 348 break; 349 case 0x00fd10de: /* Nvidia Quadro PCX PCIe */ 350 si->ps.card_type = NV45; 351 si->ps.card_arch = NV40A; 352 sprintf(si->adi.name, "Nvidia Quadro PCX PCIe"); 353 sprintf(si->adi.chipset, "NV45"); 354 status = nvxx_general_powerup(); 355 break; 356 case 0x00fe10de: /* Nvidia Quadro FX 1300 PCIe(?) */ 357 si->ps.card_type = NV36; 358 si->ps.card_arch = NV30A; 359 sprintf(si->adi.name, "Nvidia Quadro FX 1300 PCIe(?)"); 360 sprintf(si->adi.chipset, "NV36(?)"); 361 status = nvxx_general_powerup(); 362 break; 363 case 0x00ff10de: /* Nvidia GeForce PCX 4300 PCIe */ 364 si->ps.card_type = NV18; 365 si->ps.card_arch = NV10A; 366 sprintf(si->adi.name, "Nvidia GeForce PCX 4300 PCIe"); 367 sprintf(si->adi.chipset, "NV18"); 368 status = nvxx_general_powerup(); 369 break; 370 case 0x010010de: /* Nvidia GeForce256 SDR */ 371 case 0x010110de: /* Nvidia GeForce256 DDR */ 372 case 0x010210de: /* Nvidia GeForce256 Ultra */ 373 si->ps.card_type = NV10; 374 si->ps.card_arch = NV10A; 375 sprintf(si->adi.name, "Nvidia GeForce256"); 376 sprintf(si->adi.chipset, "NV10"); 377 status = nvxx_general_powerup(); 378 break; 379 case 0x010310de: /* Nvidia Quadro */ 380 si->ps.card_type = NV10; 381 si->ps.card_arch = NV10A; 382 sprintf(si->adi.name, "Nvidia Quadro"); 383 sprintf(si->adi.chipset, "NV10"); 384 status = nvxx_general_powerup(); 385 break; 386 case 0x011010de: /* Nvidia GeForce2 MX/MX400 */ 387 case 0x011110de: /* Nvidia GeForce2 MX100/MX200 DDR */ 388 si->ps.card_type = NV11; 389 si->ps.card_arch = NV10A; 390 sprintf(si->adi.name, "Nvidia GeForce2 MX"); 391 sprintf(si->adi.chipset, "NV11"); 392 status = nvxx_general_powerup(); 393 break; 394 case 0x011210de: /* Nvidia GeForce2 Go */ 395 si->ps.card_type = NV11; 396 si->ps.card_arch = NV10A; 397 si->ps.laptop = true; 398 sprintf(si->adi.name, "Nvidia GeForce2 Go"); 399 sprintf(si->adi.chipset, "NV11"); 400 status = nvxx_general_powerup(); 401 break; 402 case 0x011310de: /* Nvidia Quadro2 MXR/EX/Go */ 403 si->ps.card_type = NV11; 404 si->ps.card_arch = NV10A; 405 sprintf(si->adi.name, "Nvidia Quadro2 MXR/EX/Go"); 406 sprintf(si->adi.chipset, "NV11"); 407 status = nvxx_general_powerup(); 408 break; 409 case 0x014010de: /* Nvidia GeForce FX 6600 GT */ 410 case 0x014110de: /* Nvidia GeForce FX 6600 */ 411 case 0x014210de: /* Nvidia GeForce FX 6600LE */ 412 si->ps.card_type = NV43; 413 si->ps.card_arch = NV40A; 414 sprintf(si->adi.name, "Nvidia GeForce FX 6600"); 415 sprintf(si->adi.chipset, "NV43"); 416 status = nvxx_general_powerup(); 417 break; 418 case 0x014310de: /* Nvidia GeForce 6600 VE */ 419 si->ps.card_type = NV43; 420 si->ps.card_arch = NV40A; 421 sprintf(si->adi.name, "Nvidia GeForce 6600 VE"); 422 sprintf(si->adi.chipset, "NV43"); 423 status = nvxx_general_powerup(); 424 break; 425 case 0x014410de: /* Nvidia GeForce FX 6600 Go */ 426 si->ps.card_type = NV43; 427 si->ps.card_arch = NV40A; 428 si->ps.laptop = true; 429 sprintf(si->adi.name, "Nvidia GeForce FX 6600 Go"); 430 sprintf(si->adi.chipset, "NV43"); 431 status = nvxx_general_powerup(); 432 break; 433 case 0x014510de: /* Nvidia GeForce FX 6610 XL */ 434 si->ps.card_type = NV43; 435 si->ps.card_arch = NV40A; 436 sprintf(si->adi.name, "Nvidia GeForce FX 6610 XL"); 437 sprintf(si->adi.chipset, "NV43"); 438 status = nvxx_general_powerup(); 439 break; 440 case 0x014710de: /* Nvidia GeForce FX 6700 XL */ 441 si->ps.card_type = NV43; 442 si->ps.card_arch = NV40A; 443 sprintf(si->adi.name, "Nvidia GeForce FX 6700 XL"); 444 sprintf(si->adi.chipset, "NV43"); 445 status = nvxx_general_powerup(); 446 break; 447 case 0x014610de: /* Nvidia GeForce FX 6600 TE Go / 6200 TE Go */ 448 case 0x014810de: /* Nvidia GeForce FX 6600 Go */ 449 case 0x014910de: /* Nvidia GeForce FX 6600 GT Go */ 450 si->ps.card_type = NV43; 451 si->ps.card_arch = NV40A; 452 si->ps.laptop = true; 453 sprintf(si->adi.name, "Nvidia GeForce FX 6600Go/6200Go"); 454 sprintf(si->adi.chipset, "NV43"); 455 status = nvxx_general_powerup(); 456 break; 457 case 0x014b10de: /* Nvidia unknown FX */ 458 case 0x014c10de: /* Nvidia Quadro FX 540 MXM */ 459 case 0x014d10de: /* Nvidia unknown FX */ 460 si->ps.card_type = NV43; 461 si->ps.card_arch = NV40A; 462 sprintf(si->adi.name, "Nvidia Quadro FX"); 463 sprintf(si->adi.chipset, "NV43"); 464 status = nvxx_general_powerup(); 465 break; 466 case 0x014e10de: /* Nvidia Quadro FX 540 */ 467 si->ps.card_type = NV43; 468 si->ps.card_arch = NV40A; 469 sprintf(si->adi.name, "Nvidia Quadro FX 540"); 470 sprintf(si->adi.chipset, "NV43"); 471 status = nvxx_general_powerup(); 472 break; 473 case 0x014f10de: /* Nvidia GeForce 6200 PCIe (128Mb) */ 474 si->ps.card_type = NV44; 475 si->ps.card_arch = NV40A; 476 sprintf(si->adi.name, "Nvidia GeForce 6200 PCIe 128Mb"); 477 sprintf(si->adi.chipset, "NV44"); 478 status = nvxx_general_powerup(); 479 break; 480 case 0x015010de: /* Nvidia GeForce2 GTS/Pro */ 481 case 0x015110de: /* Nvidia GeForce2 Ti DDR */ 482 case 0x015210de: /* Nvidia GeForce2 Ultra */ 483 si->ps.card_type = NV15; 484 si->ps.card_arch = NV10A; 485 sprintf(si->adi.name, "Nvidia GeForce2"); 486 sprintf(si->adi.chipset, "NV15"); 487 status = nvxx_general_powerup(); 488 break; 489 case 0x015310de: /* Nvidia Quadro2 Pro */ 490 si->ps.card_type = NV15; 491 si->ps.card_arch = NV10A; 492 sprintf(si->adi.name, "Nvidia Quadro2 Pro"); 493 sprintf(si->adi.chipset, "NV15"); 494 status = nvxx_general_powerup(); 495 break; 496 case 0x016010de: /* Nvidia GeForce 6500 Go */ 497 si->ps.card_type = NV44; 498 si->ps.card_arch = NV40A; 499 si->ps.laptop = true; 500 sprintf(si->adi.name, "Nvidia GeForce 6500 Go"); 501 sprintf(si->adi.chipset, "NV44"); 502 status = nvxx_general_powerup(); 503 break; 504 case 0x016110de: /* Nvidia GeForce 6200 TurboCache */ 505 si->ps.card_type = NV44; 506 si->ps.card_arch = NV40A; 507 sprintf(si->adi.name, "Nvidia GeForce 6200 TC"); 508 sprintf(si->adi.chipset, "NV44"); 509 status = nvxx_general_powerup(); 510 break; 511 case 0x016210de: /* Nvidia GeForce 6200SE TurboCache */ 512 si->ps.card_type = NV44; 513 si->ps.card_arch = NV40A; 514 sprintf(si->adi.name, "Nvidia GeForce 6200SE TC"); 515 sprintf(si->adi.chipset, "NV44"); 516 status = nvxx_general_powerup(); 517 break; 518 case 0x016310de: /* Nvidia GeForce 6200LE */ 519 si->ps.card_type = NV44; 520 si->ps.card_arch = NV40A; 521 sprintf(si->adi.name, "Nvidia GeForce 6200LE"); 522 sprintf(si->adi.chipset, "NV44"); 523 status = nvxx_general_powerup(); 524 break; 525 case 0x016410de: /* Nvidia GeForce FX 6200 Go */ 526 si->ps.card_type = NV44; 527 si->ps.card_arch = NV40A; 528 si->ps.laptop = true; 529 sprintf(si->adi.name, "Nvidia GeForce FX 6200 Go"); 530 sprintf(si->adi.chipset, "NV44"); 531 status = nvxx_general_powerup(); 532 break; 533 case 0x016510de: /* Nvidia Quadro FX NVS 285 */ 534 si->ps.card_type = NV44; 535 si->ps.card_arch = NV40A; 536 sprintf(si->adi.name, "Nvidia Quadro FX NVS 285"); 537 sprintf(si->adi.chipset, "NV44"); 538 status = nvxx_general_powerup(); 539 break; 540 case 0x016610de: /* Nvidia GeForce 6400 Go */ 541 si->ps.card_type = NV44; 542 si->ps.card_arch = NV40A; 543 si->ps.laptop = true; 544 sprintf(si->adi.name, "Nvidia GeForce 6400 Go"); 545 sprintf(si->adi.chipset, "NV44"); 546 status = nvxx_general_powerup(); 547 break; 548 case 0x016710de: /* Nvidia GeForce 6200 Go */ 549 si->ps.card_type = NV44; 550 si->ps.card_arch = NV40A; 551 si->ps.laptop = true; 552 sprintf(si->adi.name, "Nvidia GeForce 6200 Go"); 553 sprintf(si->adi.chipset, "NV44"); 554 status = nvxx_general_powerup(); 555 break; 556 case 0x016810de: /* Nvidia GeForce 6400 Go */ 557 si->ps.card_type = NV44; 558 si->ps.card_arch = NV40A; 559 si->ps.laptop = true; 560 sprintf(si->adi.name, "Nvidia GeForce 6400 Go"); 561 sprintf(si->adi.chipset, "NV44"); 562 status = nvxx_general_powerup(); 563 break; 564 case 0x016910de: /* Nvidia GeForce 6250 Go */ 565 si->ps.card_type = NV44; 566 si->ps.card_arch = NV40A; 567 si->ps.laptop = true; 568 sprintf(si->adi.name, "Nvidia GeForce 6250 Go"); 569 sprintf(si->adi.chipset, "NV44"); 570 status = nvxx_general_powerup(); 571 break; 572 case 0x016a10de: /* Nvidia 7100 GS */ 573 si->ps.card_type = NV44; 574 si->ps.card_arch = NV40A; 575 sprintf(si->adi.name, "Nvidia GeForce 7100 GS"); 576 sprintf(si->adi.chipset, "NV44"); 577 status = nvxx_general_powerup(); 578 break; 579 case 0x016b10de: /* Nvidia unknown FX Go */ 580 case 0x016c10de: /* Nvidia unknown FX Go */ 581 case 0x016d10de: /* Nvidia unknown FX Go */ 582 si->ps.card_type = NV44; 583 si->ps.card_arch = NV40A; 584 si->ps.laptop = true; 585 sprintf(si->adi.name, "Nvidia unknown FX Go"); 586 sprintf(si->adi.chipset, "NV44"); 587 status = nvxx_general_powerup(); 588 break; 589 case 0x016e10de: /* Nvidia unknown FX */ 590 si->ps.card_type = NV44; 591 si->ps.card_arch = NV40A; 592 sprintf(si->adi.name, "Nvidia unknown FX"); 593 sprintf(si->adi.chipset, "NV44"); 594 status = nvxx_general_powerup(); 595 break; 596 case 0x017010de: /* Nvidia GeForce4 MX 460 */ 597 case 0x017110de: /* Nvidia GeForce4 MX 440 */ 598 case 0x017210de: /* Nvidia GeForce4 MX 420 */ 599 case 0x017310de: /* Nvidia GeForce4 MX 440SE */ 600 si->ps.card_type = NV17; 601 si->ps.card_arch = NV10A; 602 sprintf(si->adi.name, "Nvidia GeForce4 MX"); 603 sprintf(si->adi.chipset, "NV17"); 604 status = nvxx_general_powerup(); 605 break; 606 case 0x017410de: /* Nvidia GeForce4 440 Go */ 607 case 0x017510de: /* Nvidia GeForce4 420 Go */ 608 case 0x017610de: /* Nvidia GeForce4 420 Go 32M */ 609 case 0x017710de: /* Nvidia GeForce4 460 Go */ 610 case 0x017910de: /* Nvidia GeForce4 440 Go 64M (on PPC GeForce4 MX) */ 611 si->ps.card_type = NV17; 612 si->ps.card_arch = NV10A; 613 si->ps.laptop = true; 614 sprintf(si->adi.name, "Nvidia GeForce4 Go"); 615 sprintf(si->adi.chipset, "NV17"); 616 status = nvxx_general_powerup(); 617 break; 618 case 0x017810de: /* Nvidia Quadro4 500 XGL/550 XGL */ 619 case 0x017a10de: /* Nvidia Quadro4 200 NVS/400 NVS */ 620 si->ps.card_type = NV17; 621 si->ps.card_arch = NV10A; 622 sprintf(si->adi.name, "Nvidia Quadro4"); 623 sprintf(si->adi.chipset, "NV17"); 624 status = nvxx_general_powerup(); 625 break; 626 case 0x017c10de: /* Nvidia Quadro4 500 GoGL */ 627 si->ps.card_type = NV17; 628 si->ps.card_arch = NV10A; 629 si->ps.laptop = true; 630 sprintf(si->adi.name, "Nvidia Quadro4 500 GoGL"); 631 sprintf(si->adi.chipset, "NV17"); 632 status = nvxx_general_powerup(); 633 break; 634 case 0x017d10de: /* Nvidia GeForce4 410 Go 16M*/ 635 si->ps.card_type = NV17; 636 si->ps.card_arch = NV10A; 637 si->ps.laptop = true; 638 sprintf(si->adi.name, "Nvidia GeForce4 410 Go"); 639 sprintf(si->adi.chipset, "NV17"); 640 status = nvxx_general_powerup(); 641 break; 642 case 0x018110de: /* Nvidia GeForce4 MX 440 AGP8X */ 643 case 0x018210de: /* Nvidia GeForce4 MX 440SE AGP8X */ 644 case 0x018310de: /* Nvidia GeForce4 MX 420 AGP8X */ 645 case 0x018510de: /* Nvidia GeForce4 MX 4000 AGP8X */ 646 si->ps.card_type = NV18; 647 si->ps.card_arch = NV10A; 648 sprintf(si->adi.name, "Nvidia GeForce4 MX AGP8X"); 649 sprintf(si->adi.chipset, "NV18"); 650 status = nvxx_general_powerup(); 651 break; 652 case 0x018610de: /* Nvidia GeForce4 448 Go */ 653 case 0x018710de: /* Nvidia GeForce4 488 Go */ 654 si->ps.card_type = NV18; 655 si->ps.card_arch = NV10A; 656 si->ps.laptop = true; 657 sprintf(si->adi.name, "Nvidia GeForce4 Go"); 658 sprintf(si->adi.chipset, "NV18"); 659 status = nvxx_general_powerup(); 660 break; 661 case 0x018810de: /* Nvidia Quadro4 580 XGL */ 662 si->ps.card_type = NV18; 663 si->ps.card_arch = NV10A; 664 sprintf(si->adi.name, "Nvidia Quadro4"); 665 sprintf(si->adi.chipset, "NV18"); 666 status = nvxx_general_powerup(); 667 break; 668 case 0x018910de: /* Nvidia GeForce4 MX AGP8X (PPC) */ 669 si->ps.card_type = NV18; 670 si->ps.card_arch = NV10A; 671 sprintf(si->adi.name, "Nvidia GeForce4 MX AGP8X"); 672 sprintf(si->adi.chipset, "NV18"); 673 status = nvxx_general_powerup(); 674 break; 675 case 0x018a10de: /* Nvidia Quadro4 280 NVS AGP8X */ 676 case 0x018b10de: /* Nvidia Quadro4 380 XGL */ 677 case 0x018c10de: /* Nvidia Quadro4 NVS 50 PCI */ 678 si->ps.card_type = NV18; 679 si->ps.card_arch = NV10A; 680 sprintf(si->adi.name, "Nvidia Quadro4"); 681 sprintf(si->adi.chipset, "NV18"); 682 status = nvxx_general_powerup(); 683 break; 684 case 0x018d10de: /* Nvidia GeForce4 448 Go */ 685 si->ps.card_type = NV18; 686 si->ps.card_arch = NV10A; 687 si->ps.laptop = true; 688 sprintf(si->adi.name, "Nvidia GeForce4 Go"); 689 sprintf(si->adi.chipset, "NV18"); 690 status = nvxx_general_powerup(); 691 break; 692 case 0x01a010de: /* Nvidia GeForce2 Integrated GPU */ 693 si->ps.card_type = NV11; 694 si->ps.card_arch = NV10A; 695 sprintf(si->adi.name, "Nvidia GeForce2 Integrated GPU"); 696 sprintf(si->adi.chipset, "CRUSH, NV11"); 697 status = nvxx_general_powerup(); 698 break; 699 case 0x01d110de: /* Nvidia GeForce 7300 LE */ 700 case 0x01d310de: /* Nvidia GeForce 7300 SE */ 701 case 0x01df10de: /* Nvidia GeForce 7300 GS */ 702 si->ps.card_type = G72; 703 si->ps.card_arch = NV40A; 704 sprintf(si->adi.name, "Nvidia GeForce 7300"); 705 sprintf(si->adi.chipset, "G72"); 706 status = nvxx_general_powerup(); 707 break; 708 case 0x01d710de: /* Nvidia Quadro NVS 110M/GeForce 7300 Go */ 709 si->ps.card_type = G72; 710 si->ps.card_arch = NV40A; 711 si->ps.laptop = true; 712 sprintf(si->adi.name, "Nvidia Quadro NVS M/GF 7300 Go"); 713 sprintf(si->adi.chipset, "G72"); 714 status = nvxx_general_powerup(); 715 break; 716 case 0x01d810de: /* Nvidia GeForce 7400 Go */ 717 si->ps.card_type = G72; 718 si->ps.card_arch = NV40A; 719 si->ps.laptop = true; 720 sprintf(si->adi.name, "Nvidia GeForce 7400 Go"); 721 sprintf(si->adi.chipset, "G72"); 722 status = nvxx_general_powerup(); 723 break; 724 case 0x01dd10de: /* Nvidia GeForce 7500 LE */ 725 si->ps.card_type = G72; 726 si->ps.card_arch = NV40A; 727 sprintf(si->adi.name, "Nvidia GeForce 7500 LE"); 728 sprintf(si->adi.chipset, "G72"); 729 status = nvxx_general_powerup(); 730 break; 731 case 0x01f010de: /* Nvidia GeForce4 MX Integrated GPU */ 732 si->ps.card_type = NV17; 733 si->ps.card_arch = NV10A; 734 sprintf(si->adi.name, "Nvidia GeForce4 MX Integr. GPU"); 735 sprintf(si->adi.chipset, "NFORCE2, NV17"); 736 status = nvxx_general_powerup(); 737 break; 738 case 0x020010de: /* Nvidia GeForce3 */ 739 case 0x020110de: /* Nvidia GeForce3 Ti 200 */ 740 case 0x020210de: /* Nvidia GeForce3 Ti 500 */ 741 si->ps.card_type = NV20; 742 si->ps.card_arch = NV20A; 743 sprintf(si->adi.name, "Nvidia GeForce3"); 744 sprintf(si->adi.chipset, "NV20"); 745 status = nvxx_general_powerup(); 746 break; 747 case 0x020310de: /* Nvidia Quadro DCC */ 748 si->ps.card_type = NV20; 749 si->ps.card_arch = NV20A; 750 sprintf(si->adi.name, "Nvidia Quadro DCC"); 751 sprintf(si->adi.chipset, "NV20"); 752 status = nvxx_general_powerup(); 753 break; 754 case 0x021110de: /* Nvidia GeForce FX 6800 */ 755 case 0x021210de: /* Nvidia GeForce FX 6800LE */ 756 case 0x021510de: /* Nvidia GeForce FX 6800 GT */ 757 si->ps.card_type = NV45; /* NV48 is NV45 with 512Mb */ 758 si->ps.card_arch = NV40A; 759 sprintf(si->adi.name, "Nvidia GeForce FX 6800"); 760 sprintf(si->adi.chipset, "NV48"); 761 status = nvxx_general_powerup(); 762 break; 763 case 0x021810de: /* Nvidia GeForce 6800 XT */ 764 si->ps.card_type = NV40; 765 si->ps.card_arch = NV40A; 766 sprintf(si->adi.name, "Nvidia GeForce 6800 XT"); 767 sprintf(si->adi.chipset, "NV40"); 768 status = nvxx_general_powerup(); 769 break; 770 case 0x022010de: /* Nvidia unknown FX */ 771 si->ps.card_type = NV44; 772 si->ps.card_arch = NV40A; 773 sprintf(si->adi.name, "Nvidia unknown FX"); 774 sprintf(si->adi.chipset, "NV44"); 775 status = nvxx_general_powerup(); 776 break; 777 case 0x022110de: /* Nvidia GeForce 6200 AGP (256Mb - 128bit) */ 778 si->ps.card_type = NV44; 779 si->ps.card_arch = NV40A; 780 sprintf(si->adi.name, "Nvidia GeForce 6200 AGP 256Mb"); 781 sprintf(si->adi.chipset, "NV44"); 782 status = nvxx_general_powerup(); 783 break; 784 case 0x022210de: /* Nvidia unknown FX */ 785 si->ps.card_type = NV44; 786 si->ps.card_arch = NV40A; 787 sprintf(si->adi.name, "Nvidia unknown FX"); 788 sprintf(si->adi.chipset, "NV44"); 789 status = nvxx_general_powerup(); 790 break; 791 case 0x022810de: /* Nvidia unknown FX Go */ 792 si->ps.card_type = NV44; 793 si->ps.card_arch = NV40A; 794 si->ps.laptop = true; 795 sprintf(si->adi.name, "Nvidia unknown FX Go"); 796 sprintf(si->adi.chipset, "NV44"); 797 status = nvxx_general_powerup(); 798 break; 799 case 0x024010de: /* Nvidia GeForce 6150 (NFORCE4 Integr.GPU) */ 800 case 0x024110de: /* Nvidia GeForce 6150 LE (NFORCE4 Integr.GPU) */ 801 si->ps.card_type = NV44; 802 si->ps.card_arch = NV40A; 803 sprintf(si->adi.name, "Nvidia GeForce 6150"); 804 sprintf(si->adi.chipset, "NV44"); 805 status = nvxx_general_powerup(); 806 break; 807 case 0x024210de: /* Nvidia GeForce 6100 (NFORCE4 Integr.GPU) */ 808 si->ps.card_type = NV44; 809 si->ps.card_arch = NV40A; 810 sprintf(si->adi.name, "Nvidia GeForce 6100"); 811 sprintf(si->adi.chipset, "NV44"); 812 status = nvxx_general_powerup(); 813 break; 814 case 0x024410de: /* Nvidia GeForce 6150 Go (NFORCE4 Integr.GPU) */ 815 si->ps.card_type = NV44; 816 si->ps.card_arch = NV40A; 817 si->ps.laptop = true; 818 sprintf(si->adi.name, "Nvidia GeForce 6150 Go"); 819 sprintf(si->adi.chipset, "NV44"); 820 status = nvxx_general_powerup(); 821 break; 822 case 0x024510de: /* Nvidia Quadro NVS 210S / NVIDIA GeForce 6150LE (NFORCE4 Integr.GPU) */ 823 si->ps.card_type = NV44; 824 si->ps.card_arch = NV40A; 825 sprintf(si->adi.name, "Nvidia GeForce 6150"); 826 sprintf(si->adi.chipset, "NV44"); 827 status = nvxx_general_powerup(); 828 break; 829 case 0x025010de: /* Nvidia GeForce4 Ti 4600 */ 830 case 0x025110de: /* Nvidia GeForce4 Ti 4400 */ 831 case 0x025210de: /* Nvidia GeForce4 Ti 4600 */ 832 case 0x025310de: /* Nvidia GeForce4 Ti 4200 */ 833 si->ps.card_type = NV25; 834 si->ps.card_arch = NV20A; 835 sprintf(si->adi.name, "Nvidia GeForce4 Ti"); 836 sprintf(si->adi.chipset, "NV25"); 837 status = nvxx_general_powerup(); 838 break; 839 case 0x025810de: /* Nvidia Quadro4 900 XGL */ 840 case 0x025910de: /* Nvidia Quadro4 750 XGL */ 841 case 0x025b10de: /* Nvidia Quadro4 700 XGL */ 842 si->ps.card_type = NV25; 843 si->ps.card_arch = NV20A; 844 sprintf(si->adi.name, "Nvidia Quadro4 XGL"); 845 sprintf(si->adi.chipset, "NV25"); 846 status = nvxx_general_powerup(); 847 break; 848 case 0x028010de: /* Nvidia GeForce4 Ti 4800 AGP8X */ 849 case 0x028110de: /* Nvidia GeForce4 Ti 4200 AGP8X */ 850 si->ps.card_type = NV28; 851 si->ps.card_arch = NV20A; 852 sprintf(si->adi.name, "Nvidia GeForce4 Ti AGP8X"); 853 sprintf(si->adi.chipset, "NV28"); 854 status = nvxx_general_powerup(); 855 break; 856 case 0x028210de: /* Nvidia GeForce4 Ti 4800SE */ 857 si->ps.card_type = NV28; 858 si->ps.card_arch = NV20A; 859 sprintf(si->adi.name, "Nvidia GeForce4 Ti 4800SE"); 860 sprintf(si->adi.chipset, "NV28"); 861 status = nvxx_general_powerup(); 862 break; 863 case 0x028610de: /* Nvidia GeForce4 4200 Go */ 864 si->ps.card_type = NV28; 865 si->ps.card_arch = NV20A; 866 si->ps.laptop = true; 867 sprintf(si->adi.name, "Nvidia GeForce4 4200 Go"); 868 sprintf(si->adi.chipset, "NV28"); 869 status = nvxx_general_powerup(); 870 break; 871 case 0x028810de: /* Nvidia Quadro4 980 XGL */ 872 case 0x028910de: /* Nvidia Quadro4 780 XGL */ 873 si->ps.card_type = NV28; 874 si->ps.card_arch = NV20A; 875 sprintf(si->adi.name, "Nvidia Quadro4 XGL"); 876 sprintf(si->adi.chipset, "NV28"); 877 status = nvxx_general_powerup(); 878 break; 879 case 0x028c10de: /* Nvidia Quadro4 700 GoGL */ 880 si->ps.card_type = NV28; 881 si->ps.card_arch = NV20A; 882 si->ps.laptop = true; 883 sprintf(si->adi.name, "Nvidia Quadro4 700 GoGL"); 884 sprintf(si->adi.chipset, "NV28"); 885 status = nvxx_general_powerup(); 886 break; 887 case 0x029010de: /* Nvidia GeForce 7900 GTX */ 888 case 0x029110de: /* Nvidia GeForce 7900 GT */ 889 case 0x029310de: /* Nvidia GeForce 7900 GX2 */ 890 si->ps.card_type = G71; 891 si->ps.card_arch = NV40A; 892 sprintf(si->adi.name, "Nvidia GeForce 7900"); 893 sprintf(si->adi.chipset, "G71"); 894 status = nvxx_general_powerup(); 895 break; 896 case 0x029410de: /* Nvidia GeForce 7950 GX2 */ 897 case 0x029510de: /* Nvidia GeForce 7950 GT */ 898 si->ps.card_type = G71; 899 si->ps.card_arch = NV40A; 900 sprintf(si->adi.name, "Nvidia GeForce 7950"); 901 sprintf(si->adi.chipset, "G71"); 902 status = nvxx_general_powerup(); 903 break; 904 case 0x029810de: /* Nvidia GeForce Go 7900 GS */ 905 case 0x029910de: /* Nvidia GeForce Go 7900 GTX */ 906 si->ps.card_type = G71; 907 si->ps.card_arch = NV40A; 908 si->ps.laptop = true; 909 sprintf(si->adi.name, "Nvidia GeForce Go 7900"); 910 sprintf(si->adi.chipset, "G71"); 911 status = nvxx_general_powerup(); 912 break; 913 case 0x029c10de: /* Nvidia Quadro FX 5500 */ 914 si->ps.card_type = G71; 915 si->ps.card_arch = NV40A; 916 sprintf(si->adi.name, "Nvidia Quadro FX 5500"); 917 sprintf(si->adi.chipset, "G71"); 918 status = nvxx_general_powerup(); 919 break; 920 case 0x029f10de: /* Nvidia Quadro FX 4500 X2 */ 921 si->ps.card_type = G70; 922 si->ps.card_arch = NV40A; 923 sprintf(si->adi.name, "Nvidia Quadro FX 4500 X2"); 924 sprintf(si->adi.chipset, "G70"); 925 status = nvxx_general_powerup(); 926 break; 927 case 0x02a010de: /* Nvidia GeForce3 Integrated GPU */ 928 si->ps.card_type = NV20; 929 si->ps.card_arch = NV20A; 930 sprintf(si->adi.name, "Nvidia GeForce3 Integrated GPU"); 931 sprintf(si->adi.chipset, "XBOX, NV20"); 932 status = nvxx_general_powerup(); 933 break; 934 case 0x02e110de: 935 si->ps.card_type = G73; 936 si->ps.card_arch = NV40A; 937 sprintf(si->adi.name, "Nvidia GeForce 7600 GS"); 938 sprintf(si->adi.chipset, "G73"); 939 status = nvxx_general_powerup(); 940 break; 941 case 0x030110de: /* Nvidia GeForce FX 5800 Ultra */ 942 case 0x030210de: /* Nvidia GeForce FX 5800 */ 943 si->ps.card_type = NV30; 944 si->ps.card_arch = NV30A; 945 sprintf(si->adi.name, "Nvidia GeForce FX 5800"); 946 sprintf(si->adi.chipset, "NV30"); 947 status = nvxx_general_powerup(); 948 break; 949 case 0x030810de: /* Nvidia Quadro FX 2000 */ 950 case 0x030910de: /* Nvidia Quadro FX 1000 */ 951 si->ps.card_type = NV30; 952 si->ps.card_arch = NV30A; 953 sprintf(si->adi.name, "Nvidia Quadro FX"); 954 sprintf(si->adi.chipset, "NV30"); 955 status = nvxx_general_powerup(); 956 break; 957 case 0x031110de: /* Nvidia GeForce FX 5600 Ultra */ 958 case 0x031210de: /* Nvidia GeForce FX 5600 */ 959 si->ps.card_type = NV31; 960 si->ps.card_arch = NV30A; 961 sprintf(si->adi.name, "Nvidia GeForce FX 5600"); 962 sprintf(si->adi.chipset, "NV31"); 963 status = nvxx_general_powerup(); 964 break; 965 case 0x031310de: /* Nvidia unknown FX */ 966 si->ps.card_type = NV31; 967 si->ps.card_arch = NV30A; 968 sprintf(si->adi.name, "Nvidia unknown FX"); 969 sprintf(si->adi.chipset, "NV31"); 970 status = nvxx_general_powerup(); 971 break; 972 case 0x031410de: /* Nvidia GeForce FX 5600XT */ 973 si->ps.card_type = NV31; 974 si->ps.card_arch = NV30A; 975 sprintf(si->adi.name, "Nvidia GeForce FX 5600XT"); 976 sprintf(si->adi.chipset, "NV31"); 977 status = nvxx_general_powerup(); 978 break; 979 case 0x031610de: /* Nvidia unknown FX Go */ 980 case 0x031710de: /* Nvidia unknown FX Go */ 981 si->ps.card_type = NV31; 982 si->ps.card_arch = NV30A; 983 si->ps.laptop = true; 984 sprintf(si->adi.name, "Nvidia unknown FX Go"); 985 sprintf(si->adi.chipset, "NV31"); 986 status = nvxx_general_powerup(); 987 break; 988 case 0x031a10de: /* Nvidia GeForce FX 5600 Go */ 989 si->ps.card_type = NV31; 990 si->ps.card_arch = NV30A; 991 si->ps.laptop = true; 992 sprintf(si->adi.name, "Nvidia GeForce FX 5600 Go"); 993 sprintf(si->adi.chipset, "NV31"); 994 status = nvxx_general_powerup(); 995 break; 996 case 0x031b10de: /* Nvidia GeForce FX 5650 Go */ 997 si->ps.card_type = NV31; 998 si->ps.card_arch = NV30A; 999 si->ps.laptop = true; 1000 sprintf(si->adi.name, "Nvidia GeForce FX 5650 Go"); 1001 sprintf(si->adi.chipset, "NV31"); 1002 status = nvxx_general_powerup(); 1003 break; 1004 case 0x031c10de: /* Nvidia Quadro FX 700 Go */ 1005 si->ps.card_type = NV31; 1006 si->ps.card_arch = NV30A; 1007 si->ps.laptop = true; 1008 sprintf(si->adi.name, "Nvidia Quadro FX 700 Go"); 1009 sprintf(si->adi.chipset, "NV31"); 1010 status = nvxx_general_powerup(); 1011 break; 1012 case 0x031d10de: /* Nvidia unknown FX Go */ 1013 case 0x031e10de: /* Nvidia unknown FX Go */ 1014 case 0x031f10de: /* Nvidia unknown FX Go */ 1015 si->ps.card_type = NV31; 1016 si->ps.card_arch = NV30A; 1017 si->ps.laptop = true; 1018 sprintf(si->adi.name, "Nvidia unknown FX Go"); 1019 sprintf(si->adi.chipset, "NV31"); 1020 status = nvxx_general_powerup(); 1021 break; 1022 case 0x032010de: /* Nvidia GeForce FX 5200 */ 1023 case 0x032110de: /* Nvidia GeForce FX 5200 Ultra */ 1024 case 0x032210de: /* Nvidia GeForce FX 5200 */ 1025 case 0x032310de: /* Nvidia GeForce FX 5200LE */ 1026 si->ps.card_type = NV34; 1027 si->ps.card_arch = NV30A; 1028 sprintf(si->adi.name, "Nvidia GeForce FX 5200"); 1029 sprintf(si->adi.chipset, "NV34"); 1030 status = nvxx_general_powerup(); 1031 break; 1032 case 0x032410de: /* Nvidia GeForce FX 5200 Go */ 1033 si->ps.card_type = NV34; 1034 si->ps.card_arch = NV30A; 1035 si->ps.laptop = true; 1036 sprintf(si->adi.name, "Nvidia GeForce FX 5200 Go"); 1037 sprintf(si->adi.chipset, "NV34"); 1038 status = nvxx_general_powerup(); 1039 break; 1040 case 0x032510de: /* Nvidia GeForce FX 5250 Go */ 1041 si->ps.card_type = NV34; 1042 si->ps.card_arch = NV30A; 1043 si->ps.laptop = true; 1044 sprintf(si->adi.name, "Nvidia GeForce FX 5250 Go"); 1045 sprintf(si->adi.chipset, "NV34"); 1046 status = nvxx_general_powerup(); 1047 break; 1048 case 0x032610de: /* Nvidia GeForce FX 5500 */ 1049 si->ps.card_type = NV34; 1050 si->ps.card_arch = NV30A; 1051 sprintf(si->adi.name, "Nvidia GeForce FX 5500"); 1052 sprintf(si->adi.chipset, "NV34"); 1053 status = nvxx_general_powerup(); 1054 break; 1055 case 0x032710de: /* Nvidia GeForce FX 5100 */ 1056 si->ps.card_type = NV34; 1057 si->ps.card_arch = NV30A; 1058 sprintf(si->adi.name, "Nvidia GeForce FX 5100"); 1059 sprintf(si->adi.chipset, "NV34"); 1060 status = nvxx_general_powerup(); 1061 break; 1062 case 0x032810de: /* Nvidia GeForce FX 5200 Go 32M/64M */ 1063 si->ps.card_type = NV34; 1064 si->ps.card_arch = NV30A; 1065 si->ps.laptop = true; 1066 sprintf(si->adi.name, "Nvidia GeForce FX 5200 Go"); 1067 sprintf(si->adi.chipset, "NV34"); 1068 status = nvxx_general_powerup(); 1069 break; 1070 case 0x032910de: /* Nvidia GeForce FX 5200 (PPC) */ 1071 si->ps.card_type = NV34; 1072 si->ps.card_arch = NV30A; 1073 sprintf(si->adi.name, "Nvidia GeForce FX 5200"); 1074 sprintf(si->adi.chipset, "NV34"); 1075 status = nvxx_general_powerup(); 1076 break; 1077 case 0x032a10de: /* Nvidia Quadro NVS 280 PCI */ 1078 si->ps.card_type = NV34; 1079 si->ps.card_arch = NV30A; 1080 sprintf(si->adi.name, "Nvidia Quadro NVS 280 PCI"); 1081 sprintf(si->adi.chipset, "NV34"); 1082 status = nvxx_general_powerup(); 1083 break; 1084 case 0x032b10de: /* Nvidia Quadro FX 500/600 PCI */ 1085 si->ps.card_type = NV34; 1086 si->ps.card_arch = NV30A; 1087 sprintf(si->adi.name, "Nvidia Quadro FX 500/600 PCI"); 1088 sprintf(si->adi.chipset, "NV34"); 1089 status = nvxx_general_powerup(); 1090 break; 1091 case 0x032c10de: /* Nvidia GeForce FX 5300 Go */ 1092 case 0x032d10de: /* Nvidia GeForce FX 5100 Go */ 1093 si->ps.card_type = NV34; 1094 si->ps.card_arch = NV30A; 1095 si->ps.laptop = true; 1096 sprintf(si->adi.name, "Nvidia GeForce FX Go"); 1097 sprintf(si->adi.chipset, "NV34"); 1098 status = nvxx_general_powerup(); 1099 break; 1100 case 0x032e10de: /* Nvidia unknown FX Go */ 1101 case 0x032f10de: /* Nvidia unknown FX Go */ 1102 si->ps.card_type = NV34; 1103 si->ps.card_arch = NV30A; 1104 si->ps.laptop = true; 1105 sprintf(si->adi.name, "Nvidia unknown FX Go"); 1106 sprintf(si->adi.chipset, "NV34"); 1107 status = nvxx_general_powerup(); 1108 break; 1109 case 0x033010de: /* Nvidia GeForce FX 5900 Ultra */ 1110 case 0x033110de: /* Nvidia GeForce FX 5900 */ 1111 si->ps.card_type = NV35; 1112 si->ps.card_arch = NV30A; 1113 sprintf(si->adi.name, "Nvidia GeForce FX 5900"); 1114 sprintf(si->adi.chipset, "NV35"); 1115 status = nvxx_general_powerup(); 1116 break; 1117 case 0x033210de: /* Nvidia GeForce FX 5900 XT */ 1118 si->ps.card_type = NV35; 1119 si->ps.card_arch = NV30A; 1120 sprintf(si->adi.name, "Nvidia GeForce FX 5900 XT"); 1121 sprintf(si->adi.chipset, "NV35"); 1122 status = nvxx_general_powerup(); 1123 break; 1124 case 0x033310de: /* Nvidia GeForce FX 5950 Ultra */ 1125 si->ps.card_type = NV38; 1126 si->ps.card_arch = NV30A; 1127 sprintf(si->adi.name, "Nvidia GeForce FX 5950 Ultra"); 1128 sprintf(si->adi.chipset, "NV38"); 1129 status = nvxx_general_powerup(); 1130 break; 1131 case 0x033410de: /* Nvidia GeForce FX 5900 ZT */ 1132 si->ps.card_type = NV38; 1133 si->ps.card_arch = NV30A; 1134 sprintf(si->adi.name, "Nvidia GeForce FX 5900 ZT"); 1135 sprintf(si->adi.chipset, "NV38(?)"); 1136 status = nvxx_general_powerup(); 1137 break; 1138 case 0x033810de: /* Nvidia Quadro FX 3000 */ 1139 si->ps.card_type = NV35; 1140 si->ps.card_arch = NV30A; 1141 sprintf(si->adi.name, "Nvidia Quadro FX 3000"); 1142 sprintf(si->adi.chipset, "NV35"); 1143 status = nvxx_general_powerup(); 1144 break; 1145 case 0x033f10de: /* Nvidia Quadro FX 700 */ 1146 si->ps.card_type = NV35; 1147 si->ps.card_arch = NV30A; 1148 sprintf(si->adi.name, "Nvidia Quadro FX 700"); 1149 sprintf(si->adi.chipset, "NV35"); 1150 status = nvxx_general_powerup(); 1151 break; 1152 case 0x034110de: /* Nvidia GeForce FX 5700 Ultra */ 1153 case 0x034210de: /* Nvidia GeForce FX 5700 */ 1154 case 0x034310de: /* Nvidia GeForce FX 5700LE */ 1155 case 0x034410de: /* Nvidia GeForce FX 5700VE */ 1156 si->ps.card_type = NV36; 1157 si->ps.card_arch = NV30A; 1158 sprintf(si->adi.name, "Nvidia GeForce FX 5700"); 1159 sprintf(si->adi.chipset, "NV36"); 1160 status = nvxx_general_powerup(); 1161 break; 1162 case 0x034510de: /* Nvidia unknown FX */ 1163 si->ps.card_type = NV36; 1164 si->ps.card_arch = NV30A; 1165 sprintf(si->adi.name, "Nvidia unknown FX"); 1166 sprintf(si->adi.chipset, "NV36"); 1167 status = nvxx_general_powerup(); 1168 break; 1169 case 0x034710de: /* Nvidia GeForce FX 5700 Go */ 1170 case 0x034810de: /* Nvidia GeForce FX 5700 Go */ 1171 si->ps.card_type = NV36; 1172 si->ps.card_arch = NV30A; 1173 si->ps.laptop = true; 1174 sprintf(si->adi.name, "Nvidia GeForce FX 5700 Go"); 1175 sprintf(si->adi.chipset, "NV36"); 1176 status = nvxx_general_powerup(); 1177 break; 1178 case 0x034910de: /* Nvidia unknown FX Go */ 1179 case 0x034b10de: /* Nvidia unknown FX Go */ 1180 si->ps.card_type = NV36; 1181 si->ps.card_arch = NV30A; 1182 si->ps.laptop = true; 1183 sprintf(si->adi.name, "Nvidia unknown FX Go"); 1184 sprintf(si->adi.chipset, "NV36"); 1185 status = nvxx_general_powerup(); 1186 break; 1187 case 0x034c10de: /* Nvidia Quadro FX 1000 Go */ 1188 si->ps.card_type = NV36; 1189 si->ps.card_arch = NV30A; 1190 si->ps.laptop = true; 1191 sprintf(si->adi.name, "Nvidia Quadro FX 1000 Go"); 1192 sprintf(si->adi.chipset, "NV36"); 1193 status = nvxx_general_powerup(); 1194 break; 1195 case 0x034e10de: /* Nvidia Quadro FX 1100 */ 1196 si->ps.card_type = NV36; 1197 si->ps.card_arch = NV30A; 1198 sprintf(si->adi.name, "Nvidia Quadro FX 1100"); 1199 sprintf(si->adi.chipset, "NV36"); 1200 status = nvxx_general_powerup(); 1201 break; 1202 case 0x034f10de: /* Nvidia unknown FX */ 1203 si->ps.card_type = NV36; 1204 si->ps.card_arch = NV30A; 1205 sprintf(si->adi.name, "Nvidia unknown FX"); 1206 sprintf(si->adi.chipset, "NV36(?)"); 1207 status = nvxx_general_powerup(); 1208 break; 1209 case 0x039110de: /* Nvidia GeForce 7600 GT */ 1210 si->ps.card_type = G73; 1211 si->ps.card_arch = NV40A; 1212 sprintf(si->adi.name, "Nvidia GeForce 7600 GT"); 1213 sprintf(si->adi.chipset, "G73"); 1214 status = nvxx_general_powerup(); 1215 break; 1216 case 0x039210de: /* Nvidia GeForce 7600 GS */ 1217 si->ps.card_type = G73; 1218 si->ps.card_arch = NV40A; 1219 sprintf(si->adi.name, "Nvidia GeForce 7600 GS"); 1220 sprintf(si->adi.chipset, "G73"); 1221 status = nvxx_general_powerup(); 1222 break; 1223 case 0x039310de: /* Nvidia GeForce 7300 GT */ 1224 si->ps.card_type = G73; 1225 si->ps.card_arch = NV40A; 1226 sprintf(si->adi.name, "Nvidia GeForce 7300 GT"); 1227 sprintf(si->adi.chipset, "G73"); 1228 status = nvxx_general_powerup(); 1229 break; 1230 case 0x039410de: /* Nvidia GeForce 7600 LE */ 1231 si->ps.card_type = G70; 1232 si->ps.card_arch = NV40A; 1233 sprintf(si->adi.name, "Nvidia GeForce 7600 LE"); 1234 sprintf(si->adi.chipset, "G70"); 1235 status = nvxx_general_powerup(); 1236 break; 1237 case 0x039810de: /* Nvidia GeForce 7600 GO */ 1238 si->ps.card_type = G73; 1239 si->ps.card_arch = NV40A; 1240 si->ps.laptop = true; 1241 sprintf(si->adi.name, "Nvidia GeForce 7600 GO"); 1242 sprintf(si->adi.chipset, "G73"); 1243 status = nvxx_general_powerup(); 1244 break; 1245 case 0x03d010de: /* Nvidia GeForce 6100 nForce 430 */ 1246 case 0x03d110de: /* Nvidia GeForce 6100 nForce 405 */ 1247 case 0x03d210de: /* Nvidia GeForce 6100 nForce 400 */ 1248 si->ps.card_type = NV44; 1249 si->ps.card_arch = NV40A; 1250 sprintf(si->adi.name, "Nvidia GeForce 6100 nForce"); 1251 sprintf(si->adi.chipset, "NV44"); 1252 status = nvxx_general_powerup(); 1253 break; 1254 /* Vendor Elsa GmbH */ 1255 case 0x0c601048: /* Elsa Gladiac Geforce2 MX */ 1256 si->ps.card_type = NV11; 1257 si->ps.card_arch = NV10A; 1258 sprintf(si->adi.name, "Elsa Gladiac Geforce2 MX"); 1259 sprintf(si->adi.chipset, "NV11"); 1260 status = nvxx_general_powerup(); 1261 break; 1262 /* Vendor Nvidia STB/SGS-Thompson */ 1263 case 0x002012d2: /* Nvidia STB/SGS-Thompson TNT1 */ 1264 si->ps.card_type = NV04; 1265 si->ps.card_arch = NV04A; 1266 sprintf(si->adi.name, "Nvidia STB/SGS-Thompson TNT1"); 1267 sprintf(si->adi.chipset, "NV04"); 1268 status = nvxx_general_powerup(); 1269 break; 1270 case 0x002812d2: /* Nvidia STB/SGS-Thompson TNT2 (pro) */ 1271 case 0x002912d2: /* Nvidia STB/SGS-Thompson TNT2 Ultra */ 1272 case 0x002a12d2: /* Nvidia STB/SGS-Thompson TNT2 */ 1273 case 0x002b12d2: /* Nvidia STB/SGS-Thompson TNT2 */ 1274 si->ps.card_type = NV05; 1275 si->ps.card_arch = NV04A; 1276 sprintf(si->adi.name, "Nvidia STB/SGS-Thompson TNT2"); 1277 sprintf(si->adi.chipset, "NV05"); 1278 status = nvxx_general_powerup(); 1279 break; 1280 case 0x002c12d2: /* Nvidia STB/SGS-Thompson Vanta (Lt) */ 1281 si->ps.card_type = NV05; 1282 si->ps.card_arch = NV04A; 1283 sprintf(si->adi.name, "Nvidia STB/SGS-Thompson Vanta"); 1284 sprintf(si->adi.chipset, "NV05"); 1285 status = nvxx_general_powerup(); 1286 break; 1287 case 0x002d12d2: /* Nvidia STB/SGS-Thompson TNT2-M64 (Pro) */ 1288 si->ps.card_type = NV05M64; 1289 si->ps.card_arch = NV04A; 1290 sprintf(si->adi.name, "Nvidia STB/SGS-Thompson TNT2M64"); 1291 sprintf(si->adi.chipset, "NV05 model 64"); 1292 status = nvxx_general_powerup(); 1293 break; 1294 case 0x002e12d2: /* Nvidia STB/SGS-Thompson NV06 Vanta */ 1295 case 0x002f12d2: /* Nvidia STB/SGS-Thompson NV06 Vanta */ 1296 si->ps.card_type = NV06; 1297 si->ps.card_arch = NV04A; 1298 sprintf(si->adi.name, "Nvidia STB/SGS-Thompson Vanta"); 1299 sprintf(si->adi.chipset, "NV06"); 1300 status = nvxx_general_powerup(); 1301 break; 1302 case 0x00a012d2: /* Nvidia STB/SGS-Thompson Aladdin TNT2 */ 1303 si->ps.card_type = NV05; 1304 si->ps.card_arch = NV04A; 1305 sprintf(si->adi.name, "Nvidia STB/SGS-Thompson TNT2"); 1306 sprintf(si->adi.chipset, "NV05"); 1307 status = nvxx_general_powerup(); 1308 break; 1309 /* Vendor Varisys Limited */ 1310 case 0x35031888: /* Varisys GeForce4 MX440 */ 1311 si->ps.card_type = NV17; 1312 si->ps.card_arch = NV10A; 1313 sprintf(si->adi.name, "Varisys GeForce4 MX440"); 1314 sprintf(si->adi.chipset, "NV17"); 1315 status = nvxx_general_powerup(); 1316 break; 1317 case 0x35051888: /* Varisys GeForce4 Ti 4200 */ 1318 si->ps.card_type = NV25; 1319 si->ps.card_arch = NV20A; 1320 sprintf(si->adi.name, "Varisys GeForce4 Ti 4200"); 1321 sprintf(si->adi.chipset, "NV25"); 1322 status = nvxx_general_powerup(); 1323 break; 1324 default: 1325 LOG(8,("POWERUP: Failed to detect valid card 0x%08x\n",CFGR(DEVID))); 1326 return B_ERROR; 1327 } 1328 1329 return status; 1330 } 1331 1332 static status_t test_ram() 1333 { 1334 uint32 value, offset; 1335 status_t result = B_OK; 1336 1337 /* make sure we don't corrupt the hardware cursor by using fbc.frame_buffer. */ 1338 if (si->fbc.frame_buffer == NULL) 1339 { 1340 LOG(8,("INIT: test_ram detected NULL pointer.\n")); 1341 return B_ERROR; 1342 } 1343 1344 for (offset = 0, value = 0x55aa55aa; offset < 256; offset++) 1345 { 1346 /* write testpattern to cardRAM */ 1347 ((uint32 *)si->fbc.frame_buffer)[offset] = value; 1348 /* toggle testpattern */ 1349 value = 0xffffffff - value; 1350 } 1351 1352 for (offset = 0, value = 0x55aa55aa; offset < 256; offset++) 1353 { 1354 /* readback and verify testpattern from cardRAM */ 1355 if (((uint32 *)si->fbc.frame_buffer)[offset] != value) result = B_ERROR; 1356 /* toggle testpattern */ 1357 value = 0xffffffff - value; 1358 } 1359 return result; 1360 } 1361 1362 /* NOTE: 1363 * This routine *has* to be done *after* SetDispplayMode has been executed, 1364 * or test results will not be representative! 1365 * (CAS latency is dependant on NV setup on some (DRAM) boards) */ 1366 status_t nv_set_cas_latency() 1367 { 1368 status_t result = B_ERROR; 1369 uint8 latency = 0; 1370 1371 /* check current RAM access to see if we need to change anything */ 1372 if (test_ram() == B_OK) 1373 { 1374 LOG(4,("INIT: RAM access OK.\n")); 1375 return B_OK; 1376 } 1377 1378 /* check if we read PINS at starttime so we have valid registersettings at our disposal */ 1379 if (si->ps.pins_status != B_OK) 1380 { 1381 LOG(4,("INIT: RAM access errors; not fixable: PINS was not read from cardBIOS.\n")); 1382 return B_ERROR; 1383 } 1384 1385 /* OK. We might have a problem, try to fix it now.. */ 1386 LOG(4,("INIT: RAM access errors; tuning CAS latency if prudent...\n")); 1387 1388 switch(si->ps.card_type) 1389 { 1390 default: 1391 LOG(4,("INIT: RAM CAS tuning not implemented for this card, aborting.\n")); 1392 return B_OK; 1393 break; 1394 } 1395 if (result == B_OK) 1396 LOG(4,("INIT: RAM access OK. CAS latency set to %d cycles.\n", latency)); 1397 else 1398 LOG(4,("INIT: RAM access not fixable. CAS latency set to %d cycles.\n", latency)); 1399 1400 return result; 1401 } 1402 1403 void setup_virtualized_heads(bool cross) 1404 { 1405 if (cross) 1406 { 1407 head1_interrupt_enable = (crtc_interrupt_enable) nv_crtc2_interrupt_enable; 1408 head1_update_fifo = (crtc_update_fifo) nv_crtc2_update_fifo; 1409 head1_validate_timing = (crtc_validate_timing) nv_crtc2_validate_timing; 1410 head1_set_timing = (crtc_set_timing) nv_crtc2_set_timing; 1411 head1_depth = (crtc_depth) nv_crtc2_depth; 1412 head1_dpms = (crtc_dpms) nv_crtc2_dpms; 1413 head1_set_display_pitch = (crtc_set_display_pitch) nv_crtc2_set_display_pitch; 1414 head1_set_display_start = (crtc_set_display_start) nv_crtc2_set_display_start; 1415 head1_cursor_init = (crtc_cursor_init) nv_crtc2_cursor_init; 1416 head1_cursor_show = (crtc_cursor_show) nv_crtc2_cursor_show; 1417 head1_cursor_hide = (crtc_cursor_hide) nv_crtc2_cursor_hide; 1418 head1_cursor_define = (crtc_cursor_define) nv_crtc2_cursor_define; 1419 head1_cursor_position = (crtc_cursor_position) nv_crtc2_cursor_position; 1420 head1_stop_tvout = (crtc_stop_tvout) nv_crtc2_stop_tvout; 1421 head1_start_tvout = (crtc_start_tvout) nv_crtc2_start_tvout; 1422 1423 head1_mode = (dac_mode) nv_dac2_mode; 1424 head1_palette = (dac_palette) nv_dac2_palette; 1425 head1_set_pix_pll = (dac_set_pix_pll) nv_dac2_set_pix_pll; 1426 head1_pix_pll_find = (dac_pix_pll_find) nv_dac2_pix_pll_find; 1427 1428 head2_interrupt_enable = (crtc_interrupt_enable) nv_crtc_interrupt_enable; 1429 head2_update_fifo = (crtc_update_fifo) nv_crtc_update_fifo; 1430 head2_validate_timing = (crtc_validate_timing) nv_crtc_validate_timing; 1431 head2_set_timing = (crtc_set_timing) nv_crtc_set_timing; 1432 head2_depth = (crtc_depth) nv_crtc_depth; 1433 head2_dpms = (crtc_dpms) nv_crtc_dpms; 1434 head2_set_display_pitch = (crtc_set_display_pitch) nv_crtc_set_display_pitch; 1435 head2_set_display_start = (crtc_set_display_start) nv_crtc_set_display_start; 1436 head2_cursor_init = (crtc_cursor_init) nv_crtc_cursor_init; 1437 head2_cursor_show = (crtc_cursor_show) nv_crtc_cursor_show; 1438 head2_cursor_hide = (crtc_cursor_hide) nv_crtc_cursor_hide; 1439 head2_cursor_define = (crtc_cursor_define) nv_crtc_cursor_define; 1440 head2_cursor_position = (crtc_cursor_position) nv_crtc_cursor_position; 1441 head2_stop_tvout = (crtc_stop_tvout) nv_crtc_stop_tvout; 1442 head2_start_tvout = (crtc_start_tvout) nv_crtc_start_tvout; 1443 1444 head2_mode = (dac_mode) nv_dac_mode; 1445 head2_palette = (dac_palette) nv_dac_palette; 1446 head2_set_pix_pll = (dac_set_pix_pll) nv_dac_set_pix_pll; 1447 head2_pix_pll_find = (dac_pix_pll_find) nv_dac_pix_pll_find; 1448 } 1449 else 1450 { 1451 head1_interrupt_enable = (crtc_interrupt_enable) nv_crtc_interrupt_enable; 1452 head1_update_fifo = (crtc_update_fifo) nv_crtc_update_fifo; 1453 head1_validate_timing = (crtc_validate_timing) nv_crtc_validate_timing; 1454 head1_set_timing = (crtc_set_timing) nv_crtc_set_timing; 1455 head1_depth = (crtc_depth) nv_crtc_depth; 1456 head1_dpms = (crtc_dpms) nv_crtc_dpms; 1457 head1_set_display_pitch = (crtc_set_display_pitch) nv_crtc_set_display_pitch; 1458 head1_set_display_start = (crtc_set_display_start) nv_crtc_set_display_start; 1459 head1_cursor_init = (crtc_cursor_init) nv_crtc_cursor_init; 1460 head1_cursor_show = (crtc_cursor_show) nv_crtc_cursor_show; 1461 head1_cursor_hide = (crtc_cursor_hide) nv_crtc_cursor_hide; 1462 head1_cursor_define = (crtc_cursor_define) nv_crtc_cursor_define; 1463 head1_cursor_position = (crtc_cursor_position) nv_crtc_cursor_position; 1464 head1_stop_tvout = (crtc_stop_tvout) nv_crtc_stop_tvout; 1465 head1_start_tvout = (crtc_start_tvout) nv_crtc_start_tvout; 1466 1467 head1_mode = (dac_mode) nv_dac_mode; 1468 head1_palette = (dac_palette) nv_dac_palette; 1469 head1_set_pix_pll = (dac_set_pix_pll) nv_dac_set_pix_pll; 1470 head1_pix_pll_find = (dac_pix_pll_find) nv_dac_pix_pll_find; 1471 1472 head2_interrupt_enable = (crtc_interrupt_enable) nv_crtc2_interrupt_enable; 1473 head2_update_fifo = (crtc_update_fifo) nv_crtc2_update_fifo; 1474 head2_validate_timing = (crtc_validate_timing) nv_crtc2_validate_timing; 1475 head2_set_timing = (crtc_set_timing) nv_crtc2_set_timing; 1476 head2_depth = (crtc_depth) nv_crtc2_depth; 1477 head2_dpms = (crtc_dpms) nv_crtc2_dpms; 1478 head2_set_display_pitch = (crtc_set_display_pitch) nv_crtc2_set_display_pitch; 1479 head2_set_display_start = (crtc_set_display_start) nv_crtc2_set_display_start; 1480 head2_cursor_init = (crtc_cursor_init) nv_crtc2_cursor_init; 1481 head2_cursor_show = (crtc_cursor_show) nv_crtc2_cursor_show; 1482 head2_cursor_hide = (crtc_cursor_hide) nv_crtc2_cursor_hide; 1483 head2_cursor_define = (crtc_cursor_define) nv_crtc2_cursor_define; 1484 head2_cursor_position = (crtc_cursor_position) nv_crtc2_cursor_position; 1485 head2_stop_tvout = (crtc_stop_tvout) nv_crtc2_stop_tvout; 1486 head2_start_tvout = (crtc_start_tvout) nv_crtc2_start_tvout; 1487 1488 head2_mode = (dac_mode) nv_dac2_mode; 1489 head2_palette = (dac_palette) nv_dac2_palette; 1490 head2_set_pix_pll = (dac_set_pix_pll) nv_dac2_set_pix_pll; 1491 head2_pix_pll_find = (dac_pix_pll_find) nv_dac2_pix_pll_find; 1492 } 1493 } 1494 1495 void set_crtc_owner(bool head) 1496 { 1497 if (si->ps.secondary_head) 1498 { 1499 if (!head) 1500 { 1501 /* note: 'OWNER' is a non-standard register in behaviour(!) on NV11's, 1502 * while non-NV11 cards behave normally. 1503 * 1504 * Double-write action needed on those strange NV11 cards: */ 1505 /* RESET: needed on NV11 */ 1506 CRTCW(OWNER, 0xff); 1507 /* enable access to CRTC1, SEQ1, GRPH1, ATB1, ??? */ 1508 CRTCW(OWNER, 0x00); 1509 } 1510 else 1511 { 1512 /* note: 'OWNER' is a non-standard register in behaviour(!) on NV11's, 1513 * while non-NV11 cards behave normally. 1514 * 1515 * Double-write action needed on those strange NV11 cards: */ 1516 /* RESET: needed on NV11 */ 1517 CRTC2W(OWNER, 0xff); 1518 /* enable access to CRTC2, SEQ2, GRPH2, ATB2, ??? */ 1519 CRTC2W(OWNER, 0x03); 1520 } 1521 } 1522 } 1523 1524 static status_t nvxx_general_powerup() 1525 { 1526 LOG(4, ("INIT: NV powerup\n")); 1527 LOG(4,("POWERUP: Detected %s (%s)\n", si->adi.name, si->adi.chipset)); 1528 1529 /* setup cardspecs */ 1530 /* note: 1531 * this MUST be done before the driver attempts a card coldstart */ 1532 set_specs(); 1533 1534 /* only process BIOS for finetuning specs and coldstarting card if requested 1535 * by the user; 1536 * note: 1537 * this in fact frees the driver from relying on the BIOS to be executed 1538 * at system power-up POST time. */ 1539 if (!si->settings.usebios) 1540 { 1541 /* Make sure we are running in PCI (not AGP) mode: 1542 * This is a requirement for safely coldstarting cards! 1543 * (some cards reset their AGP PLL during startup which makes acceleration 1544 * engine DMA fail later on. A reboot is needed to overcome that.) 1545 * Note: 1546 * This may only be done when no transfers are in progress on the bus, so now 1547 * is probably a good time.. */ 1548 nv_agp_setup(false); 1549 1550 LOG(2, ("INIT: Attempting card coldstart!\n")); 1551 /* update the cardspecs in the shared_info PINS struct according to reported 1552 * specs as much as is possible; 1553 * this also coldstarts the card if possible (executes BIOS CMD script(s)) */ 1554 parse_pins(); 1555 } 1556 else 1557 { 1558 LOG(2, ("INIT: Skipping card coldstart!\n")); 1559 } 1560 1561 unlock_card(); 1562 1563 /* get RAM size, detect TV encoder and do fake panel startup (panel init code 1564 * is still missing). */ 1565 fake_panel_start(); 1566 1567 /* log the final card specifications */ 1568 dump_pins(); 1569 1570 /* dump config space as it is after a possible coldstart attempt */ 1571 if (si->settings.logmask & 0x80000000) nv_dump_configuration_space(); 1572 1573 /* setup CRTC and DAC functions access: determined in fake_panel_start */ 1574 setup_virtualized_heads(si->ps.crtc2_prim); 1575 1576 /* do powerup needed from pre-inited card state as done by system POST cardBIOS 1577 * execution or driver coldstart above */ 1578 return nv_general_bios_to_powergraphics(); 1579 } 1580 1581 /* this routine switches the CRTC/DAC sets to 'connectors', but only for analog 1582 * outputs. We need this to make sure the analog 'switch' is set in the same way the 1583 * digital 'switch' is set by the BIOS or we might not be able to use dualhead. */ 1584 status_t nv_general_output_select(bool cross) 1585 { 1586 /* make sure this call is warranted */ 1587 if (si->ps.secondary_head) 1588 { 1589 /* NV11 cards can't switch heads (confirmed) */ 1590 if (si->ps.card_type != NV11) 1591 { 1592 if (cross) 1593 { 1594 LOG(4,("INIT: switching analog outputs to be cross-connected\n")); 1595 1596 /* enable head 2 on connector 1 */ 1597 /* (b8 = select CRTC (head) for output, 1598 * b4 = ??? (confirmed not to be a FP switch), 1599 * b0 = enable CRT) */ 1600 DACW(OUTPUT, 0x00000101); 1601 /* enable head 1 on connector 2 */ 1602 DAC2W(OUTPUT, 0x00000001); 1603 } 1604 else 1605 { 1606 LOG(4,("INIT: switching analog outputs to be straight-through\n")); 1607 1608 /* enable head 1 on connector 1 */ 1609 DACW(OUTPUT, 0x00000001); 1610 /* enable head 2 on connector 2 */ 1611 DAC2W(OUTPUT, 0x00000101); 1612 } 1613 } 1614 else 1615 { 1616 LOG(4,("INIT: NV11 analog outputs are hardwired to be straight-through\n")); 1617 } 1618 return B_OK; 1619 } 1620 else 1621 { 1622 return B_ERROR; 1623 } 1624 } 1625 1626 /* this routine switches CRTC/DAC set use. We need this because it's unknown howto 1627 * switch digital panels to/from a specific CRTC/DAC set. */ 1628 status_t nv_general_head_select(bool cross) 1629 { 1630 /* make sure this call is warranted */ 1631 if (si->ps.secondary_head) 1632 { 1633 /* invert CRTC/DAC use to do switching */ 1634 if (cross) 1635 { 1636 LOG(4,("INIT: switching CRTC/DAC use to be cross-connected\n")); 1637 si->crtc_switch_mode = !si->ps.crtc2_prim; 1638 } 1639 else 1640 { 1641 LOG(4,("INIT: switching CRTC/DAC use to be straight-through\n")); 1642 si->crtc_switch_mode = si->ps.crtc2_prim; 1643 } 1644 /* update CRTC and DAC functions access */ 1645 setup_virtualized_heads(si->crtc_switch_mode); 1646 1647 return B_OK; 1648 } 1649 else 1650 { 1651 return B_ERROR; 1652 } 1653 } 1654 1655 static void unlock_card(void) 1656 { 1657 /* make sure to power-up all nvidia hardware function blocks */ 1658 /* bit 28: OVERLAY ENGINE (BES), 1659 * bit 25: CRTC2, (> NV04A) 1660 * bit 24: CRTC1, 1661 * bit 20: framebuffer, 1662 * bit 16: PPMI, 1663 * bit 13: some part of at least the G72 acceleration engine, 1664 * bit 12: PGRAPH, 1665 * bit 8: PFIFO, 1666 * bit 4: PMEDIA, 1667 * bit 0: TVOUT. (> NV04A) */ 1668 NV_REG32(NV32_PWRUPCTRL) = 0xffffffff; 1669 1670 /* select colormode CRTC registers base adresses */ 1671 NV_REG8(NV8_MISCW) = 0xcb; 1672 1673 /* enable access to primary head */ 1674 set_crtc_owner(0); 1675 /* unlock head's registers for R/W access */ 1676 CRTCW(LOCK, 0x57); 1677 CRTCW(VSYNCE ,(CRTCR(VSYNCE) & 0x7f)); 1678 if (si->ps.secondary_head) 1679 { 1680 /* enable access to secondary head */ 1681 set_crtc_owner(1); 1682 /* unlock head's registers for R/W access */ 1683 CRTC2W(LOCK, 0x57); 1684 CRTC2W(VSYNCE ,(CRTCR(VSYNCE) & 0x7f)); 1685 } 1686 } 1687 1688 /* basic change of card state from VGA to enhanced mode: 1689 * Should work from VGA BIOS POST init state. */ 1690 static status_t nv_general_bios_to_powergraphics() 1691 { 1692 /* let acc engine make power off/power on cycle to start 'fresh' */ 1693 NV_REG32(NV32_PWRUPCTRL) = 0xffff00ff; 1694 snooze(1000); 1695 NV_REG32(NV32_PWRUPCTRL) = 0xffffffff; 1696 1697 unlock_card(); 1698 1699 /* turn off both displays and the hardcursors (also disables transfers) */ 1700 head1_dpms(false, false, false, true); 1701 head1_cursor_hide(); 1702 if (si->ps.secondary_head) 1703 { 1704 head2_dpms(false, false, false, true); 1705 head2_cursor_hide(); 1706 } 1707 1708 if (si->ps.secondary_head) 1709 { 1710 /* switch overlay engine and TV encoder to CRTC1 */ 1711 /* bit 17: GPU FP port #1 (confirmed NV25, NV28, confirmed not on NV34), 1712 * bit 16: GPU FP port #2 (confirmed NV25, NV28, NV34), 1713 * bit 12: overlay engine (all cards), 1714 * bit 9: TVout chip #2 (confirmed on NV18, NV25, NV28), 1715 * bit 8: TVout chip #1 (all cards), 1716 * bit 4: both I2C busses (all cards) */ 1717 NV_REG32(NV32_2FUNCSEL) &= ~0x00001100; 1718 NV_REG32(NV32_FUNCSEL) |= 0x00001100; 1719 } 1720 si->overlay.crtc = false; 1721 1722 /* enable 'enhanced' mode on primary head: */ 1723 /* enable access to primary head */ 1724 set_crtc_owner(0); 1725 /* note: 'BUFFER' is a non-standard register in behaviour(!) on most 1726 * NV11's like the GeForce2 MX200, while the MX400 and non-NV11 cards 1727 * behave normally. 1728 * Also readback is not nessesarily what was written before! 1729 * 1730 * Double-write action needed on those strange NV11 cards: */ 1731 /* RESET: don't doublebuffer CRTC access: set programmed values immediately... */ 1732 CRTCW(BUFFER, 0xff); 1733 /* ... and use fine pitched CRTC granularity on > NV4 cards (b2 = 0) */ 1734 /* note: this has no effect on possible bandwidth issues. */ 1735 CRTCW(BUFFER, 0xfb); 1736 /* select VGA mode (old VGA register) */ 1737 CRTCW(MODECTL, 0xc3); 1738 /* select graphics mode (old VGA register) */ 1739 SEQW(MEMMODE, 0x0e); 1740 /* select 8 dots character clocks (old VGA register) */ 1741 SEQW(CLKMODE, 0x21); 1742 /* select VGA mode (old VGA register) */ 1743 GRPHW(MODE, 0x00); 1744 /* select graphics mode (old VGA register) */ 1745 GRPHW(MISC, 0x01); 1746 /* select graphics mode (old VGA register) */ 1747 ATBW(MODECTL, 0x01); 1748 /* enable 'enhanced mode', enable Vsync & Hsync, 1749 * set DAC palette to 8-bit width, disable large screen */ 1750 CRTCW(REPAINT1, 0x04); 1751 1752 /* enable 'enhanced' mode on secondary head: */ 1753 if (si->ps.secondary_head) 1754 { 1755 /* enable access to secondary head */ 1756 set_crtc_owner(1); 1757 /* select colormode CRTC2 registers base adresses */ 1758 NV_REG8(NV8_MISCW) = 0xcb; 1759 /* note: 'BUFFER' is a non-standard register in behaviour(!) on most 1760 * NV11's like the GeForce2 MX200, while the MX400 and non-NV11 cards 1761 * behave normally. 1762 * Also readback is not nessesarily what was written before! 1763 * 1764 * Double-write action needed on those strange NV11 cards: */ 1765 /* RESET: don't doublebuffer CRTC2 access: set programmed values immediately... */ 1766 CRTC2W(BUFFER, 0xff); 1767 /* ... and use fine pitched CRTC granularity on > NV4 cards (b2 = 0) */ 1768 /* note: this has no effect on possible bandwidth issues. */ 1769 CRTC2W(BUFFER, 0xfb); 1770 /* select VGA mode (old VGA register) */ 1771 CRTC2W(MODECTL, 0xc3); 1772 /* select graphics mode (old VGA register) */ 1773 SEQW(MEMMODE, 0x0e); 1774 /* select 8 dots character clocks (old VGA register) */ 1775 SEQW(CLKMODE, 0x21); 1776 /* select VGA mode (old VGA register) */ 1777 GRPHW(MODE, 0x00); 1778 /* select graphics mode (old VGA register) */ 1779 GRPHW(MISC, 0x01); 1780 /* select graphics mode (old VGA register) */ 1781 ATB2W(MODECTL, 0x01); 1782 /* enable 'enhanced mode', enable Vsync & Hsync, 1783 * set DAC palette to 8-bit width, disable large screen */ 1784 CRTC2W(REPAINT1, 0x04); 1785 } 1786 1787 /* enable palettes */ 1788 DACW(GENCTRL, 0x00100100); 1789 if (si->ps.secondary_head) DAC2W(GENCTRL, 0x00100100); 1790 1791 /* enable programmable PLLs */ 1792 /* (confirmed PLLSEL to be a write-only register on NV04 and NV11!) */ 1793 if (si->ps.secondary_head) 1794 DACW(PLLSEL, 0x30000f00); 1795 else 1796 DACW(PLLSEL, 0x10000700); 1797 1798 /* turn on DAC and make sure detection testsignal routing is disabled 1799 * (b16 = disable DAC, 1800 * b12 = enable testsignal output */ 1801 //fixme note: b20 ('DACTM_TEST') when set apparantly blocks a DAC's video output 1802 //(confirmed NV43), while it's timing remains operational (black screen). 1803 //It feels like in some screen configurations it can move the output to the other 1804 //output connector as well... 1805 DACW(TSTCTRL, (DACR(TSTCTRL) & 0xfffeefff)); 1806 /* turn on DAC2 if it exists 1807 * (NOTE: testsignal function block resides in DAC1 only (!)) */ 1808 if (si->ps.secondary_head) DAC2W(TSTCTRL, (DAC2R(TSTCTRL) & 0xfffeefff)); 1809 1810 /* NV40 and NV45 need a 'tweak' to make sure the CRTC FIFO's/shiftregisters get 1811 * their data in time (otherwise momentarily ghost images of windows or such 1812 * may appear on heavy acceleration engine use for instance, especially in 32-bit 1813 * colordepth) */ 1814 if ((si->ps.card_type == NV40) || (si->ps.card_type == NV45)) 1815 { 1816 /* clear b15: some framebuffer config item (unknown) */ 1817 NV_REG32(NV32_PFB_CLS_PAGE2) &= 0xffff7fff; 1818 } 1819 1820 /* tweak card GPU-core and RAM speeds if requested (hoping we'll survive)... */ 1821 if (si->settings.gpu_clk) 1822 { 1823 LOG(2,("INIT: tweaking GPU clock!\n")); 1824 1825 set_pll(NV32_COREPLL, si->settings.gpu_clk); 1826 snooze(1000); 1827 } 1828 if (si->settings.ram_clk) 1829 { 1830 LOG(2,("INIT: tweaking cardRAM clock!\n")); 1831 1832 set_pll(NV32_MEMPLL, si->settings.ram_clk); 1833 snooze(1000); 1834 } 1835 1836 /* setup AGP: 1837 * Note: 1838 * This may only be done when no transfers are in progress on the bus, so now 1839 * is probably a good time.. */ 1840 nv_agp_setup(true); 1841 1842 return B_OK; 1843 } 1844 1845 /* Check if mode virtual_size adheres to the cards _maximum_ contraints, and modify 1846 * virtual_size to the nearest valid maximum for the mode on the card if not so. 1847 * Also: check if virtual_width adheres to the cards granularity constraints, and 1848 * create mode slopspace if not so. 1849 * We use acc or crtc granularity constraints based on the 'worst case' scenario. 1850 * 1851 * Mode slopspace is reflected in fbc->bytes_per_row BTW. */ 1852 status_t nv_general_validate_pic_size (display_mode *target, uint32 *bytes_per_row, bool *acc_mode) 1853 { 1854 uint32 video_pitch; 1855 uint32 acc_mask, crtc_mask; 1856 uint32 max_crtc_width, max_acc_width; 1857 uint8 depth = 8; 1858 1859 /* determine pixel multiple based on acceleration engine constraints */ 1860 /* note: 1861 * because of the seemingly 'random' variations in these constraints we take 1862 * a reasonable 'lowest common denominator' instead of always true constraints. */ 1863 switch (si->ps.card_arch) 1864 { 1865 case NV04A: 1866 /* confirmed for: 1867 * TNT1 (NV04), TNT2 (NV05), TNT2-M64 (NV05M64), GeForce2 MX400 (NV11), 1868 * GeForce4 MX440 (NV18), GeForceFX 5200 (NV34) in PIO acc mode; 1869 * confirmed for: 1870 * TNT1 (NV04), TNT2 (NV05), TNT2-M64 (NV05M64), GeForce4 Ti4200 (NV28), 1871 * GeForceFX 5200 (NV34) in DMA acc mode. */ 1872 switch (target->space) 1873 { 1874 case B_CMAP8: acc_mask = 0x0f; depth = 8; break; 1875 case B_RGB15: acc_mask = 0x07; depth = 16; break; 1876 case B_RGB16: acc_mask = 0x07; depth = 16; break; 1877 case B_RGB24: acc_mask = 0x0f; depth = 24; break; 1878 case B_RGB32: acc_mask = 0x03; depth = 32; break; 1879 default: 1880 LOG(8,("INIT: unknown color space: 0x%08x\n", target->space)); 1881 return B_ERROR; 1882 } 1883 break; 1884 default: 1885 /* confirmed for: 1886 * GeForce4 Ti4200 (NV28), GeForceFX 5600 (NV31) in PIO acc mode; 1887 * confirmed for: 1888 * GeForce2 MX400 (NV11), GeForce4 MX440 (NV18), GeForcePCX 5750 (NV36), 1889 * GeForcePCX 6600 GT (NV43) in DMA acc mode. */ 1890 switch (target->space) 1891 { 1892 case B_CMAP8: acc_mask = 0x3f; depth = 8; break; 1893 case B_RGB15: acc_mask = 0x1f; depth = 16; break; 1894 case B_RGB16: acc_mask = 0x1f; depth = 16; break; 1895 case B_RGB24: acc_mask = 0x3f; depth = 24; break; 1896 case B_RGB32: acc_mask = 0x0f; depth = 32; break; 1897 default: 1898 LOG(8,("INIT: unknown color space: 0x%08x\n", target->space)); 1899 return B_ERROR; 1900 } 1901 break; 1902 } 1903 1904 /* determine pixel multiple based on CRTC memory pitch constraints: 1905 * -> all NV cards have same granularity constraints on CRTC1 and CRTC2, 1906 * provided that the CRTC1 and CRTC2 BUFFER register b2 = 0; 1907 * 1908 * (Note: Don't mix this up with CRTC timing contraints! Those are 1909 * multiples of 8 for horizontal, 1 for vertical timing.) */ 1910 switch (si->ps.card_type) 1911 { 1912 default: 1913 // case NV04: 1914 /* confirmed for: 1915 * TNT1 always; 1916 * TNT2, TNT2-M64, GeForce2 MX400, GeForce4 MX440, GeForce4 Ti4200, 1917 * GeForceFX 5200: if the CRTC1 (and CRTC2) BUFFER register b2 = 0 */ 1918 /* NOTE: 1919 * Unfortunately older cards have a hardware fault that prevents use. 1920 * We need doubled granularity on those to prevent the single top line 1921 * from shifting to the left! 1922 * This is confirmed for TNT2, GeForce2 MX200, GeForce2 MX400. 1923 * Confirmed OK are: 1924 * GeForce4 MX440, GeForce4 Ti4200, GeForceFX 5200. */ 1925 switch (target->space) 1926 { 1927 case B_CMAP8: crtc_mask = 0x0f; break; /* 0x07 */ 1928 case B_RGB15: crtc_mask = 0x07; break; /* 0x03 */ 1929 case B_RGB16: crtc_mask = 0x07; break; /* 0x03 */ 1930 case B_RGB24: crtc_mask = 0x0f; break; /* 0x07 */ 1931 case B_RGB32: crtc_mask = 0x03; break; /* 0x01 */ 1932 default: 1933 LOG(8,("INIT: unknown color space: 0x%08x\n", target->space)); 1934 return B_ERROR; 1935 } 1936 break; 1937 // default: 1938 /* confirmed for: 1939 * TNT2, TNT2-M64, GeForce2 MX400, GeForce4 MX440, GeForce4 Ti4200, 1940 * GeForceFX 5200: if the CRTC1 (and CRTC2) BUFFER register b2 = 1 */ 1941 /* switch (target->space) 1942 { 1943 case B_CMAP8: crtc_mask = 0x1f; break; 1944 case B_RGB15: crtc_mask = 0x0f; break; 1945 case B_RGB16: crtc_mask = 0x0f; break; 1946 case B_RGB24: crtc_mask = 0x1f; break; 1947 case B_RGB32: crtc_mask = 0x07; break; 1948 default: 1949 LOG(8,("INIT: unknown color space: 0x%08x\n", target->space)); 1950 return B_ERROR; 1951 } 1952 break; 1953 */ } 1954 1955 /* set virtual_width limit for accelerated modes */ 1956 /* note: 1957 * because of the seemingly 'random' variations in these constraints we take 1958 * a reasonable 'lowest common denominator' instead of always true constraints. */ 1959 switch (si->ps.card_arch) 1960 { 1961 case NV04A: 1962 /* confirmed for: 1963 * TNT1 (NV04), TNT2 (NV05), TNT2-M64 (NV05M64) in both PIO and DMA acc mode. */ 1964 switch(target->space) 1965 { 1966 case B_CMAP8: max_acc_width = 8176; break; 1967 case B_RGB15: max_acc_width = 4088; break; 1968 case B_RGB16: max_acc_width = 4088; break; 1969 case B_RGB24: max_acc_width = 2720; break; 1970 case B_RGB32: max_acc_width = 2044; break; 1971 default: 1972 LOG(8,("INIT: unknown color space: 0x%08x\n", target->space)); 1973 return B_ERROR; 1974 } 1975 break; 1976 default: 1977 /* confirmed for: 1978 * GeForce4 Ti4200 (NV28), GeForceFX 5600 (NV31) in PIO acc mode; 1979 * GeForce2 MX400 (NV11), GeForce4 MX440 (NV18), GeForceFX 5200 (NV34) can do 1980 * 16368/8184/8184/5456/4092, so a bit better in PIO acc mode; 1981 * confirmed for: 1982 * GeForce2 MX400 (NV11), GeForce4 MX440 (NV18), GeForcePCX 5750 (NV36), 1983 * GeForcePCX 6600 GT (NV43) in DMA acc mode; 1984 * GeForce4 Ti4200 (NV28), GeForceFX 5200 (NV34) can do 1985 * 16368/8184/8184/5456/4092, so a bit better in DMA acc mode. */ 1986 switch(target->space) 1987 { 1988 case B_CMAP8: max_acc_width = 16320; break; 1989 case B_RGB15: max_acc_width = 8160; break; 1990 case B_RGB16: max_acc_width = 8160; break; 1991 case B_RGB24: max_acc_width = 5440; break; 1992 case B_RGB32: max_acc_width = 4080; break; 1993 default: 1994 LOG(8,("INIT: unknown color space: 0x%08x\n", target->space)); 1995 return B_ERROR; 1996 } 1997 break; 1998 } 1999 2000 /* set virtual_width limit for unaccelerated modes */ 2001 switch (si->ps.card_type) 2002 { 2003 default: 2004 // case NV04: 2005 /* confirmed for: 2006 * TNT1 always; 2007 * TNT2, TNT2-M64, GeForce2 MX400, GeForce4 MX440, GeForce4 Ti4200, 2008 * GeForceFX 5200: if the CRTC1 (and CRTC2) BUFFER register b2 = 0 */ 2009 /* NOTE: 2010 * Unfortunately older cards have a hardware fault that prevents use. 2011 * We need doubled granularity on those to prevent the single top line 2012 * from shifting to the left! 2013 * This is confirmed for TNT2, GeForce2 MX200, GeForce2 MX400. 2014 * Confirmed OK are: 2015 * GeForce4 MX440, GeForce4 Ti4200, GeForceFX 5200. */ 2016 switch(target->space) 2017 { 2018 case B_CMAP8: max_crtc_width = 16368; break; /* 16376 */ 2019 case B_RGB15: max_crtc_width = 8184; break; /* 8188 */ 2020 case B_RGB16: max_crtc_width = 8184; break; /* 8188 */ 2021 case B_RGB24: max_crtc_width = 5456; break; /* 5456 */ 2022 case B_RGB32: max_crtc_width = 4092; break; /* 4094 */ 2023 default: 2024 LOG(8,("INIT: unknown color space: 0x%08x\n", target->space)); 2025 return B_ERROR; 2026 } 2027 break; 2028 // default: 2029 /* confirmed for: 2030 * TNT2, TNT2-M64, GeForce2 MX400, GeForce4 MX440, GeForce4 Ti4200, 2031 * GeForceFX 5200: if the CRTC1 (and CRTC2) BUFFER register b2 = 1 */ 2032 /* switch(target->space) 2033 { 2034 case B_CMAP8: max_crtc_width = 16352; break; 2035 case B_RGB15: max_crtc_width = 8176; break; 2036 case B_RGB16: max_crtc_width = 8176; break; 2037 case B_RGB24: max_crtc_width = 5440; break; 2038 case B_RGB32: max_crtc_width = 4088; break; 2039 default: 2040 LOG(8,("INIT: unknown color space: 0x%08x\n", target->space)); 2041 return B_ERROR; 2042 } 2043 break; 2044 */ } 2045 2046 /* check for acc capability, and adjust mode to adhere to hardware constraints */ 2047 if (max_acc_width <= max_crtc_width) 2048 { 2049 /* check if we can setup this mode with acceleration */ 2050 *acc_mode = true; 2051 /* virtual_width */ 2052 if (target->virtual_width > max_acc_width) *acc_mode = false; 2053 /* virtual_height */ 2054 /* (NV cards can even do more than this(?)... 2055 * but 4096 is confirmed on all cards at max. accelerated width.) */ 2056 if (target->virtual_height > 4096) *acc_mode = false; 2057 2058 /* now check virtual_size based on CRTC constraints */ 2059 if (target->virtual_width > max_crtc_width) target->virtual_width = max_crtc_width; 2060 /* virtual_height: The only constraint here is the cards memory size which is 2061 * checked later on in ProposeMode: virtual_height is adjusted then if needed. 2062 * 'Limiting here' to the variable size that's at least available (uint16). */ 2063 if (target->virtual_height > 65535) target->virtual_height = 65535; 2064 2065 /* OK, now we know that virtual_width is valid, and it's needing no slopspace if 2066 * it was confined above, so we can finally calculate safely if we need slopspace 2067 * for this mode... */ 2068 if (*acc_mode) 2069 { 2070 /* the mode needs to adhere to the largest granularity imposed... */ 2071 if (acc_mask < crtc_mask) 2072 video_pitch = ((target->virtual_width + crtc_mask) & ~crtc_mask); 2073 else 2074 video_pitch = ((target->virtual_width + acc_mask) & ~acc_mask); 2075 } 2076 else /* unaccelerated mode */ 2077 video_pitch = ((target->virtual_width + crtc_mask) & ~crtc_mask); 2078 } 2079 else /* max_acc_width > max_crtc_width */ 2080 { 2081 /* check if we can setup this mode with acceleration */ 2082 *acc_mode = true; 2083 /* (we already know virtual_width will be no problem) */ 2084 /* virtual_height */ 2085 /* (NV cards can even do more than this(?)... 2086 * but 4096 is confirmed on all cards at max. accelerated width.) */ 2087 if (target->virtual_height > 4096) *acc_mode = false; 2088 2089 /* now check virtual_size based on CRTC constraints */ 2090 if (*acc_mode) 2091 { 2092 /* note that max_crtc_width already adheres to crtc_mask */ 2093 if (target->virtual_width > (max_crtc_width & ~acc_mask)) 2094 target->virtual_width = (max_crtc_width & ~acc_mask); 2095 } 2096 else /* unaccelerated mode */ 2097 { 2098 if (target->virtual_width > max_crtc_width) 2099 target->virtual_width = max_crtc_width; 2100 } 2101 /* virtual_height: The only constraint here is the cards memory size which is 2102 * checked later on in ProposeMode: virtual_height is adjusted then if needed. 2103 * 'Limiting here' to the variable size that's at least available (uint16). */ 2104 if (target->virtual_height > 65535) target->virtual_height = 65535; 2105 2106 /* OK, now we know that virtual_width is valid, and it's needing no slopspace if 2107 * it was confined above, so we can finally calculate safely if we need slopspace 2108 * for this mode... */ 2109 if (*acc_mode) 2110 { 2111 /* the mode needs to adhere to the largest granularity imposed... */ 2112 if (acc_mask < crtc_mask) 2113 video_pitch = ((target->virtual_width + crtc_mask) & ~crtc_mask); 2114 else 2115 video_pitch = ((target->virtual_width + acc_mask) & ~acc_mask); 2116 } 2117 else /* unaccelerated mode */ 2118 video_pitch = ((target->virtual_width + crtc_mask) & ~crtc_mask); 2119 } 2120 2121 LOG(2,("INIT: memory pitch will be set to %d pixels for colorspace 0x%08x\n", 2122 video_pitch, target->space)); 2123 if (target->virtual_width != video_pitch) 2124 LOG(2,("INIT: effective mode slopspace is %d pixels\n", 2125 (video_pitch - target->virtual_width))); 2126 2127 /* now calculate bytes_per_row for this mode */ 2128 *bytes_per_row = video_pitch * (depth >> 3); 2129 2130 return B_OK; 2131 } 2132