1 /* Authors: 2 Mark Watson 12/1999, 3 Apsed, 4 Rudolf Cornelissen 10/2002-6/2010 5 tst.. 6 */ 7 8 #define MODULE_BIT 0x00008000 9 10 #include "nv_std.h" 11 12 static status_t test_ram(void); 13 static status_t nvxx_general_powerup (void); 14 static void unlock_card(void); 15 static status_t nv_general_bios_to_powergraphics(void); 16 17 static void nv_dump_configuration_space (void) 18 { 19 #define DUMP_CFG(reg, type) if (si->ps.card_type >= type) do { \ 20 uint32 value = CFGR(reg); \ 21 MSG(("configuration_space 0x%02x %20s 0x%08x\n", \ 22 NVCFG_##reg, #reg, value)); \ 23 } while (0) 24 DUMP_CFG (DEVID, 0); 25 DUMP_CFG (DEVCTRL, 0); 26 DUMP_CFG (CLASS, 0); 27 DUMP_CFG (HEADER, 0); 28 DUMP_CFG (BASE1REGS,0); 29 DUMP_CFG (BASE2FB, 0); 30 DUMP_CFG (BASE3, 0); 31 DUMP_CFG (BASE4, 0); 32 DUMP_CFG (BASE5, 0); 33 DUMP_CFG (BASE6, 0); 34 DUMP_CFG (BASE7, 0); 35 DUMP_CFG (SUBSYSID1,0); 36 DUMP_CFG (ROMBASE, 0); 37 DUMP_CFG (CAPPTR, 0); 38 DUMP_CFG (CFG_1, 0); 39 DUMP_CFG (INTERRUPT,0); 40 DUMP_CFG (SUBSYSID2,0); 41 DUMP_CFG (AGPREF, 0); 42 DUMP_CFG (AGPSTAT, 0); 43 DUMP_CFG (AGPCMD, 0); 44 DUMP_CFG (ROMSHADOW,0); 45 DUMP_CFG (VGA, 0); 46 DUMP_CFG (SCHRATCH, 0); 47 DUMP_CFG (CFG_10, 0); 48 DUMP_CFG (CFG_11, 0); 49 DUMP_CFG (CFG_12, 0); 50 DUMP_CFG (CFG_13, 0); 51 DUMP_CFG (CFG_14, 0); 52 DUMP_CFG (CFG_15, 0); 53 DUMP_CFG (CFG_16, 0); 54 DUMP_CFG (PCIEREF, 0); 55 DUMP_CFG (PCIEDCAP, 0); 56 DUMP_CFG (PCIEDCTST,0); 57 DUMP_CFG (PCIELCAP, 0); 58 DUMP_CFG (PCIELCTST,0); 59 DUMP_CFG (CFG_22, 0); 60 DUMP_CFG (CFG_23, 0); 61 DUMP_CFG (CFG_24, 0); 62 DUMP_CFG (CFG_25, 0); 63 DUMP_CFG (CFG_26, 0); 64 DUMP_CFG (CFG_27, 0); 65 DUMP_CFG (CFG_28, 0); 66 DUMP_CFG (CFG_29, 0); 67 DUMP_CFG (CFG_30, 0); 68 DUMP_CFG (CFG_31, 0); 69 DUMP_CFG (CFG_32, 0); 70 DUMP_CFG (CFG_33, 0); 71 DUMP_CFG (CFG_34, 0); 72 DUMP_CFG (CFG_35, 0); 73 DUMP_CFG (CFG_36, 0); 74 DUMP_CFG (CFG_37, 0); 75 DUMP_CFG (CFG_38, 0); 76 DUMP_CFG (CFG_39, 0); 77 DUMP_CFG (CFG_40, 0); 78 DUMP_CFG (CFG_41, 0); 79 DUMP_CFG (CFG_42, 0); 80 DUMP_CFG (CFG_43, 0); 81 DUMP_CFG (CFG_44, 0); 82 DUMP_CFG (CFG_45, 0); 83 DUMP_CFG (CFG_46, 0); 84 DUMP_CFG (CFG_47, 0); 85 DUMP_CFG (CFG_48, 0); 86 DUMP_CFG (CFG_49, 0); 87 DUMP_CFG (CFG_50, 0); 88 #undef DUMP_CFG 89 } 90 91 status_t nv_general_powerup() 92 { 93 status_t status; 94 95 LOG(1,("POWERUP: Haiku nVidia Accelerant 1.08 running.\n")); 96 97 /* log VBLANK INT usability status */ 98 if (si->ps.int_assigned) 99 LOG(4,("POWERUP: Usable INT assigned to HW; Vblank semaphore enabled\n")); 100 else 101 LOG(4,("POWERUP: No (usable) INT assigned to HW; Vblank semaphore disabled\n")); 102 103 /* preset no laptop */ 104 si->ps.laptop = false; 105 106 /* WARNING: 107 * _adi.name_ and _adi.chipset_ can contain 31 readable characters max.!!! */ 108 109 /* detect card type and power it up */ 110 switch(CFGR(DEVID)) 111 { 112 /* Vendor Nvidia */ 113 case 0x002010de: /* Nvidia TNT1 */ 114 si->ps.card_type = NV04; 115 si->ps.card_arch = NV04A; 116 sprintf(si->adi.name, "Nvidia TNT1"); 117 sprintf(si->adi.chipset, "NV04"); 118 status = nvxx_general_powerup(); 119 break; 120 case 0x002810de: /* Nvidia TNT2 (pro) */ 121 case 0x002910de: /* Nvidia TNT2 Ultra */ 122 case 0x002a10de: /* Nvidia TNT2 */ 123 case 0x002b10de: /* Nvidia TNT2 */ 124 si->ps.card_type = NV05; 125 si->ps.card_arch = NV04A; 126 sprintf(si->adi.name, "Nvidia TNT2"); 127 sprintf(si->adi.chipset, "NV05"); 128 status = nvxx_general_powerup(); 129 break; 130 case 0x002c10de: /* Nvidia Vanta (Lt) */ 131 si->ps.card_type = NV05; 132 si->ps.card_arch = NV04A; 133 sprintf(si->adi.name, "Nvidia Vanta (Lt)"); 134 sprintf(si->adi.chipset, "NV05"); 135 status = nvxx_general_powerup(); 136 break; 137 case 0x002d10de: /* Nvidia TNT2-M64 (Pro) */ 138 si->ps.card_type = NV05M64; 139 si->ps.card_arch = NV04A; 140 sprintf(si->adi.name, "Nvidia TNT2-M64 (Pro)"); 141 sprintf(si->adi.chipset, "NV05 model 64"); 142 status = nvxx_general_powerup(); 143 break; 144 case 0x002e10de: /* Nvidia NV06 Vanta */ 145 case 0x002f10de: /* Nvidia NV06 Vanta */ 146 si->ps.card_type = NV06; 147 si->ps.card_arch = NV04A; 148 sprintf(si->adi.name, "Nvidia Vanta"); 149 sprintf(si->adi.chipset, "NV06"); 150 status = nvxx_general_powerup(); 151 break; 152 case 0x004010de: /* Nvidia Geforce FX 6800 Ultra */ 153 case 0x004110de: /* Nvidia Geforce FX 6800 */ 154 case 0x004210de: /* Nvidia Geforce FX 6800LE */ 155 si->ps.card_type = NV40; 156 si->ps.card_arch = NV40A; 157 sprintf(si->adi.name, "Nvidia Geforce FX 6800"); 158 sprintf(si->adi.chipset, "NV40"); 159 status = nvxx_general_powerup(); 160 break; 161 case 0x004310de: /* Nvidia Geforce 6800 XE */ 162 si->ps.card_type = NV40; 163 si->ps.card_arch = NV40A; 164 sprintf(si->adi.name, "Nvidia Geforce 6800 XE"); 165 sprintf(si->adi.chipset, "NV40"); 166 status = nvxx_general_powerup(); 167 break; 168 case 0x004510de: /* Nvidia Geforce FX 6800 GT */ 169 case 0x004610de: /* Nvidia Geforce FX 6800 GT */ 170 case 0x004710de: /* Nvidia Geforce FX 6800 GS */ 171 case 0x004810de: /* Nvidia Geforce FX 6800 XT */ 172 si->ps.card_type = NV40; 173 si->ps.card_arch = NV40A; 174 sprintf(si->adi.name, "Nvidia Geforce FX 6800"); 175 sprintf(si->adi.chipset, "NV40"); 176 status = nvxx_general_powerup(); 177 break; 178 case 0x004910de: /* Nvidia unknown FX */ 179 si->ps.card_type = NV40; 180 si->ps.card_arch = NV40A; 181 sprintf(si->adi.name, "Nvidia unknown FX"); 182 sprintf(si->adi.chipset, "NV40"); 183 status = nvxx_general_powerup(); 184 break; 185 case 0x004d10de: /* Nvidia Quadro FX 4400 */ 186 case 0x004e10de: /* Nvidia Quadro FX 4000 */ 187 si->ps.card_type = NV40; 188 si->ps.card_arch = NV40A; 189 sprintf(si->adi.name, "Nvidia Quadro FX 4000/4400"); 190 sprintf(si->adi.chipset, "NV40"); 191 status = nvxx_general_powerup(); 192 break; 193 case 0x009110de: /* Nvidia Geforce 7800 GTX PCIe */ 194 case 0x009210de: /* Nvidia Geforce 7800 GT PCIe */ 195 si->ps.card_type = G70; 196 si->ps.card_arch = NV40A; 197 sprintf(si->adi.name, "Nvidia Geforce 7800 GT PCIe"); 198 sprintf(si->adi.chipset, "G70"); 199 status = nvxx_general_powerup(); 200 break; 201 case 0x009810de: /* Nvidia Geforce 7800 Go PCIe */ 202 case 0x009910de: /* Nvidia Geforce 7800 GTX Go PCIe */ 203 si->ps.card_type = G70; 204 si->ps.card_arch = NV40A; 205 si->ps.laptop = true; 206 sprintf(si->adi.name, "Nvidia Geforce 7800 GTX Go PCIe"); 207 sprintf(si->adi.chipset, "G70"); 208 status = nvxx_general_powerup(); 209 break; 210 case 0x009d10de: /* Nvidia Quadro FX 4500 */ 211 si->ps.card_type = G70; 212 si->ps.card_arch = NV40A; 213 sprintf(si->adi.name, "Nvidia Quadro FX 4500"); 214 sprintf(si->adi.chipset, "G70"); 215 status = nvxx_general_powerup(); 216 break; 217 case 0x00a010de: /* Nvidia Aladdin TNT2 */ 218 si->ps.card_type = NV05; 219 si->ps.card_arch = NV04A; 220 sprintf(si->adi.name, "Nvidia Aladdin TNT2"); 221 sprintf(si->adi.chipset, "NV05"); 222 status = nvxx_general_powerup(); 223 break; 224 case 0x00c010de: /* Nvidia Geforce 6800 GS */ 225 si->ps.card_type = NV41; 226 si->ps.card_arch = NV40A; 227 sprintf(si->adi.name, "Nvidia Geforce 6800 GS"); 228 sprintf(si->adi.chipset, "NV41"); 229 status = nvxx_general_powerup(); 230 break; 231 case 0x00c110de: /* Nvidia Geforce FX 6800 */ 232 case 0x00c210de: /* Nvidia Geforce FX 6800LE */ 233 case 0x00c310de: /* Nvidia Geforce FX 6800 XT */ 234 si->ps.card_type = NV41; 235 si->ps.card_arch = NV40A; 236 sprintf(si->adi.name, "Nvidia Geforce FX 6800"); 237 sprintf(si->adi.chipset, "NV41"); 238 status = nvxx_general_powerup(); 239 break; 240 case 0x00c810de: /* Nvidia Geforce FX 6800 Go */ 241 case 0x00c910de: /* Nvidia Geforce FX 6800 Ultra Go */ 242 si->ps.card_type = NV41; 243 si->ps.card_arch = NV40A; 244 si->ps.laptop = true; 245 sprintf(si->adi.name, "Nvidia Geforce FX 6800 Go"); 246 sprintf(si->adi.chipset, "NV41"); 247 status = nvxx_general_powerup(); 248 break; 249 case 0x00cc10de: /* Nvidia Quadro FX 1400 Go */ 250 si->ps.card_type = NV41; 251 si->ps.card_arch = NV40A; 252 si->ps.laptop = true; 253 sprintf(si->adi.name, "Nvidia Quadro FX 1400 Go"); 254 sprintf(si->adi.chipset, "NV41"); 255 status = nvxx_general_powerup(); 256 break; 257 case 0x00cd10de: /* Nvidia Quadro FX 3450/4000 SDI */ 258 si->ps.card_type = NV41; 259 si->ps.card_arch = NV40A; 260 sprintf(si->adi.name, "Nvidia Quadro FX 3450/4000 SDI"); 261 sprintf(si->adi.chipset, "NV41"); 262 status = nvxx_general_powerup(); 263 break; 264 case 0x00ce10de: /* Nvidia Quadro FX 1400 */ 265 si->ps.card_type = NV41; 266 si->ps.card_arch = NV40A; 267 sprintf(si->adi.name, "Nvidia Quadro FX 1400"); 268 sprintf(si->adi.chipset, "NV41"); 269 status = nvxx_general_powerup(); 270 break; 271 case 0x00f010de: /* Nvidia Geforce FX 6800 (Ultra) AGP(?) */ 272 si->ps.card_type = NV40; 273 si->ps.card_arch = NV40A; 274 sprintf(si->adi.name, "Nvidia Geforce FX 6800 AGP(?)"); 275 sprintf(si->adi.chipset, "NV40(?)"); 276 status = nvxx_general_powerup(); 277 break; 278 case 0x00f110de: /* Nvidia Geforce FX 6600 GT AGP */ 279 case 0x00f210de: /* Nvidia Geforce FX 6600 AGP */ 280 si->ps.card_type = NV43; 281 si->ps.card_arch = NV40A; 282 sprintf(si->adi.name, "Nvidia Geforce FX 6600 (GT) AGP"); 283 sprintf(si->adi.chipset, "NV43"); 284 status = nvxx_general_powerup(); 285 break; 286 case 0x00f310de: /* Nvidia Geforce 6200 */ 287 si->ps.card_type = NV44; 288 si->ps.card_arch = NV40A; 289 sprintf(si->adi.name, "Nvidia Geforce 6200"); 290 sprintf(si->adi.chipset, "NV44"); 291 status = nvxx_general_powerup(); 292 break; 293 case 0x00f410de: /* Nvidia Geforce 6600 LE */ 294 si->ps.card_type = NV43; 295 si->ps.card_arch = NV40A; 296 sprintf(si->adi.name, "Nvidia Geforce 6600 LE"); 297 sprintf(si->adi.chipset, "NV43"); 298 status = nvxx_general_powerup(); 299 break; 300 case 0x00f510de: /* Nvidia Geforce FX 7800 GS AGP */ 301 si->ps.card_type = G70; 302 si->ps.card_arch = NV40A; 303 sprintf(si->adi.name, "Nvidia Geforce 7800 GS AGP"); 304 sprintf(si->adi.chipset, "G70"); 305 status = nvxx_general_powerup(); 306 break; 307 case 0x00f610de: /* Nvidia Geforce 6800 GS */ 308 si->ps.card_type = NV43; 309 si->ps.card_arch = NV40A; 310 sprintf(si->adi.name, "Nvidia Geforce 6800 GS"); 311 sprintf(si->adi.chipset, "NV43"); 312 status = nvxx_general_powerup(); 313 break; 314 case 0x00f810de: /* Nvidia Quadro FX 3400/4400 PCIe */ 315 si->ps.card_type = NV45; 316 si->ps.card_arch = NV40A; 317 sprintf(si->adi.name, "Nvidia Quadro FX 3400 PCIe"); 318 sprintf(si->adi.chipset, "NV45"); 319 status = nvxx_general_powerup(); 320 break; 321 case 0x00f910de: /* Nvidia Geforce PCX 6800 PCIe */ 322 si->ps.card_type = NV45; 323 si->ps.card_arch = NV40A; 324 sprintf(si->adi.name, "Nvidia Geforce PCX 6800 PCIe"); 325 sprintf(si->adi.chipset, "NV45"); 326 status = nvxx_general_powerup(); 327 break; 328 case 0x00fa10de: /* Nvidia Geforce PCX 5750 PCIe */ 329 si->ps.card_type = NV36; 330 si->ps.card_arch = NV30A; 331 sprintf(si->adi.name, "Nvidia Geforce PCX 5750 PCIe"); 332 sprintf(si->adi.chipset, "NV36"); 333 status = nvxx_general_powerup(); 334 break; 335 case 0x00fb10de: /* Nvidia Geforce PCX 5900 PCIe */ 336 si->ps.card_type = NV35; 337 si->ps.card_arch = NV30A; 338 sprintf(si->adi.name, "Nvidia Geforce PCX 5900 PCIe"); 339 sprintf(si->adi.chipset, "NV35(?)"); 340 status = nvxx_general_powerup(); 341 break; 342 case 0x00fc10de: /* Nvidia Geforce PCX 5300 PCIe */ 343 si->ps.card_type = NV34; 344 si->ps.card_arch = NV30A; 345 sprintf(si->adi.name, "Nvidia Geforce PCX 5300 PCIe"); 346 sprintf(si->adi.chipset, "NV34"); 347 status = nvxx_general_powerup(); 348 break; 349 case 0x00fd10de: /* Nvidia Quadro PCX PCIe */ 350 si->ps.card_type = NV45; 351 si->ps.card_arch = NV40A; 352 sprintf(si->adi.name, "Nvidia Quadro PCX PCIe"); 353 sprintf(si->adi.chipset, "NV45"); 354 status = nvxx_general_powerup(); 355 break; 356 case 0x00fe10de: /* Nvidia Quadro FX 1300 PCIe(?) */ 357 si->ps.card_type = NV36; 358 si->ps.card_arch = NV30A; 359 sprintf(si->adi.name, "Nvidia Quadro FX 1300 PCIe(?)"); 360 sprintf(si->adi.chipset, "NV36(?)"); 361 status = nvxx_general_powerup(); 362 break; 363 case 0x00ff10de: /* Nvidia Geforce PCX 4300 PCIe */ 364 si->ps.card_type = NV18; 365 si->ps.card_arch = NV10A; 366 sprintf(si->adi.name, "Nvidia Geforce PCX 4300 PCIe"); 367 sprintf(si->adi.chipset, "NV18"); 368 status = nvxx_general_powerup(); 369 break; 370 case 0x010010de: /* Nvidia Geforce256 SDR */ 371 case 0x010110de: /* Nvidia Geforce256 DDR */ 372 case 0x010210de: /* Nvidia Geforce256 Ultra */ 373 si->ps.card_type = NV10; 374 si->ps.card_arch = NV10A; 375 sprintf(si->adi.name, "Nvidia Geforce256"); 376 sprintf(si->adi.chipset, "NV10"); 377 status = nvxx_general_powerup(); 378 break; 379 case 0x010310de: /* Nvidia Quadro */ 380 si->ps.card_type = NV10; 381 si->ps.card_arch = NV10A; 382 sprintf(si->adi.name, "Nvidia Quadro"); 383 sprintf(si->adi.chipset, "NV10"); 384 status = nvxx_general_powerup(); 385 break; 386 case 0x011010de: /* Nvidia Geforce2 MX/MX400 */ 387 case 0x011110de: /* Nvidia Geforce2 MX100/MX200 DDR */ 388 si->ps.card_type = NV11; 389 si->ps.card_arch = NV10A; 390 sprintf(si->adi.name, "Nvidia Geforce2 MX"); 391 sprintf(si->adi.chipset, "NV11"); 392 status = nvxx_general_powerup(); 393 break; 394 case 0x011210de: /* Nvidia Geforce2 Go */ 395 si->ps.card_type = NV11; 396 si->ps.card_arch = NV10A; 397 si->ps.laptop = true; 398 sprintf(si->adi.name, "Nvidia Geforce2 Go"); 399 sprintf(si->adi.chipset, "NV11"); 400 status = nvxx_general_powerup(); 401 break; 402 case 0x011310de: /* Nvidia Quadro2 MXR/EX/Go */ 403 si->ps.card_type = NV11; 404 si->ps.card_arch = NV10A; 405 sprintf(si->adi.name, "Nvidia Quadro2 MXR/EX/Go"); 406 sprintf(si->adi.chipset, "NV11"); 407 status = nvxx_general_powerup(); 408 break; 409 case 0x014010de: /* Nvidia Geforce FX 6600 GT */ 410 case 0x014110de: /* Nvidia Geforce FX 6600 */ 411 case 0x014210de: /* Nvidia Geforce FX 6600LE */ 412 si->ps.card_type = NV43; 413 si->ps.card_arch = NV40A; 414 sprintf(si->adi.name, "Nvidia Geforce FX 6600"); 415 sprintf(si->adi.chipset, "NV43"); 416 status = nvxx_general_powerup(); 417 break; 418 case 0x014310de: /* Nvidia Geforce 6600 VE */ 419 si->ps.card_type = NV43; 420 si->ps.card_arch = NV40A; 421 sprintf(si->adi.name, "Nvidia Geforce 6600 VE"); 422 sprintf(si->adi.chipset, "NV43"); 423 status = nvxx_general_powerup(); 424 break; 425 case 0x014410de: /* Nvidia Geforce FX 6600 Go */ 426 si->ps.card_type = NV43; 427 si->ps.card_arch = NV40A; 428 si->ps.laptop = true; 429 sprintf(si->adi.name, "Nvidia Geforce FX 6600 Go"); 430 sprintf(si->adi.chipset, "NV43"); 431 status = nvxx_general_powerup(); 432 break; 433 case 0x014510de: /* Nvidia Geforce FX 6610 XL */ 434 si->ps.card_type = NV43; 435 si->ps.card_arch = NV40A; 436 sprintf(si->adi.name, "Nvidia Geforce FX 6610 XL"); 437 sprintf(si->adi.chipset, "NV43"); 438 status = nvxx_general_powerup(); 439 break; 440 case 0x014710de: /* Nvidia Geforce FX 6700 XL */ 441 si->ps.card_type = NV43; 442 si->ps.card_arch = NV40A; 443 sprintf(si->adi.name, "Nvidia Geforce FX 6700 XL"); 444 sprintf(si->adi.chipset, "NV43"); 445 status = nvxx_general_powerup(); 446 break; 447 case 0x014610de: /* Nvidia Geforce FX 6600 TE Go / 6200 TE Go */ 448 case 0x014810de: /* Nvidia Geforce FX 6600 Go */ 449 case 0x014910de: /* Nvidia Geforce FX 6600 GT Go */ 450 si->ps.card_type = NV43; 451 si->ps.card_arch = NV40A; 452 si->ps.laptop = true; 453 sprintf(si->adi.name, "Nvidia Geforce FX 6600Go/6200Go"); 454 sprintf(si->adi.chipset, "NV43"); 455 status = nvxx_general_powerup(); 456 break; 457 case 0x014b10de: /* Nvidia unknown FX */ 458 case 0x014c10de: /* Nvidia Quadro FX 540 MXM */ 459 case 0x014d10de: /* Nvidia unknown FX */ 460 si->ps.card_type = NV43; 461 si->ps.card_arch = NV40A; 462 sprintf(si->adi.name, "Nvidia Quadro FX"); 463 sprintf(si->adi.chipset, "NV43"); 464 status = nvxx_general_powerup(); 465 break; 466 case 0x014e10de: /* Nvidia Quadro FX 540 */ 467 si->ps.card_type = NV43; 468 si->ps.card_arch = NV40A; 469 sprintf(si->adi.name, "Nvidia Quadro FX 540"); 470 sprintf(si->adi.chipset, "NV43"); 471 status = nvxx_general_powerup(); 472 break; 473 case 0x014f10de: /* Nvidia Geforce 6200 PCIe (128Mb) */ 474 si->ps.card_type = NV44; 475 si->ps.card_arch = NV40A; 476 sprintf(si->adi.name, "Nvidia Geforce 6200 PCIe 128Mb"); 477 sprintf(si->adi.chipset, "NV44"); 478 status = nvxx_general_powerup(); 479 break; 480 case 0x015010de: /* Nvidia Geforce2 GTS/Pro */ 481 case 0x015110de: /* Nvidia Geforce2 Ti DDR */ 482 case 0x015210de: /* Nvidia Geforce2 Ultra */ 483 si->ps.card_type = NV15; 484 si->ps.card_arch = NV10A; 485 sprintf(si->adi.name, "Nvidia Geforce2"); 486 sprintf(si->adi.chipset, "NV15"); 487 status = nvxx_general_powerup(); 488 break; 489 case 0x015310de: /* Nvidia Quadro2 Pro */ 490 si->ps.card_type = NV15; 491 si->ps.card_arch = NV10A; 492 sprintf(si->adi.name, "Nvidia Quadro2 Pro"); 493 sprintf(si->adi.chipset, "NV15"); 494 status = nvxx_general_powerup(); 495 break; 496 case 0x016010de: /* Nvidia Geforce 6500 Go */ 497 si->ps.card_type = NV44; 498 si->ps.card_arch = NV40A; 499 si->ps.laptop = true; 500 sprintf(si->adi.name, "Nvidia Geforce 6500 Go"); 501 sprintf(si->adi.chipset, "NV44"); 502 status = nvxx_general_powerup(); 503 break; 504 case 0x016110de: /* Nvidia Geforce 6200 TurboCache */ 505 si->ps.card_type = NV44; 506 si->ps.card_arch = NV40A; 507 sprintf(si->adi.name, "Nvidia Geforce 6200 TC"); 508 sprintf(si->adi.chipset, "NV44"); 509 status = nvxx_general_powerup(); 510 break; 511 case 0x016210de: /* Nvidia Geforce 6200SE TurboCache */ 512 si->ps.card_type = NV44; 513 si->ps.card_arch = NV40A; 514 sprintf(si->adi.name, "Nvidia Geforce 6200SE TC"); 515 sprintf(si->adi.chipset, "NV44"); 516 status = nvxx_general_powerup(); 517 break; 518 case 0x016310de: /* Nvidia Geforce 6200LE */ 519 si->ps.card_type = NV44; 520 si->ps.card_arch = NV40A; 521 sprintf(si->adi.name, "Nvidia Geforce 6200LE"); 522 sprintf(si->adi.chipset, "NV44"); 523 status = nvxx_general_powerup(); 524 break; 525 case 0x016410de: /* Nvidia Geforce FX 6200 Go */ 526 si->ps.card_type = NV44; 527 si->ps.card_arch = NV40A; 528 si->ps.laptop = true; 529 sprintf(si->adi.name, "Nvidia Geforce FX 6200 Go"); 530 sprintf(si->adi.chipset, "NV44"); 531 status = nvxx_general_powerup(); 532 break; 533 case 0x016510de: /* Nvidia Quadro FX NVS 285 */ 534 si->ps.card_type = NV44; 535 si->ps.card_arch = NV40A; 536 sprintf(si->adi.name, "Nvidia Quadro FX NVS 285"); 537 sprintf(si->adi.chipset, "NV44"); 538 status = nvxx_general_powerup(); 539 break; 540 case 0x016610de: /* Nvidia Geforce 6400 Go */ 541 si->ps.card_type = NV44; 542 si->ps.card_arch = NV40A; 543 si->ps.laptop = true; 544 sprintf(si->adi.name, "Nvidia Geforce 6400 Go"); 545 sprintf(si->adi.chipset, "NV44"); 546 status = nvxx_general_powerup(); 547 break; 548 case 0x016710de: /* Nvidia Geforce 6200 Go */ 549 si->ps.card_type = NV44; 550 si->ps.card_arch = NV40A; 551 si->ps.laptop = true; 552 sprintf(si->adi.name, "Nvidia Geforce 6200 Go"); 553 sprintf(si->adi.chipset, "NV44"); 554 status = nvxx_general_powerup(); 555 break; 556 case 0x016810de: /* Nvidia Geforce 6400 Go */ 557 si->ps.card_type = NV44; 558 si->ps.card_arch = NV40A; 559 si->ps.laptop = true; 560 sprintf(si->adi.name, "Nvidia Geforce 6400 Go"); 561 sprintf(si->adi.chipset, "NV44"); 562 status = nvxx_general_powerup(); 563 break; 564 case 0x016910de: /* Nvidia Geforce 6250 Go */ 565 si->ps.card_type = NV44; 566 si->ps.card_arch = NV40A; 567 si->ps.laptop = true; 568 sprintf(si->adi.name, "Nvidia Geforce 6250 Go"); 569 sprintf(si->adi.chipset, "NV44"); 570 status = nvxx_general_powerup(); 571 break; 572 case 0x016a10de: /* Nvidia 7100 GS */ 573 si->ps.card_type = NV44; 574 si->ps.card_arch = NV40A; 575 sprintf(si->adi.name, "Nvidia Geforce 7100 GS"); 576 sprintf(si->adi.chipset, "NV44"); 577 status = nvxx_general_powerup(); 578 break; 579 case 0x016b10de: /* Nvidia unknown FX Go */ 580 case 0x016c10de: /* Nvidia unknown FX Go */ 581 case 0x016d10de: /* Nvidia unknown FX Go */ 582 si->ps.card_type = NV44; 583 si->ps.card_arch = NV40A; 584 si->ps.laptop = true; 585 sprintf(si->adi.name, "Nvidia unknown FX Go"); 586 sprintf(si->adi.chipset, "NV44"); 587 status = nvxx_general_powerup(); 588 break; 589 case 0x016e10de: /* Nvidia unknown FX */ 590 si->ps.card_type = NV44; 591 si->ps.card_arch = NV40A; 592 sprintf(si->adi.name, "Nvidia unknown FX"); 593 sprintf(si->adi.chipset, "NV44"); 594 status = nvxx_general_powerup(); 595 break; 596 case 0x017010de: /* Nvidia Geforce4 MX 460 */ 597 case 0x017110de: /* Nvidia Geforce4 MX 440 */ 598 case 0x017210de: /* Nvidia Geforce4 MX 420 */ 599 case 0x017310de: /* Nvidia Geforce4 MX 440SE */ 600 si->ps.card_type = NV17; 601 si->ps.card_arch = NV10A; 602 sprintf(si->adi.name, "Nvidia Geforce4 MX"); 603 sprintf(si->adi.chipset, "NV17"); 604 status = nvxx_general_powerup(); 605 break; 606 case 0x017410de: /* Nvidia Geforce4 440 Go */ 607 case 0x017510de: /* Nvidia Geforce4 420 Go */ 608 case 0x017610de: /* Nvidia Geforce4 420 Go 32M */ 609 case 0x017710de: /* Nvidia Geforce4 460 Go */ 610 case 0x017910de: /* Nvidia Geforce4 440 Go 64M (on PPC Geforce4 MX) */ 611 si->ps.card_type = NV17; 612 si->ps.card_arch = NV10A; 613 si->ps.laptop = true; 614 sprintf(si->adi.name, "Nvidia Geforce4 Go"); 615 sprintf(si->adi.chipset, "NV17"); 616 status = nvxx_general_powerup(); 617 break; 618 case 0x017810de: /* Nvidia Quadro4 500 XGL/550 XGL */ 619 case 0x017a10de: /* Nvidia Quadro4 200 NVS/400 NVS */ 620 si->ps.card_type = NV17; 621 si->ps.card_arch = NV10A; 622 sprintf(si->adi.name, "Nvidia Quadro4"); 623 sprintf(si->adi.chipset, "NV17"); 624 status = nvxx_general_powerup(); 625 break; 626 case 0x017c10de: /* Nvidia Quadro4 500 GoGL */ 627 si->ps.card_type = NV17; 628 si->ps.card_arch = NV10A; 629 si->ps.laptop = true; 630 sprintf(si->adi.name, "Nvidia Quadro4 500 GoGL"); 631 sprintf(si->adi.chipset, "NV17"); 632 status = nvxx_general_powerup(); 633 break; 634 case 0x017d10de: /* Nvidia Geforce4 410 Go 16M*/ 635 si->ps.card_type = NV17; 636 si->ps.card_arch = NV10A; 637 si->ps.laptop = true; 638 sprintf(si->adi.name, "Nvidia Geforce4 410 Go"); 639 sprintf(si->adi.chipset, "NV17"); 640 status = nvxx_general_powerup(); 641 break; 642 case 0x018110de: /* Nvidia Geforce4 MX 440 AGP8X */ 643 case 0x018210de: /* Nvidia Geforce4 MX 440SE AGP8X */ 644 case 0x018310de: /* Nvidia Geforce4 MX 420 AGP8X */ 645 case 0x018510de: /* Nvidia Geforce4 MX 4000 AGP8X */ 646 si->ps.card_type = NV18; 647 si->ps.card_arch = NV10A; 648 sprintf(si->adi.name, "Nvidia Geforce4 MX AGP8X"); 649 sprintf(si->adi.chipset, "NV18"); 650 status = nvxx_general_powerup(); 651 break; 652 case 0x018610de: /* Nvidia Geforce4 448 Go */ 653 case 0x018710de: /* Nvidia Geforce4 488 Go */ 654 si->ps.card_type = NV18; 655 si->ps.card_arch = NV10A; 656 si->ps.laptop = true; 657 sprintf(si->adi.name, "Nvidia Geforce4 Go"); 658 sprintf(si->adi.chipset, "NV18"); 659 status = nvxx_general_powerup(); 660 break; 661 case 0x018810de: /* Nvidia Quadro4 580 XGL */ 662 si->ps.card_type = NV18; 663 si->ps.card_arch = NV10A; 664 sprintf(si->adi.name, "Nvidia Quadro4"); 665 sprintf(si->adi.chipset, "NV18"); 666 status = nvxx_general_powerup(); 667 break; 668 case 0x018910de: /* Nvidia Geforce4 MX AGP8X (PPC) */ 669 si->ps.card_type = NV18; 670 si->ps.card_arch = NV10A; 671 sprintf(si->adi.name, "Nvidia Geforce4 MX AGP8X"); 672 sprintf(si->adi.chipset, "NV18"); 673 status = nvxx_general_powerup(); 674 break; 675 case 0x018a10de: /* Nvidia Quadro4 280 NVS AGP8X */ 676 case 0x018b10de: /* Nvidia Quadro4 380 XGL */ 677 case 0x018c10de: /* Nvidia Quadro4 NVS 50 PCI */ 678 si->ps.card_type = NV18; 679 si->ps.card_arch = NV10A; 680 sprintf(si->adi.name, "Nvidia Quadro4"); 681 sprintf(si->adi.chipset, "NV18"); 682 status = nvxx_general_powerup(); 683 break; 684 case 0x018d10de: /* Nvidia Geforce4 448 Go */ 685 si->ps.card_type = NV18; 686 si->ps.card_arch = NV10A; 687 si->ps.laptop = true; 688 sprintf(si->adi.name, "Nvidia Geforce4 Go"); 689 sprintf(si->adi.chipset, "NV18"); 690 status = nvxx_general_powerup(); 691 break; 692 case 0x01a010de: /* Nvidia Geforce2 Integrated GPU */ 693 si->ps.card_type = NV11; 694 si->ps.card_arch = NV10A; 695 sprintf(si->adi.name, "Nvidia Geforce2 Integrated GPU"); 696 sprintf(si->adi.chipset, "CRUSH, NV11"); 697 status = nvxx_general_powerup(); 698 break; 699 case 0x01d110de: /* Nvidia Geforce 7300 LE */ 700 case 0x01d310de: /* Nvidia Geforce 7300 SE */ 701 case 0x01df10de: /* Nvidia Geforce 7300 GS */ 702 si->ps.card_type = G72; 703 si->ps.card_arch = NV40A; 704 sprintf(si->adi.name, "Nvidia Geforce 7300"); 705 sprintf(si->adi.chipset, "G72"); 706 status = nvxx_general_powerup(); 707 break; 708 case 0x01d710de: /* Nvidia Quadro NVS 110M/Geforce 7300 Go */ 709 si->ps.card_type = G72; 710 si->ps.card_arch = NV40A; 711 si->ps.laptop = true; 712 sprintf(si->adi.name, "Nvidia Quadro NVS M/GF 7300 Go"); 713 sprintf(si->adi.chipset, "G72"); 714 status = nvxx_general_powerup(); 715 break; 716 case 0x01d810de: /* Nvidia Geforce 7400 Go */ 717 si->ps.card_type = G72; 718 si->ps.card_arch = NV40A; 719 si->ps.laptop = true; 720 sprintf(si->adi.name, "Nvidia Geforce 7400 Go"); 721 sprintf(si->adi.chipset, "G72"); 722 status = nvxx_general_powerup(); 723 break; 724 case 0x01dd10de: /* Nvidia Geforce 7500 LE */ 725 si->ps.card_type = G72; 726 si->ps.card_arch = NV40A; 727 sprintf(si->adi.name, "Nvidia Geforce 7500 LE"); 728 sprintf(si->adi.chipset, "G72"); 729 status = nvxx_general_powerup(); 730 break; 731 case 0x01f010de: /* Nvidia Geforce4 MX Integrated GPU */ 732 si->ps.card_type = NV17; 733 si->ps.card_arch = NV10A; 734 sprintf(si->adi.name, "Nvidia Geforce4 MX Integr. GPU"); 735 sprintf(si->adi.chipset, "NFORCE2, NV17"); 736 status = nvxx_general_powerup(); 737 break; 738 case 0x020010de: /* Nvidia Geforce3 */ 739 case 0x020110de: /* Nvidia Geforce3 Ti 200 */ 740 case 0x020210de: /* Nvidia Geforce3 Ti 500 */ 741 si->ps.card_type = NV20; 742 si->ps.card_arch = NV20A; 743 sprintf(si->adi.name, "Nvidia Geforce3"); 744 sprintf(si->adi.chipset, "NV20"); 745 status = nvxx_general_powerup(); 746 break; 747 case 0x020310de: /* Nvidia Quadro DCC */ 748 si->ps.card_type = NV20; 749 si->ps.card_arch = NV20A; 750 sprintf(si->adi.name, "Nvidia Quadro DCC"); 751 sprintf(si->adi.chipset, "NV20"); 752 status = nvxx_general_powerup(); 753 break; 754 case 0x021110de: /* Nvidia Geforce FX 6800 */ 755 case 0x021210de: /* Nvidia Geforce FX 6800LE */ 756 case 0x021510de: /* Nvidia Geforce FX 6800 GT */ 757 si->ps.card_type = NV45; /* NV48 is NV45 with 512Mb */ 758 si->ps.card_arch = NV40A; 759 sprintf(si->adi.name, "Nvidia Geforce FX 6800"); 760 sprintf(si->adi.chipset, "NV48"); 761 status = nvxx_general_powerup(); 762 break; 763 case 0x021810de: /* Nvidia Geforce 6800 XT */ 764 si->ps.card_type = NV40; 765 si->ps.card_arch = NV40A; 766 sprintf(si->adi.name, "Nvidia Geforce 6800 XT"); 767 sprintf(si->adi.chipset, "NV40"); 768 status = nvxx_general_powerup(); 769 break; 770 case 0x022010de: /* Nvidia unknown FX */ 771 si->ps.card_type = NV44; 772 si->ps.card_arch = NV40A; 773 sprintf(si->adi.name, "Nvidia unknown FX"); 774 sprintf(si->adi.chipset, "NV44"); 775 status = nvxx_general_powerup(); 776 break; 777 case 0x022110de: /* Nvidia Geforce 6200 AGP (256Mb - 128bit) */ 778 si->ps.card_type = NV44; 779 si->ps.card_arch = NV40A; 780 sprintf(si->adi.name, "Nvidia Geforce 6200 AGP 256Mb"); 781 sprintf(si->adi.chipset, "NV44"); 782 status = nvxx_general_powerup(); 783 break; 784 case 0x022210de: /* Nvidia unknown FX */ 785 si->ps.card_type = NV44; 786 si->ps.card_arch = NV40A; 787 sprintf(si->adi.name, "Nvidia unknown FX"); 788 sprintf(si->adi.chipset, "NV44"); 789 status = nvxx_general_powerup(); 790 break; 791 case 0x022810de: /* Nvidia unknown FX Go */ 792 si->ps.card_type = NV44; 793 si->ps.card_arch = NV40A; 794 si->ps.laptop = true; 795 sprintf(si->adi.name, "Nvidia unknown FX Go"); 796 sprintf(si->adi.chipset, "NV44"); 797 status = nvxx_general_powerup(); 798 break; 799 case 0x024010de: /* Nvidia Geforce 6150 (NFORCE4 Integr.GPU) */ 800 si->ps.card_type = NV44; 801 si->ps.card_arch = NV40A; 802 sprintf(si->adi.name, "Nvidia Geforce 6150, C51PV"); 803 sprintf(si->adi.chipset, "NV44"); 804 status = nvxx_general_powerup(); 805 break; 806 case 0x024110de: /* Nvidia Geforce 6150 LE (NFORCE4 Integr.GPU) */ 807 si->ps.card_type = NV44; 808 si->ps.card_arch = NV40A; 809 sprintf(si->adi.name, "Nvidia Geforce 6150, C51"); 810 sprintf(si->adi.chipset, "NV44"); 811 status = nvxx_general_powerup(); 812 break; 813 case 0x024210de: /* Nvidia Geforce 6100 (NFORCE4 Integr.GPU) */ 814 si->ps.card_type = NV44; 815 si->ps.card_arch = NV40A; 816 sprintf(si->adi.name, "Nvidia Geforce 6100, C51G"); 817 sprintf(si->adi.chipset, "NV44"); 818 status = nvxx_general_powerup(); 819 break; 820 case 0x024410de: /* Nvidia Geforce 6150 Go (NFORCE4 Integr.GPU) */ 821 si->ps.card_type = NV44; 822 si->ps.card_arch = NV40A; 823 si->ps.laptop = true; 824 sprintf(si->adi.name, "Nvidia Geforce 6150 Go, C51"); 825 sprintf(si->adi.chipset, "NV44"); 826 status = nvxx_general_powerup(); 827 break; 828 case 0x024510de: /* Nvidia Quadro NVS 210S / NVIDIA Geforce 6150LE (NFORCE4 Integr.GPU) */ 829 si->ps.card_type = NV44; 830 si->ps.card_arch = NV40A; 831 sprintf(si->adi.name, "Nvidia Geforce 6150, C51"); 832 sprintf(si->adi.chipset, "NV44"); 833 status = nvxx_general_powerup(); 834 break; 835 case 0x024710de: /* Nvidia Geforce 6100 Go (NFORCE4 Integr.GPU) */ 836 si->ps.card_type = NV44; 837 si->ps.card_arch = NV40A; 838 si->ps.laptop = true; 839 sprintf(si->adi.name, "Nvidia Geforce 6100 Go, C51"); 840 sprintf(si->adi.chipset, "NV44"); 841 status = nvxx_general_powerup(); 842 break; 843 case 0x025010de: /* Nvidia Geforce4 Ti 4600 */ 844 case 0x025110de: /* Nvidia Geforce4 Ti 4400 */ 845 case 0x025210de: /* Nvidia Geforce4 Ti 4600 */ 846 case 0x025310de: /* Nvidia Geforce4 Ti 4200 */ 847 si->ps.card_type = NV25; 848 si->ps.card_arch = NV20A; 849 sprintf(si->adi.name, "Nvidia Geforce4 Ti"); 850 sprintf(si->adi.chipset, "NV25"); 851 status = nvxx_general_powerup(); 852 break; 853 case 0x025810de: /* Nvidia Quadro4 900 XGL */ 854 case 0x025910de: /* Nvidia Quadro4 750 XGL */ 855 case 0x025b10de: /* Nvidia Quadro4 700 XGL */ 856 si->ps.card_type = NV25; 857 si->ps.card_arch = NV20A; 858 sprintf(si->adi.name, "Nvidia Quadro4 XGL"); 859 sprintf(si->adi.chipset, "NV25"); 860 status = nvxx_general_powerup(); 861 break; 862 case 0x028010de: /* Nvidia Geforce4 Ti 4800 AGP8X */ 863 case 0x028110de: /* Nvidia Geforce4 Ti 4200 AGP8X */ 864 si->ps.card_type = NV28; 865 si->ps.card_arch = NV20A; 866 sprintf(si->adi.name, "Nvidia Geforce4 Ti AGP8X"); 867 sprintf(si->adi.chipset, "NV28"); 868 status = nvxx_general_powerup(); 869 break; 870 case 0x028210de: /* Nvidia Geforce4 Ti 4800SE */ 871 si->ps.card_type = NV28; 872 si->ps.card_arch = NV20A; 873 sprintf(si->adi.name, "Nvidia Geforce4 Ti 4800SE"); 874 sprintf(si->adi.chipset, "NV28"); 875 status = nvxx_general_powerup(); 876 break; 877 case 0x028610de: /* Nvidia Geforce4 4200 Go */ 878 si->ps.card_type = NV28; 879 si->ps.card_arch = NV20A; 880 si->ps.laptop = true; 881 sprintf(si->adi.name, "Nvidia Geforce4 4200 Go"); 882 sprintf(si->adi.chipset, "NV28"); 883 status = nvxx_general_powerup(); 884 break; 885 case 0x028810de: /* Nvidia Quadro4 980 XGL */ 886 case 0x028910de: /* Nvidia Quadro4 780 XGL */ 887 si->ps.card_type = NV28; 888 si->ps.card_arch = NV20A; 889 sprintf(si->adi.name, "Nvidia Quadro4 XGL"); 890 sprintf(si->adi.chipset, "NV28"); 891 status = nvxx_general_powerup(); 892 break; 893 case 0x028c10de: /* Nvidia Quadro4 700 GoGL */ 894 si->ps.card_type = NV28; 895 si->ps.card_arch = NV20A; 896 si->ps.laptop = true; 897 sprintf(si->adi.name, "Nvidia Quadro4 700 GoGL"); 898 sprintf(si->adi.chipset, "NV28"); 899 status = nvxx_general_powerup(); 900 break; 901 case 0x029010de: /* Nvidia Geforce 7900 GTX */ 902 case 0x029110de: /* Nvidia Geforce 7900 GT */ 903 case 0x029310de: /* Nvidia Geforce 7900 GX2 */ 904 si->ps.card_type = G71; 905 si->ps.card_arch = NV40A; 906 sprintf(si->adi.name, "Nvidia Geforce 7900"); 907 sprintf(si->adi.chipset, "G71"); 908 status = nvxx_general_powerup(); 909 break; 910 case 0x029410de: /* Nvidia Geforce 7950 GX2 */ 911 case 0x029510de: /* Nvidia Geforce 7950 GT */ 912 si->ps.card_type = G71; 913 si->ps.card_arch = NV40A; 914 sprintf(si->adi.name, "Nvidia Geforce 7950"); 915 sprintf(si->adi.chipset, "G71"); 916 status = nvxx_general_powerup(); 917 break; 918 case 0x029810de: /* Nvidia Geforce Go 7900 GS */ 919 case 0x029910de: /* Nvidia Geforce Go 7900 GTX */ 920 si->ps.card_type = G71; 921 si->ps.card_arch = NV40A; 922 si->ps.laptop = true; 923 sprintf(si->adi.name, "Nvidia Geforce Go 7900"); 924 sprintf(si->adi.chipset, "G71"); 925 status = nvxx_general_powerup(); 926 break; 927 case 0x029c10de: /* Nvidia Quadro FX 5500 */ 928 si->ps.card_type = G71; 929 si->ps.card_arch = NV40A; 930 sprintf(si->adi.name, "Nvidia Quadro FX 5500"); 931 sprintf(si->adi.chipset, "G71"); 932 status = nvxx_general_powerup(); 933 break; 934 case 0x029f10de: /* Nvidia Quadro FX 4500 X2 */ 935 si->ps.card_type = G70; 936 si->ps.card_arch = NV40A; 937 sprintf(si->adi.name, "Nvidia Quadro FX 4500 X2"); 938 sprintf(si->adi.chipset, "G70"); 939 status = nvxx_general_powerup(); 940 break; 941 case 0x02a010de: /* Nvidia Geforce3 Integrated GPU */ 942 si->ps.card_type = NV20; 943 si->ps.card_arch = NV20A; 944 sprintf(si->adi.name, "Nvidia Geforce3 Integrated GPU"); 945 sprintf(si->adi.chipset, "XBOX, NV20"); 946 status = nvxx_general_powerup(); 947 break; 948 case 0x02e010de: /* Nvidia Geforce 7600 GT */ 949 case 0x02e110de: /* Nvidia Geforce 7600 GS */ 950 si->ps.card_type = G73; 951 si->ps.card_arch = NV40A; 952 sprintf(si->adi.name, "Nvidia Geforce 7600"); 953 sprintf(si->adi.chipset, "G73"); 954 status = nvxx_general_powerup(); 955 break; 956 case 0x02e210de: /* Nvidia Geforce 7300 GT */ 957 si->ps.card_type = G73; 958 si->ps.card_arch = NV40A; 959 sprintf(si->adi.name, "Nvidia GeForce 7300 GT"); 960 sprintf(si->adi.chipset, "G73"); 961 status = nvxx_general_powerup(); 962 break; 963 case 0x030110de: /* Nvidia Geforce FX 5800 Ultra */ 964 case 0x030210de: /* Nvidia Geforce FX 5800 */ 965 si->ps.card_type = NV30; 966 si->ps.card_arch = NV30A; 967 sprintf(si->adi.name, "Nvidia Geforce FX 5800"); 968 sprintf(si->adi.chipset, "NV30"); 969 status = nvxx_general_powerup(); 970 break; 971 case 0x030810de: /* Nvidia Quadro FX 2000 */ 972 case 0x030910de: /* Nvidia Quadro FX 1000 */ 973 si->ps.card_type = NV30; 974 si->ps.card_arch = NV30A; 975 sprintf(si->adi.name, "Nvidia Quadro FX"); 976 sprintf(si->adi.chipset, "NV30"); 977 status = nvxx_general_powerup(); 978 break; 979 case 0x031110de: /* Nvidia Geforce FX 5600 Ultra */ 980 case 0x031210de: /* Nvidia Geforce FX 5600 */ 981 si->ps.card_type = NV31; 982 si->ps.card_arch = NV30A; 983 sprintf(si->adi.name, "Nvidia Geforce FX 5600"); 984 sprintf(si->adi.chipset, "NV31"); 985 status = nvxx_general_powerup(); 986 break; 987 case 0x031310de: /* Nvidia unknown FX */ 988 si->ps.card_type = NV31; 989 si->ps.card_arch = NV30A; 990 sprintf(si->adi.name, "Nvidia unknown FX"); 991 sprintf(si->adi.chipset, "NV31"); 992 status = nvxx_general_powerup(); 993 break; 994 case 0x031410de: /* Nvidia Geforce FX 5600XT */ 995 si->ps.card_type = NV31; 996 si->ps.card_arch = NV30A; 997 sprintf(si->adi.name, "Nvidia Geforce FX 5600XT"); 998 sprintf(si->adi.chipset, "NV31"); 999 status = nvxx_general_powerup(); 1000 break; 1001 case 0x031610de: /* Nvidia unknown FX Go */ 1002 case 0x031710de: /* Nvidia unknown FX Go */ 1003 si->ps.card_type = NV31; 1004 si->ps.card_arch = NV30A; 1005 si->ps.laptop = true; 1006 sprintf(si->adi.name, "Nvidia unknown FX Go"); 1007 sprintf(si->adi.chipset, "NV31"); 1008 status = nvxx_general_powerup(); 1009 break; 1010 case 0x031a10de: /* Nvidia Geforce FX 5600 Go */ 1011 si->ps.card_type = NV31; 1012 si->ps.card_arch = NV30A; 1013 si->ps.laptop = true; 1014 sprintf(si->adi.name, "Nvidia Geforce FX 5600 Go"); 1015 sprintf(si->adi.chipset, "NV31"); 1016 status = nvxx_general_powerup(); 1017 break; 1018 case 0x031b10de: /* Nvidia Geforce FX 5650 Go */ 1019 si->ps.card_type = NV31; 1020 si->ps.card_arch = NV30A; 1021 si->ps.laptop = true; 1022 sprintf(si->adi.name, "Nvidia Geforce FX 5650 Go"); 1023 sprintf(si->adi.chipset, "NV31"); 1024 status = nvxx_general_powerup(); 1025 break; 1026 case 0x031c10de: /* Nvidia Quadro FX 700 Go */ 1027 si->ps.card_type = NV31; 1028 si->ps.card_arch = NV30A; 1029 si->ps.laptop = true; 1030 sprintf(si->adi.name, "Nvidia Quadro FX 700 Go"); 1031 sprintf(si->adi.chipset, "NV31"); 1032 status = nvxx_general_powerup(); 1033 break; 1034 case 0x031d10de: /* Nvidia unknown FX Go */ 1035 case 0x031e10de: /* Nvidia unknown FX Go */ 1036 case 0x031f10de: /* Nvidia unknown FX Go */ 1037 si->ps.card_type = NV31; 1038 si->ps.card_arch = NV30A; 1039 si->ps.laptop = true; 1040 sprintf(si->adi.name, "Nvidia unknown FX Go"); 1041 sprintf(si->adi.chipset, "NV31"); 1042 status = nvxx_general_powerup(); 1043 break; 1044 case 0x032010de: /* Nvidia Geforce FX 5200 */ 1045 case 0x032110de: /* Nvidia Geforce FX 5200 Ultra */ 1046 case 0x032210de: /* Nvidia Geforce FX 5200 */ 1047 case 0x032310de: /* Nvidia Geforce FX 5200LE */ 1048 si->ps.card_type = NV34; 1049 si->ps.card_arch = NV30A; 1050 sprintf(si->adi.name, "Nvidia Geforce FX 5200"); 1051 sprintf(si->adi.chipset, "NV34"); 1052 status = nvxx_general_powerup(); 1053 break; 1054 case 0x032410de: /* Nvidia Geforce FX 5200 Go */ 1055 si->ps.card_type = NV34; 1056 si->ps.card_arch = NV30A; 1057 si->ps.laptop = true; 1058 sprintf(si->adi.name, "Nvidia Geforce FX 5200 Go"); 1059 sprintf(si->adi.chipset, "NV34"); 1060 status = nvxx_general_powerup(); 1061 break; 1062 case 0x032510de: /* Nvidia Geforce FX 5250 Go */ 1063 si->ps.card_type = NV34; 1064 si->ps.card_arch = NV30A; 1065 si->ps.laptop = true; 1066 sprintf(si->adi.name, "Nvidia Geforce FX 5250 Go"); 1067 sprintf(si->adi.chipset, "NV34"); 1068 status = nvxx_general_powerup(); 1069 break; 1070 case 0x032610de: /* Nvidia Geforce FX 5500 */ 1071 si->ps.card_type = NV34; 1072 si->ps.card_arch = NV30A; 1073 sprintf(si->adi.name, "Nvidia Geforce FX 5500"); 1074 sprintf(si->adi.chipset, "NV34"); 1075 status = nvxx_general_powerup(); 1076 break; 1077 case 0x032710de: /* Nvidia Geforce FX 5100 */ 1078 si->ps.card_type = NV34; 1079 si->ps.card_arch = NV30A; 1080 sprintf(si->adi.name, "Nvidia Geforce FX 5100"); 1081 sprintf(si->adi.chipset, "NV34"); 1082 status = nvxx_general_powerup(); 1083 break; 1084 case 0x032810de: /* Nvidia Geforce FX 5200 Go 32M/64M */ 1085 si->ps.card_type = NV34; 1086 si->ps.card_arch = NV30A; 1087 si->ps.laptop = true; 1088 sprintf(si->adi.name, "Nvidia Geforce FX 5200 Go"); 1089 sprintf(si->adi.chipset, "NV34"); 1090 status = nvxx_general_powerup(); 1091 break; 1092 case 0x032910de: /* Nvidia Geforce FX 5200 (PPC) */ 1093 si->ps.card_type = NV34; 1094 si->ps.card_arch = NV30A; 1095 sprintf(si->adi.name, "Nvidia Geforce FX 5200"); 1096 sprintf(si->adi.chipset, "NV34"); 1097 status = nvxx_general_powerup(); 1098 break; 1099 case 0x032a10de: /* Nvidia Quadro NVS 280 PCI */ 1100 si->ps.card_type = NV34; 1101 si->ps.card_arch = NV30A; 1102 sprintf(si->adi.name, "Nvidia Quadro NVS 280 PCI"); 1103 sprintf(si->adi.chipset, "NV34"); 1104 status = nvxx_general_powerup(); 1105 break; 1106 case 0x032b10de: /* Nvidia Quadro FX 500/600 PCI */ 1107 si->ps.card_type = NV34; 1108 si->ps.card_arch = NV30A; 1109 sprintf(si->adi.name, "Nvidia Quadro FX 500/600 PCI"); 1110 sprintf(si->adi.chipset, "NV34"); 1111 status = nvxx_general_powerup(); 1112 break; 1113 case 0x032c10de: /* Nvidia Geforce FX 5300 Go */ 1114 case 0x032d10de: /* Nvidia Geforce FX 5100 Go */ 1115 si->ps.card_type = NV34; 1116 si->ps.card_arch = NV30A; 1117 si->ps.laptop = true; 1118 sprintf(si->adi.name, "Nvidia Geforce FX Go"); 1119 sprintf(si->adi.chipset, "NV34"); 1120 status = nvxx_general_powerup(); 1121 break; 1122 case 0x032e10de: /* Nvidia unknown FX Go */ 1123 case 0x032f10de: /* Nvidia unknown FX Go */ 1124 si->ps.card_type = NV34; 1125 si->ps.card_arch = NV30A; 1126 si->ps.laptop = true; 1127 sprintf(si->adi.name, "Nvidia unknown FX Go"); 1128 sprintf(si->adi.chipset, "NV34"); 1129 status = nvxx_general_powerup(); 1130 break; 1131 case 0x033010de: /* Nvidia Geforce FX 5900 Ultra */ 1132 case 0x033110de: /* Nvidia Geforce FX 5900 */ 1133 si->ps.card_type = NV35; 1134 si->ps.card_arch = NV30A; 1135 sprintf(si->adi.name, "Nvidia Geforce FX 5900"); 1136 sprintf(si->adi.chipset, "NV35"); 1137 status = nvxx_general_powerup(); 1138 break; 1139 case 0x033210de: /* Nvidia Geforce FX 5900 XT */ 1140 si->ps.card_type = NV35; 1141 si->ps.card_arch = NV30A; 1142 sprintf(si->adi.name, "Nvidia Geforce FX 5900 XT"); 1143 sprintf(si->adi.chipset, "NV35"); 1144 status = nvxx_general_powerup(); 1145 break; 1146 case 0x033310de: /* Nvidia Geforce FX 5950 Ultra */ 1147 si->ps.card_type = NV38; 1148 si->ps.card_arch = NV30A; 1149 sprintf(si->adi.name, "Nvidia Geforce FX 5950 Ultra"); 1150 sprintf(si->adi.chipset, "NV38"); 1151 status = nvxx_general_powerup(); 1152 break; 1153 case 0x033410de: /* Nvidia Geforce FX 5900 ZT */ 1154 si->ps.card_type = NV38; 1155 si->ps.card_arch = NV30A; 1156 sprintf(si->adi.name, "Nvidia Geforce FX 5900 ZT"); 1157 sprintf(si->adi.chipset, "NV38(?)"); 1158 status = nvxx_general_powerup(); 1159 break; 1160 case 0x033810de: /* Nvidia Quadro FX 3000 */ 1161 si->ps.card_type = NV35; 1162 si->ps.card_arch = NV30A; 1163 sprintf(si->adi.name, "Nvidia Quadro FX 3000"); 1164 sprintf(si->adi.chipset, "NV35"); 1165 status = nvxx_general_powerup(); 1166 break; 1167 case 0x033f10de: /* Nvidia Quadro FX 700 */ 1168 si->ps.card_type = NV35; 1169 si->ps.card_arch = NV30A; 1170 sprintf(si->adi.name, "Nvidia Quadro FX 700"); 1171 sprintf(si->adi.chipset, "NV35"); 1172 status = nvxx_general_powerup(); 1173 break; 1174 case 0x034110de: /* Nvidia Geforce FX 5700 Ultra */ 1175 case 0x034210de: /* Nvidia Geforce FX 5700 */ 1176 case 0x034310de: /* Nvidia Geforce FX 5700LE */ 1177 case 0x034410de: /* Nvidia Geforce FX 5700VE */ 1178 si->ps.card_type = NV36; 1179 si->ps.card_arch = NV30A; 1180 sprintf(si->adi.name, "Nvidia Geforce FX 5700"); 1181 sprintf(si->adi.chipset, "NV36"); 1182 status = nvxx_general_powerup(); 1183 break; 1184 case 0x034510de: /* Nvidia unknown FX */ 1185 si->ps.card_type = NV36; 1186 si->ps.card_arch = NV30A; 1187 sprintf(si->adi.name, "Nvidia unknown FX"); 1188 sprintf(si->adi.chipset, "NV36"); 1189 status = nvxx_general_powerup(); 1190 break; 1191 case 0x034710de: /* Nvidia Geforce FX 5700 Go */ 1192 case 0x034810de: /* Nvidia Geforce FX 5700 Go */ 1193 si->ps.card_type = NV36; 1194 si->ps.card_arch = NV30A; 1195 si->ps.laptop = true; 1196 sprintf(si->adi.name, "Nvidia Geforce FX 5700 Go"); 1197 sprintf(si->adi.chipset, "NV36"); 1198 status = nvxx_general_powerup(); 1199 break; 1200 case 0x034910de: /* Nvidia unknown FX Go */ 1201 case 0x034b10de: /* Nvidia unknown FX Go */ 1202 si->ps.card_type = NV36; 1203 si->ps.card_arch = NV30A; 1204 si->ps.laptop = true; 1205 sprintf(si->adi.name, "Nvidia unknown FX Go"); 1206 sprintf(si->adi.chipset, "NV36"); 1207 status = nvxx_general_powerup(); 1208 break; 1209 case 0x034c10de: /* Nvidia Quadro FX 1000 Go */ 1210 si->ps.card_type = NV36; 1211 si->ps.card_arch = NV30A; 1212 si->ps.laptop = true; 1213 sprintf(si->adi.name, "Nvidia Quadro FX 1000 Go"); 1214 sprintf(si->adi.chipset, "NV36"); 1215 status = nvxx_general_powerup(); 1216 break; 1217 case 0x034e10de: /* Nvidia Quadro FX 1100 */ 1218 si->ps.card_type = NV36; 1219 si->ps.card_arch = NV30A; 1220 sprintf(si->adi.name, "Nvidia Quadro FX 1100"); 1221 sprintf(si->adi.chipset, "NV36"); 1222 status = nvxx_general_powerup(); 1223 break; 1224 case 0x034f10de: /* Nvidia unknown FX */ 1225 si->ps.card_type = NV36; 1226 si->ps.card_arch = NV30A; 1227 sprintf(si->adi.name, "Nvidia unknown FX"); 1228 sprintf(si->adi.chipset, "NV36(?)"); 1229 status = nvxx_general_powerup(); 1230 break; 1231 case 0x039110de: /* Nvidia Geforce 7600 GT */ 1232 si->ps.card_type = G73; 1233 si->ps.card_arch = NV40A; 1234 sprintf(si->adi.name, "Nvidia Geforce 7600 GT"); 1235 sprintf(si->adi.chipset, "G73"); 1236 status = nvxx_general_powerup(); 1237 break; 1238 case 0x039210de: /* Nvidia Geforce 7600 GS */ 1239 si->ps.card_type = G73; 1240 si->ps.card_arch = NV40A; 1241 sprintf(si->adi.name, "Nvidia Geforce 7600 GS"); 1242 sprintf(si->adi.chipset, "G73"); 1243 status = nvxx_general_powerup(); 1244 break; 1245 case 0x039310de: /* Nvidia Geforce 7300 GT */ 1246 si->ps.card_type = G73; 1247 si->ps.card_arch = NV40A; 1248 sprintf(si->adi.name, "Nvidia Geforce 7300 GT"); 1249 sprintf(si->adi.chipset, "G73"); 1250 status = nvxx_general_powerup(); 1251 break; 1252 case 0x039410de: /* Nvidia Geforce 7600 LE */ 1253 si->ps.card_type = G70; 1254 si->ps.card_arch = NV40A; 1255 sprintf(si->adi.name, "Nvidia Geforce 7600 LE"); 1256 sprintf(si->adi.chipset, "G70"); 1257 status = nvxx_general_powerup(); 1258 break; 1259 case 0x039810de: /* Nvidia Geforce 7600 GO */ 1260 si->ps.card_type = G73; 1261 si->ps.card_arch = NV40A; 1262 si->ps.laptop = true; 1263 sprintf(si->adi.name, "Nvidia Geforce 7600 GO"); 1264 sprintf(si->adi.chipset, "G73"); 1265 status = nvxx_general_powerup(); 1266 break; 1267 case 0x03d010de: /* Nvidia Geforce 6100 nForce 430 */ 1268 case 0x03d110de: /* Nvidia Geforce 6100 nForce 405 */ 1269 case 0x03d210de: /* Nvidia Geforce 6100 nForce 400 */ 1270 case 0x03d510de: /* Nvidia Geforce 6100 nForce 420 */ 1271 si->ps.card_type = NV44; 1272 si->ps.card_arch = NV40A; 1273 sprintf(si->adi.name, "Nvidia Geforce 6100 nForce, C61"); 1274 sprintf(si->adi.chipset, "NV44"); 1275 status = nvxx_general_powerup(); 1276 break; 1277 case 0x03d610de: /* Nvidia Geforce 7025 nForce 630a */ 1278 si->ps.card_type = NV44; 1279 si->ps.card_arch = NV40A; 1280 sprintf(si->adi.name, "Nvidia Geforce 7025 nForce 630a"); 1281 sprintf(si->adi.chipset, "NV44"); 1282 status = nvxx_general_powerup(); 1283 break; 1284 case 0x07e110de: /* Nvidia Geforce 7100 nForce 630i */ 1285 si->ps.card_type = NV44; 1286 si->ps.card_arch = NV40A; 1287 sprintf(si->adi.name, "Nvidia Geforce 7100 nForce 630i"); 1288 sprintf(si->adi.chipset, "NV44"); 1289 status = nvxx_general_powerup(); 1290 break; 1291 /* Vendor Elsa GmbH */ 1292 case 0x0c601048: /* Elsa Gladiac Geforce2 MX */ 1293 si->ps.card_type = NV11; 1294 si->ps.card_arch = NV10A; 1295 sprintf(si->adi.name, "Elsa Gladiac Geforce2 MX"); 1296 sprintf(si->adi.chipset, "NV11"); 1297 status = nvxx_general_powerup(); 1298 break; 1299 /* Vendor Nvidia STB/SGS-Thompson */ 1300 case 0x002012d2: /* Nvidia STB/SGS-Thompson TNT1 */ 1301 si->ps.card_type = NV04; 1302 si->ps.card_arch = NV04A; 1303 sprintf(si->adi.name, "Nvidia STB/SGS-Thompson TNT1"); 1304 sprintf(si->adi.chipset, "NV04"); 1305 status = nvxx_general_powerup(); 1306 break; 1307 case 0x002812d2: /* Nvidia STB/SGS-Thompson TNT2 (pro) */ 1308 case 0x002912d2: /* Nvidia STB/SGS-Thompson TNT2 Ultra */ 1309 case 0x002a12d2: /* Nvidia STB/SGS-Thompson TNT2 */ 1310 case 0x002b12d2: /* Nvidia STB/SGS-Thompson TNT2 */ 1311 si->ps.card_type = NV05; 1312 si->ps.card_arch = NV04A; 1313 sprintf(si->adi.name, "Nvidia STB/SGS-Thompson TNT2"); 1314 sprintf(si->adi.chipset, "NV05"); 1315 status = nvxx_general_powerup(); 1316 break; 1317 case 0x002c12d2: /* Nvidia STB/SGS-Thompson Vanta (Lt) */ 1318 si->ps.card_type = NV05; 1319 si->ps.card_arch = NV04A; 1320 sprintf(si->adi.name, "Nvidia STB/SGS-Thompson Vanta"); 1321 sprintf(si->adi.chipset, "NV05"); 1322 status = nvxx_general_powerup(); 1323 break; 1324 case 0x002d12d2: /* Nvidia STB/SGS-Thompson TNT2-M64 (Pro) */ 1325 si->ps.card_type = NV05M64; 1326 si->ps.card_arch = NV04A; 1327 sprintf(si->adi.name, "Nvidia STB/SGS-Thompson TNT2M64"); 1328 sprintf(si->adi.chipset, "NV05 model 64"); 1329 status = nvxx_general_powerup(); 1330 break; 1331 case 0x002e12d2: /* Nvidia STB/SGS-Thompson NV06 Vanta */ 1332 case 0x002f12d2: /* Nvidia STB/SGS-Thompson NV06 Vanta */ 1333 si->ps.card_type = NV06; 1334 si->ps.card_arch = NV04A; 1335 sprintf(si->adi.name, "Nvidia STB/SGS-Thompson Vanta"); 1336 sprintf(si->adi.chipset, "NV06"); 1337 status = nvxx_general_powerup(); 1338 break; 1339 case 0x00a012d2: /* Nvidia STB/SGS-Thompson Aladdin TNT2 */ 1340 si->ps.card_type = NV05; 1341 si->ps.card_arch = NV04A; 1342 sprintf(si->adi.name, "Nvidia STB/SGS-Thompson TNT2"); 1343 sprintf(si->adi.chipset, "NV05"); 1344 status = nvxx_general_powerup(); 1345 break; 1346 /* Vendor Varisys Limited */ 1347 case 0x35031888: /* Varisys Geforce4 MX440 */ 1348 si->ps.card_type = NV17; 1349 si->ps.card_arch = NV10A; 1350 sprintf(si->adi.name, "Varisys Geforce4 MX440"); 1351 sprintf(si->adi.chipset, "NV17"); 1352 status = nvxx_general_powerup(); 1353 break; 1354 case 0x35051888: /* Varisys Geforce4 Ti 4200 */ 1355 si->ps.card_type = NV25; 1356 si->ps.card_arch = NV20A; 1357 sprintf(si->adi.name, "Varisys Geforce4 Ti 4200"); 1358 sprintf(si->adi.chipset, "NV25"); 1359 status = nvxx_general_powerup(); 1360 break; 1361 default: 1362 LOG(8,("POWERUP: Failed to detect valid card 0x%08x\n",CFGR(DEVID))); 1363 return B_ERROR; 1364 } 1365 1366 return status; 1367 } 1368 1369 static status_t test_ram() 1370 { 1371 uint32 value, offset; 1372 status_t result = B_OK; 1373 1374 /* make sure we don't corrupt the hardware cursor by using fbc.frame_buffer. */ 1375 if (si->fbc.frame_buffer == NULL) 1376 { 1377 LOG(8,("INIT: test_ram detected NULL pointer.\n")); 1378 return B_ERROR; 1379 } 1380 1381 for (offset = 0, value = 0x55aa55aa; offset < 256; offset++) 1382 { 1383 /* write testpattern to cardRAM */ 1384 ((uint32 *)si->fbc.frame_buffer)[offset] = value; 1385 /* toggle testpattern */ 1386 value = 0xffffffff - value; 1387 } 1388 1389 for (offset = 0, value = 0x55aa55aa; offset < 256; offset++) 1390 { 1391 /* readback and verify testpattern from cardRAM */ 1392 if (((uint32 *)si->fbc.frame_buffer)[offset] != value) result = B_ERROR; 1393 /* toggle testpattern */ 1394 value = 0xffffffff - value; 1395 } 1396 return result; 1397 } 1398 1399 /* NOTE: 1400 * This routine *has* to be done *after* SetDispplayMode has been executed, 1401 * or test results will not be representative! 1402 * (CAS latency is dependant on NV setup on some (DRAM) boards) */ 1403 status_t nv_set_cas_latency() 1404 { 1405 status_t result = B_ERROR; 1406 uint8 latency = 0; 1407 1408 /* check current RAM access to see if we need to change anything */ 1409 if (test_ram() == B_OK) 1410 { 1411 LOG(4,("INIT: RAM access OK.\n")); 1412 return B_OK; 1413 } 1414 1415 /* check if we read PINS at starttime so we have valid registersettings at our disposal */ 1416 if (si->ps.pins_status != B_OK) 1417 { 1418 LOG(4,("INIT: RAM access errors; not fixable: PINS was not read from cardBIOS.\n")); 1419 return B_ERROR; 1420 } 1421 1422 /* OK. We might have a problem, try to fix it now.. */ 1423 LOG(4,("INIT: RAM access errors; tuning CAS latency if prudent...\n")); 1424 1425 switch(si->ps.card_type) 1426 { 1427 default: 1428 LOG(4,("INIT: RAM CAS tuning not implemented for this card, aborting.\n")); 1429 return B_OK; 1430 break; 1431 } 1432 if (result == B_OK) 1433 LOG(4,("INIT: RAM access OK. CAS latency set to %d cycles.\n", latency)); 1434 else 1435 LOG(4,("INIT: RAM access not fixable. CAS latency set to %d cycles.\n", latency)); 1436 1437 return result; 1438 } 1439 1440 void setup_virtualized_heads(bool cross) 1441 { 1442 if (cross) 1443 { 1444 head1_interrupt_enable = (crtc_interrupt_enable) nv_crtc2_interrupt_enable; 1445 head1_update_fifo = (crtc_update_fifo) nv_crtc2_update_fifo; 1446 head1_validate_timing = (crtc_validate_timing) nv_crtc2_validate_timing; 1447 head1_set_timing = (crtc_set_timing) nv_crtc2_set_timing; 1448 head1_depth = (crtc_depth) nv_crtc2_depth; 1449 head1_dpms = (crtc_dpms) nv_crtc2_dpms; 1450 head1_set_display_pitch = (crtc_set_display_pitch) nv_crtc2_set_display_pitch; 1451 head1_set_display_start = (crtc_set_display_start) nv_crtc2_set_display_start; 1452 head1_cursor_init = (crtc_cursor_init) nv_crtc2_cursor_init; 1453 head1_cursor_show = (crtc_cursor_show) nv_crtc2_cursor_show; 1454 head1_cursor_hide = (crtc_cursor_hide) nv_crtc2_cursor_hide; 1455 head1_cursor_define = (crtc_cursor_define) nv_crtc2_cursor_define; 1456 head1_cursor_position = (crtc_cursor_position) nv_crtc2_cursor_position; 1457 head1_stop_tvout = (crtc_stop_tvout) nv_crtc2_stop_tvout; 1458 head1_start_tvout = (crtc_start_tvout) nv_crtc2_start_tvout; 1459 1460 head1_mode = (dac_mode) nv_dac2_mode; 1461 head1_palette = (dac_palette) nv_dac2_palette; 1462 head1_set_pix_pll = (dac_set_pix_pll) nv_dac2_set_pix_pll; 1463 head1_pix_pll_find = (dac_pix_pll_find) nv_dac2_pix_pll_find; 1464 1465 head2_interrupt_enable = (crtc_interrupt_enable) nv_crtc_interrupt_enable; 1466 head2_update_fifo = (crtc_update_fifo) nv_crtc_update_fifo; 1467 head2_validate_timing = (crtc_validate_timing) nv_crtc_validate_timing; 1468 head2_set_timing = (crtc_set_timing) nv_crtc_set_timing; 1469 head2_depth = (crtc_depth) nv_crtc_depth; 1470 head2_dpms = (crtc_dpms) nv_crtc_dpms; 1471 head2_set_display_pitch = (crtc_set_display_pitch) nv_crtc_set_display_pitch; 1472 head2_set_display_start = (crtc_set_display_start) nv_crtc_set_display_start; 1473 head2_cursor_init = (crtc_cursor_init) nv_crtc_cursor_init; 1474 head2_cursor_show = (crtc_cursor_show) nv_crtc_cursor_show; 1475 head2_cursor_hide = (crtc_cursor_hide) nv_crtc_cursor_hide; 1476 head2_cursor_define = (crtc_cursor_define) nv_crtc_cursor_define; 1477 head2_cursor_position = (crtc_cursor_position) nv_crtc_cursor_position; 1478 head2_stop_tvout = (crtc_stop_tvout) nv_crtc_stop_tvout; 1479 head2_start_tvout = (crtc_start_tvout) nv_crtc_start_tvout; 1480 1481 head2_mode = (dac_mode) nv_dac_mode; 1482 head2_palette = (dac_palette) nv_dac_palette; 1483 head2_set_pix_pll = (dac_set_pix_pll) nv_dac_set_pix_pll; 1484 head2_pix_pll_find = (dac_pix_pll_find) nv_dac_pix_pll_find; 1485 } 1486 else 1487 { 1488 head1_interrupt_enable = (crtc_interrupt_enable) nv_crtc_interrupt_enable; 1489 head1_update_fifo = (crtc_update_fifo) nv_crtc_update_fifo; 1490 head1_validate_timing = (crtc_validate_timing) nv_crtc_validate_timing; 1491 head1_set_timing = (crtc_set_timing) nv_crtc_set_timing; 1492 head1_depth = (crtc_depth) nv_crtc_depth; 1493 head1_dpms = (crtc_dpms) nv_crtc_dpms; 1494 head1_set_display_pitch = (crtc_set_display_pitch) nv_crtc_set_display_pitch; 1495 head1_set_display_start = (crtc_set_display_start) nv_crtc_set_display_start; 1496 head1_cursor_init = (crtc_cursor_init) nv_crtc_cursor_init; 1497 head1_cursor_show = (crtc_cursor_show) nv_crtc_cursor_show; 1498 head1_cursor_hide = (crtc_cursor_hide) nv_crtc_cursor_hide; 1499 head1_cursor_define = (crtc_cursor_define) nv_crtc_cursor_define; 1500 head1_cursor_position = (crtc_cursor_position) nv_crtc_cursor_position; 1501 head1_stop_tvout = (crtc_stop_tvout) nv_crtc_stop_tvout; 1502 head1_start_tvout = (crtc_start_tvout) nv_crtc_start_tvout; 1503 1504 head1_mode = (dac_mode) nv_dac_mode; 1505 head1_palette = (dac_palette) nv_dac_palette; 1506 head1_set_pix_pll = (dac_set_pix_pll) nv_dac_set_pix_pll; 1507 head1_pix_pll_find = (dac_pix_pll_find) nv_dac_pix_pll_find; 1508 1509 head2_interrupt_enable = (crtc_interrupt_enable) nv_crtc2_interrupt_enable; 1510 head2_update_fifo = (crtc_update_fifo) nv_crtc2_update_fifo; 1511 head2_validate_timing = (crtc_validate_timing) nv_crtc2_validate_timing; 1512 head2_set_timing = (crtc_set_timing) nv_crtc2_set_timing; 1513 head2_depth = (crtc_depth) nv_crtc2_depth; 1514 head2_dpms = (crtc_dpms) nv_crtc2_dpms; 1515 head2_set_display_pitch = (crtc_set_display_pitch) nv_crtc2_set_display_pitch; 1516 head2_set_display_start = (crtc_set_display_start) nv_crtc2_set_display_start; 1517 head2_cursor_init = (crtc_cursor_init) nv_crtc2_cursor_init; 1518 head2_cursor_show = (crtc_cursor_show) nv_crtc2_cursor_show; 1519 head2_cursor_hide = (crtc_cursor_hide) nv_crtc2_cursor_hide; 1520 head2_cursor_define = (crtc_cursor_define) nv_crtc2_cursor_define; 1521 head2_cursor_position = (crtc_cursor_position) nv_crtc2_cursor_position; 1522 head2_stop_tvout = (crtc_stop_tvout) nv_crtc2_stop_tvout; 1523 head2_start_tvout = (crtc_start_tvout) nv_crtc2_start_tvout; 1524 1525 head2_mode = (dac_mode) nv_dac2_mode; 1526 head2_palette = (dac_palette) nv_dac2_palette; 1527 head2_set_pix_pll = (dac_set_pix_pll) nv_dac2_set_pix_pll; 1528 head2_pix_pll_find = (dac_pix_pll_find) nv_dac2_pix_pll_find; 1529 } 1530 } 1531 1532 void set_crtc_owner(bool head) 1533 { 1534 if (si->ps.secondary_head) 1535 { 1536 if (!head) 1537 { 1538 /* note: 'OWNER' is a non-standard register in behaviour(!) on NV11's, 1539 * while non-NV11 cards behave normally. 1540 * 1541 * Double-write action needed on those strange NV11 cards: */ 1542 /* RESET: needed on NV11 */ 1543 CRTCW(OWNER, 0xff); 1544 /* enable access to CRTC1, SEQ1, GRPH1, ATB1, ??? */ 1545 CRTCW(OWNER, 0x00); 1546 } 1547 else 1548 { 1549 /* note: 'OWNER' is a non-standard register in behaviour(!) on NV11's, 1550 * while non-NV11 cards behave normally. 1551 * 1552 * Double-write action needed on those strange NV11 cards: */ 1553 /* RESET: needed on NV11 */ 1554 CRTC2W(OWNER, 0xff); 1555 /* enable access to CRTC2, SEQ2, GRPH2, ATB2, ??? */ 1556 CRTC2W(OWNER, 0x03); 1557 } 1558 } 1559 } 1560 1561 static status_t nvxx_general_powerup() 1562 { 1563 LOG(4, ("INIT: NV powerup\n")); 1564 LOG(4,("POWERUP: Detected %s (%s)\n", si->adi.name, si->adi.chipset)); 1565 1566 /* setup cardspecs */ 1567 /* note: 1568 * this MUST be done before the driver attempts a card coldstart */ 1569 set_specs(); 1570 1571 /* only process BIOS for finetuning specs and coldstarting card if requested 1572 * by the user; 1573 * note: 1574 * this in fact frees the driver from relying on the BIOS to be executed 1575 * at system power-up POST time. */ 1576 if (!si->settings.usebios) 1577 { 1578 /* Make sure we are running in PCI (not AGP) mode: 1579 * This is a requirement for safely coldstarting cards! 1580 * (some cards reset their AGP PLL during startup which makes acceleration 1581 * engine DMA fail later on. A reboot is needed to overcome that.) 1582 * Note: 1583 * This may only be done when no transfers are in progress on the bus, so now 1584 * is probably a good time.. */ 1585 nv_agp_setup(false); 1586 1587 LOG(2, ("INIT: Attempting card coldstart!\n")); 1588 /* update the cardspecs in the shared_info PINS struct according to reported 1589 * specs as much as is possible; 1590 * this also coldstarts the card if possible (executes BIOS CMD script(s)) */ 1591 parse_pins(); 1592 } 1593 else 1594 { 1595 LOG(2, ("INIT: Skipping card coldstart!\n")); 1596 } 1597 1598 unlock_card(); 1599 1600 /* get RAM size, detect TV encoder and do fake panel startup (panel init code 1601 * is still missing). */ 1602 fake_panel_start(); 1603 1604 /* log the final card specifications */ 1605 dump_pins(); 1606 1607 /* dump config space as it is after a possible coldstart attempt */ 1608 if (si->settings.logmask & 0x80000000) nv_dump_configuration_space(); 1609 1610 /* setup CRTC and DAC functions access: determined in fake_panel_start */ 1611 setup_virtualized_heads(si->ps.crtc2_prim); 1612 1613 /* do powerup needed from pre-inited card state as done by system POST cardBIOS 1614 * execution or driver coldstart above */ 1615 return nv_general_bios_to_powergraphics(); 1616 } 1617 1618 /* this routine switches the CRTC/DAC sets to 'connectors', but only for analog 1619 * outputs. We need this to make sure the analog 'switch' is set in the same way the 1620 * digital 'switch' is set by the BIOS or we might not be able to use dualhead. */ 1621 status_t nv_general_output_select(bool cross) 1622 { 1623 /* make sure this call is warranted */ 1624 if (si->ps.secondary_head) 1625 { 1626 /* NV11 cards can't switch heads (confirmed) */ 1627 if (si->ps.card_type != NV11) 1628 { 1629 if (cross) 1630 { 1631 LOG(4,("INIT: switching analog outputs to be cross-connected\n")); 1632 1633 /* enable head 2 on connector 1 */ 1634 /* (b8 = select CRTC (head) for output, 1635 * b4 = ??? (confirmed not to be a FP switch), 1636 * b0 = enable CRT) */ 1637 DACW(OUTPUT, 0x00000101); 1638 /* enable head 1 on connector 2 */ 1639 DAC2W(OUTPUT, 0x00000001); 1640 } 1641 else 1642 { 1643 LOG(4,("INIT: switching analog outputs to be straight-through\n")); 1644 1645 /* enable head 1 on connector 1 */ 1646 DACW(OUTPUT, 0x00000001); 1647 /* enable head 2 on connector 2 */ 1648 DAC2W(OUTPUT, 0x00000101); 1649 } 1650 } 1651 else 1652 { 1653 LOG(4,("INIT: NV11 analog outputs are hardwired to be straight-through\n")); 1654 } 1655 return B_OK; 1656 } 1657 else 1658 { 1659 return B_ERROR; 1660 } 1661 } 1662 1663 /* this routine switches CRTC/DAC set use. We need this because it's unknown howto 1664 * switch digital panels to/from a specific CRTC/DAC set. */ 1665 status_t nv_general_head_select(bool cross) 1666 { 1667 /* make sure this call is warranted */ 1668 if (si->ps.secondary_head) 1669 { 1670 /* invert CRTC/DAC use to do switching */ 1671 if (cross) 1672 { 1673 LOG(4,("INIT: switching CRTC/DAC use to be cross-connected\n")); 1674 si->crtc_switch_mode = !si->ps.crtc2_prim; 1675 } 1676 else 1677 { 1678 LOG(4,("INIT: switching CRTC/DAC use to be straight-through\n")); 1679 si->crtc_switch_mode = si->ps.crtc2_prim; 1680 } 1681 /* update CRTC and DAC functions access */ 1682 setup_virtualized_heads(si->crtc_switch_mode); 1683 1684 return B_OK; 1685 } 1686 else 1687 { 1688 return B_ERROR; 1689 } 1690 } 1691 1692 static void unlock_card(void) 1693 { 1694 /* make sure to power-up all nvidia hardware function blocks */ 1695 /* bit 28: OVERLAY ENGINE (BES), 1696 * bit 25: CRTC2, (> NV04A) 1697 * bit 24: CRTC1, 1698 * bit 20: framebuffer, 1699 * bit 16: PPMI, 1700 * bit 13: some part of at least the G72 acceleration engine, 1701 * bit 12: PGRAPH, 1702 * bit 8: PFIFO, 1703 * bit 4: PMEDIA, 1704 * bit 0: TVOUT. (> NV04A) */ 1705 NV_REG32(NV32_PWRUPCTRL) = 0xffffffff; 1706 1707 /* select colormode CRTC registers base adresses */ 1708 NV_REG8(NV8_MISCW) = 0xcb; 1709 1710 /* enable access to primary head */ 1711 set_crtc_owner(0); 1712 /* unlock head's registers for R/W access */ 1713 CRTCW(LOCK, 0x57); 1714 CRTCW(VSYNCE ,(CRTCR(VSYNCE) & 0x7f)); 1715 if (si->ps.secondary_head) 1716 { 1717 /* enable access to secondary head */ 1718 set_crtc_owner(1); 1719 /* unlock head's registers for R/W access */ 1720 CRTC2W(LOCK, 0x57); 1721 CRTC2W(VSYNCE ,(CRTCR(VSYNCE) & 0x7f)); 1722 } 1723 } 1724 1725 /* basic change of card state from VGA to enhanced mode: 1726 * Should work from VGA BIOS POST init state. */ 1727 static status_t nv_general_bios_to_powergraphics() 1728 { 1729 /* let acc engine make power off/power on cycle to start 'fresh' */ 1730 NV_REG32(NV32_PWRUPCTRL) = 0xffff00ff; 1731 snooze(1000); 1732 NV_REG32(NV32_PWRUPCTRL) = 0xffffffff; 1733 1734 unlock_card(); 1735 1736 /* turn off both displays and the hardcursors (also disables transfers) */ 1737 head1_dpms(false, false, false, true); 1738 head1_cursor_hide(); 1739 if (si->ps.secondary_head) 1740 { 1741 head2_dpms(false, false, false, true); 1742 head2_cursor_hide(); 1743 } 1744 1745 if (si->ps.secondary_head) 1746 { 1747 /* switch overlay engine and TV encoder to CRTC1 */ 1748 /* bit 17: GPU FP port #1 (confirmed NV25, NV28, confirmed not on NV34), 1749 * bit 16: GPU FP port #2 (confirmed NV25, NV28, NV34), 1750 * bit 12: overlay engine (all cards), 1751 * bit 9: TVout chip #2 (confirmed on NV18, NV25, NV28), 1752 * bit 8: TVout chip #1 (all cards), 1753 * bit 4: both I2C busses (all cards) */ 1754 NV_REG32(NV32_2FUNCSEL) &= ~0x00001100; 1755 NV_REG32(NV32_FUNCSEL) |= 0x00001100; 1756 } 1757 si->overlay.crtc = false; 1758 1759 /* enable 'enhanced' mode on primary head: */ 1760 /* enable access to primary head */ 1761 set_crtc_owner(0); 1762 /* note: 'BUFFER' is a non-standard register in behaviour(!) on most 1763 * NV11's like the Geforce2 MX200, while the MX400 and non-NV11 cards 1764 * behave normally. 1765 * Also readback is not nessesarily what was written before! 1766 * 1767 * Double-write action needed on those strange NV11 cards: */ 1768 /* RESET: don't doublebuffer CRTC access: set programmed values immediately... */ 1769 CRTCW(BUFFER, 0xff); 1770 /* ... and use fine pitched CRTC granularity on > NV4 cards (b2 = 0) */ 1771 /* note: this has no effect on possible bandwidth issues. */ 1772 CRTCW(BUFFER, 0xfb); 1773 /* select VGA mode (old VGA register) */ 1774 CRTCW(MODECTL, 0xc3); 1775 /* select graphics mode (old VGA register) */ 1776 SEQW(MEMMODE, 0x0e); 1777 /* select 8 dots character clocks (old VGA register) */ 1778 SEQW(CLKMODE, 0x21); 1779 /* select VGA mode (old VGA register) */ 1780 GRPHW(MODE, 0x00); 1781 /* select graphics mode (old VGA register) */ 1782 GRPHW(MISC, 0x01); 1783 /* select graphics mode (old VGA register) */ 1784 ATBW(MODECTL, 0x01); 1785 /* enable 'enhanced mode', enable Vsync & Hsync, 1786 * set DAC palette to 8-bit width, disable large screen */ 1787 CRTCW(REPAINT1, 0x04); 1788 1789 /* enable 'enhanced' mode on secondary head: */ 1790 if (si->ps.secondary_head) 1791 { 1792 /* enable access to secondary head */ 1793 set_crtc_owner(1); 1794 /* select colormode CRTC2 registers base adresses */ 1795 NV_REG8(NV8_MISCW) = 0xcb; 1796 /* note: 'BUFFER' is a non-standard register in behaviour(!) on most 1797 * NV11's like the Geforce2 MX200, while the MX400 and non-NV11 cards 1798 * behave normally. 1799 * Also readback is not nessesarily what was written before! 1800 * 1801 * Double-write action needed on those strange NV11 cards: */ 1802 /* RESET: don't doublebuffer CRTC2 access: set programmed values immediately... */ 1803 CRTC2W(BUFFER, 0xff); 1804 /* ... and use fine pitched CRTC granularity on > NV4 cards (b2 = 0) */ 1805 /* note: this has no effect on possible bandwidth issues. */ 1806 CRTC2W(BUFFER, 0xfb); 1807 /* select VGA mode (old VGA register) */ 1808 CRTC2W(MODECTL, 0xc3); 1809 /* select graphics mode (old VGA register) */ 1810 SEQW(MEMMODE, 0x0e); 1811 /* select 8 dots character clocks (old VGA register) */ 1812 SEQW(CLKMODE, 0x21); 1813 /* select VGA mode (old VGA register) */ 1814 GRPHW(MODE, 0x00); 1815 /* select graphics mode (old VGA register) */ 1816 GRPHW(MISC, 0x01); 1817 /* select graphics mode (old VGA register) */ 1818 ATB2W(MODECTL, 0x01); 1819 /* enable 'enhanced mode', enable Vsync & Hsync, 1820 * set DAC palette to 8-bit width, disable large screen */ 1821 CRTC2W(REPAINT1, 0x04); 1822 } 1823 1824 /* enable palettes */ 1825 DACW(GENCTRL, 0x00100100); 1826 if (si->ps.secondary_head) DAC2W(GENCTRL, 0x00100100); 1827 1828 /* turn on DAC and make sure detection testsignal routing is disabled 1829 * (b16 = disable DAC, 1830 * b12 = enable testsignal output */ 1831 //fixme note: b20 ('DACTM_TEST') when set apparantly blocks a DAC's video output 1832 //(confirmed NV43), while it's timing remains operational (black screen). 1833 //It feels like in some screen configurations it can move the output to the other 1834 //output connector as well... 1835 DACW(TSTCTRL, (DACR(TSTCTRL) & 0xfffeefff)); 1836 /* b20 enables DAC video output on some newer cards 1837 * (confirmed video to be almost black if zero on Geforce 7300, id 0x01d1 (G72)) */ 1838 if ((si->ps.card_type == NV44) || (si->ps.card_type >= G70)) 1839 DACW(TSTCTRL, (DACR(TSTCTRL) | 0x00100000)); 1840 1841 /* turn on DAC2 if it exists 1842 * (NOTE: testsignal function block resides in DAC1 only (!)) */ 1843 if (si->ps.secondary_head) { 1844 DAC2W(TSTCTRL, (DAC2R(TSTCTRL) & 0xfffeefff)); 1845 /* b20 might enable DAC video output on some newer cards 1846 * (not confirmed yet) */ 1847 if ((si->ps.card_type == NV44) || (si->ps.card_type >= G70)) 1848 DAC2W(TSTCTRL, (DAC2R(TSTCTRL) | 0x00100000)); 1849 } 1850 1851 /* NV40 and NV45 need a 'tweak' to make sure the CRTC FIFO's/shiftregisters get 1852 * their data in time (otherwise momentarily ghost images of windows or such 1853 * may appear on heavy acceleration engine use for instance, especially in 32-bit 1854 * colordepth) */ 1855 if ((si->ps.card_type == NV40) || (si->ps.card_type == NV45)) 1856 { 1857 /* clear b15: some framebuffer config item (unknown) */ 1858 NV_REG32(NV32_PFB_CLS_PAGE2) &= 0xffff7fff; 1859 } 1860 1861 /* enable dithering for internal laptop panels only (those have only 18bit colordepth sometimes) 1862 * note: 1863 * dithering is only supported on digitally connected flatpanels. */ 1864 //fixme: how about DAC2?? (still implement and test..) 1865 if (si->ps.laptop && (si->ps.monitors & CRTC1_TMDS)) nv_dac_dither(true); 1866 1867 /* tweak card GPU-core and RAM speeds if requested (hoping we'll survive)... */ 1868 if (si->settings.gpu_clk) 1869 { 1870 LOG(2,("INIT: tweaking GPU clock!\n")); 1871 1872 set_pll(NV32_COREPLL, si->settings.gpu_clk); 1873 snooze(1000); 1874 } 1875 if (si->settings.ram_clk) 1876 { 1877 LOG(2,("INIT: tweaking cardRAM clock!\n")); 1878 1879 set_pll(NV32_MEMPLL, si->settings.ram_clk); 1880 snooze(1000); 1881 } 1882 1883 /* setup AGP: 1884 * Note: 1885 * This may only be done when no transfers are in progress on the bus, so now 1886 * is probably a good time.. */ 1887 nv_agp_setup(true); 1888 1889 return B_OK; 1890 } 1891 1892 /* Check if mode virtual_size adheres to the cards _maximum_ contraints, and modify 1893 * virtual_size to the nearest valid maximum for the mode on the card if not so. 1894 * Also: check if virtual_width adheres to the cards granularity constraints, and 1895 * create mode slopspace if not so. 1896 * We use acc or crtc granularity constraints based on the 'worst case' scenario. 1897 * 1898 * Mode slopspace is reflected in fbc->bytes_per_row BTW. */ 1899 status_t nv_general_validate_pic_size (display_mode *target, uint32 *bytes_per_row, bool *acc_mode) 1900 { 1901 uint32 video_pitch; 1902 uint32 acc_mask, crtc_mask; 1903 uint32 max_crtc_width, max_acc_width; 1904 uint8 depth = 8; 1905 1906 /* determine pixel multiple based on acceleration engine constraints */ 1907 /* note: 1908 * because of the seemingly 'random' variations in these constraints we take 1909 * a reasonable 'lowest common denominator' instead of always true constraints. */ 1910 switch (si->ps.card_arch) 1911 { 1912 case NV04A: 1913 /* confirmed for: 1914 * TNT1 (NV04), TNT2 (NV05), TNT2-M64 (NV05M64), Geforce2 MX400 (NV11), 1915 * Geforce4 MX440 (NV18), GeforceFX 5200 (NV34) in PIO acc mode; 1916 * confirmed for: 1917 * TNT1 (NV04), TNT2 (NV05), TNT2-M64 (NV05M64), Geforce4 Ti4200 (NV28), 1918 * GeforceFX 5200 (NV34) in DMA acc mode. */ 1919 switch (target->space) 1920 { 1921 case B_CMAP8: acc_mask = 0x0f; depth = 8; break; 1922 case B_RGB15: acc_mask = 0x07; depth = 16; break; 1923 case B_RGB16: acc_mask = 0x07; depth = 16; break; 1924 case B_RGB24: acc_mask = 0x0f; depth = 24; break; 1925 case B_RGB32: acc_mask = 0x03; depth = 32; break; 1926 default: 1927 LOG(8,("INIT: unknown color space: 0x%08x\n", target->space)); 1928 return B_ERROR; 1929 } 1930 break; 1931 default: 1932 /* confirmed for: 1933 * Geforce4 Ti4200 (NV28), GeforceFX 5600 (NV31) in PIO acc mode; 1934 * confirmed for: 1935 * Geforce2 MX400 (NV11), Geforce4 MX440 (NV18), GeforcePCX 5750 (NV36), 1936 * GeforcePCX 6600 GT (NV43) in DMA acc mode. */ 1937 switch (target->space) 1938 { 1939 case B_CMAP8: acc_mask = 0x3f; depth = 8; break; 1940 case B_RGB15: acc_mask = 0x1f; depth = 16; break; 1941 case B_RGB16: acc_mask = 0x1f; depth = 16; break; 1942 case B_RGB24: acc_mask = 0x3f; depth = 24; break; 1943 case B_RGB32: acc_mask = 0x0f; depth = 32; break; 1944 default: 1945 LOG(8,("INIT: unknown color space: 0x%08x\n", target->space)); 1946 return B_ERROR; 1947 } 1948 break; 1949 } 1950 1951 /* determine pixel multiple based on CRTC memory pitch constraints: 1952 * -> all NV cards have same granularity constraints on CRTC1 and CRTC2, 1953 * provided that the CRTC1 and CRTC2 BUFFER register b2 = 0; 1954 * 1955 * (Note: Don't mix this up with CRTC timing contraints! Those are 1956 * multiples of 8 for horizontal, 1 for vertical timing.) */ 1957 switch (si->ps.card_type) 1958 { 1959 default: 1960 // case NV04: 1961 /* confirmed for: 1962 * TNT1 always; 1963 * TNT2, TNT2-M64, Geforce2 MX400, Geforce4 MX440, Geforce4 Ti4200, 1964 * GeforceFX 5200: if the CRTC1 (and CRTC2) BUFFER register b2 = 0 */ 1965 /* NOTE: 1966 * Unfortunately older cards have a hardware fault that prevents use. 1967 * We need doubled granularity on those to prevent the single top line 1968 * from shifting to the left! 1969 * This is confirmed for TNT2, Geforce2 MX200, Geforce2 MX400. 1970 * Confirmed OK are: 1971 * Geforce4 MX440, Geforce4 Ti4200, GeforceFX 5200. */ 1972 switch (target->space) 1973 { 1974 case B_CMAP8: crtc_mask = 0x0f; break; /* 0x07 */ 1975 case B_RGB15: crtc_mask = 0x07; break; /* 0x03 */ 1976 case B_RGB16: crtc_mask = 0x07; break; /* 0x03 */ 1977 case B_RGB24: crtc_mask = 0x0f; break; /* 0x07 */ 1978 case B_RGB32: crtc_mask = 0x03; break; /* 0x01 */ 1979 default: 1980 LOG(8,("INIT: unknown color space: 0x%08x\n", target->space)); 1981 return B_ERROR; 1982 } 1983 break; 1984 // default: 1985 /* confirmed for: 1986 * TNT2, TNT2-M64, Geforce2 MX400, Geforce4 MX440, Geforce4 Ti4200, 1987 * GeforceFX 5200: if the CRTC1 (and CRTC2) BUFFER register b2 = 1 */ 1988 /* switch (target->space) 1989 { 1990 case B_CMAP8: crtc_mask = 0x1f; break; 1991 case B_RGB15: crtc_mask = 0x0f; break; 1992 case B_RGB16: crtc_mask = 0x0f; break; 1993 case B_RGB24: crtc_mask = 0x1f; break; 1994 case B_RGB32: crtc_mask = 0x07; break; 1995 default: 1996 LOG(8,("INIT: unknown color space: 0x%08x\n", target->space)); 1997 return B_ERROR; 1998 } 1999 break; 2000 */ } 2001 2002 /* set virtual_width limit for accelerated modes */ 2003 /* note: 2004 * because of the seemingly 'random' variations in these constraints we take 2005 * a reasonable 'lowest common denominator' instead of always true constraints. */ 2006 switch (si->ps.card_arch) 2007 { 2008 case NV04A: 2009 /* confirmed for: 2010 * TNT1 (NV04), TNT2 (NV05), TNT2-M64 (NV05M64) in both PIO and DMA acc mode. */ 2011 switch(target->space) 2012 { 2013 case B_CMAP8: max_acc_width = 8176; break; 2014 case B_RGB15: max_acc_width = 4088; break; 2015 case B_RGB16: max_acc_width = 4088; break; 2016 case B_RGB24: max_acc_width = 2720; break; 2017 case B_RGB32: max_acc_width = 2044; break; 2018 default: 2019 LOG(8,("INIT: unknown color space: 0x%08x\n", target->space)); 2020 return B_ERROR; 2021 } 2022 break; 2023 default: 2024 /* confirmed for: 2025 * Geforce4 Ti4200 (NV28), GeforceFX 5600 (NV31) in PIO acc mode; 2026 * Geforce2 MX400 (NV11), Geforce4 MX440 (NV18), GeforceFX 5200 (NV34) can do 2027 * 16368/8184/8184/5456/4092, so a bit better in PIO acc mode; 2028 * confirmed for: 2029 * Geforce2 MX400 (NV11), Geforce4 MX440 (NV18), GeforcePCX 5750 (NV36), 2030 * GeforcePCX 6600 GT (NV43) in DMA acc mode; 2031 * Geforce4 Ti4200 (NV28), GeforceFX 5200 (NV34) can do 2032 * 16368/8184/8184/5456/4092, so a bit better in DMA acc mode. */ 2033 switch(target->space) 2034 { 2035 case B_CMAP8: max_acc_width = 16320; break; 2036 case B_RGB15: max_acc_width = 8160; break; 2037 case B_RGB16: max_acc_width = 8160; break; 2038 case B_RGB24: max_acc_width = 5440; break; 2039 case B_RGB32: max_acc_width = 4080; break; 2040 default: 2041 LOG(8,("INIT: unknown color space: 0x%08x\n", target->space)); 2042 return B_ERROR; 2043 } 2044 break; 2045 } 2046 2047 /* set virtual_width limit for unaccelerated modes */ 2048 switch (si->ps.card_type) 2049 { 2050 default: 2051 // case NV04: 2052 /* confirmed for: 2053 * TNT1 always; 2054 * TNT2, TNT2-M64, Geforce2 MX400, Geforce4 MX440, Geforce4 Ti4200, 2055 * GeforceFX 5200: if the CRTC1 (and CRTC2) BUFFER register b2 = 0 */ 2056 /* NOTE: 2057 * Unfortunately older cards have a hardware fault that prevents use. 2058 * We need doubled granularity on those to prevent the single top line 2059 * from shifting to the left! 2060 * This is confirmed for TNT2, Geforce2 MX200, Geforce2 MX400. 2061 * Confirmed OK are: 2062 * Geforce4 MX440, Geforce4 Ti4200, GeforceFX 5200. */ 2063 switch(target->space) 2064 { 2065 case B_CMAP8: max_crtc_width = 16368; break; /* 16376 */ 2066 case B_RGB15: max_crtc_width = 8184; break; /* 8188 */ 2067 case B_RGB16: max_crtc_width = 8184; break; /* 8188 */ 2068 case B_RGB24: max_crtc_width = 5456; break; /* 5456 */ 2069 case B_RGB32: max_crtc_width = 4092; break; /* 4094 */ 2070 default: 2071 LOG(8,("INIT: unknown color space: 0x%08x\n", target->space)); 2072 return B_ERROR; 2073 } 2074 break; 2075 // default: 2076 /* confirmed for: 2077 * TNT2, TNT2-M64, Geforce2 MX400, Geforce4 MX440, Geforce4 Ti4200, 2078 * GeforceFX 5200: if the CRTC1 (and CRTC2) BUFFER register b2 = 1 */ 2079 /* switch(target->space) 2080 { 2081 case B_CMAP8: max_crtc_width = 16352; break; 2082 case B_RGB15: max_crtc_width = 8176; break; 2083 case B_RGB16: max_crtc_width = 8176; break; 2084 case B_RGB24: max_crtc_width = 5440; break; 2085 case B_RGB32: max_crtc_width = 4088; break; 2086 default: 2087 LOG(8,("INIT: unknown color space: 0x%08x\n", target->space)); 2088 return B_ERROR; 2089 } 2090 break; 2091 */ } 2092 2093 /* check for acc capability, and adjust mode to adhere to hardware constraints */ 2094 if (max_acc_width <= max_crtc_width) 2095 { 2096 /* check if we can setup this mode with acceleration */ 2097 *acc_mode = true; 2098 /* virtual_width */ 2099 if (target->virtual_width > max_acc_width) *acc_mode = false; 2100 /* virtual_height */ 2101 /* (NV cards can even do more than this(?)... 2102 * but 4096 is confirmed on all cards at max. accelerated width.) */ 2103 if (target->virtual_height > 4096) *acc_mode = false; 2104 2105 /* now check virtual_size based on CRTC constraints */ 2106 if (target->virtual_width > max_crtc_width) target->virtual_width = max_crtc_width; 2107 /* virtual_height: The only constraint here is the cards memory size which is 2108 * checked later on in ProposeMode: virtual_height is adjusted then if needed. 2109 * 'Limiting here' to the variable size that's at least available (uint16). */ 2110 if (target->virtual_height > 65535) target->virtual_height = 65535; 2111 2112 /* OK, now we know that virtual_width is valid, and it's needing no slopspace if 2113 * it was confined above, so we can finally calculate safely if we need slopspace 2114 * for this mode... */ 2115 if (*acc_mode) 2116 { 2117 /* the mode needs to adhere to the largest granularity imposed... */ 2118 if (acc_mask < crtc_mask) 2119 video_pitch = ((target->virtual_width + crtc_mask) & ~crtc_mask); 2120 else 2121 video_pitch = ((target->virtual_width + acc_mask) & ~acc_mask); 2122 } 2123 else /* unaccelerated mode */ 2124 video_pitch = ((target->virtual_width + crtc_mask) & ~crtc_mask); 2125 } 2126 else /* max_acc_width > max_crtc_width */ 2127 { 2128 /* check if we can setup this mode with acceleration */ 2129 *acc_mode = true; 2130 /* (we already know virtual_width will be no problem) */ 2131 /* virtual_height */ 2132 /* (NV cards can even do more than this(?)... 2133 * but 4096 is confirmed on all cards at max. accelerated width.) */ 2134 if (target->virtual_height > 4096) *acc_mode = false; 2135 2136 /* now check virtual_size based on CRTC constraints */ 2137 if (*acc_mode) 2138 { 2139 /* note that max_crtc_width already adheres to crtc_mask */ 2140 if (target->virtual_width > (max_crtc_width & ~acc_mask)) 2141 target->virtual_width = (max_crtc_width & ~acc_mask); 2142 } 2143 else /* unaccelerated mode */ 2144 { 2145 if (target->virtual_width > max_crtc_width) 2146 target->virtual_width = max_crtc_width; 2147 } 2148 /* virtual_height: The only constraint here is the cards memory size which is 2149 * checked later on in ProposeMode: virtual_height is adjusted then if needed. 2150 * 'Limiting here' to the variable size that's at least available (uint16). */ 2151 if (target->virtual_height > 65535) target->virtual_height = 65535; 2152 2153 /* OK, now we know that virtual_width is valid, and it's needing no slopspace if 2154 * it was confined above, so we can finally calculate safely if we need slopspace 2155 * for this mode... */ 2156 if (*acc_mode) 2157 { 2158 /* the mode needs to adhere to the largest granularity imposed... */ 2159 if (acc_mask < crtc_mask) 2160 video_pitch = ((target->virtual_width + crtc_mask) & ~crtc_mask); 2161 else 2162 video_pitch = ((target->virtual_width + acc_mask) & ~acc_mask); 2163 } 2164 else /* unaccelerated mode */ 2165 video_pitch = ((target->virtual_width + crtc_mask) & ~crtc_mask); 2166 } 2167 2168 LOG(2,("INIT: memory pitch will be set to %d pixels for colorspace 0x%08x\n", 2169 video_pitch, target->space)); 2170 if (target->virtual_width != video_pitch) 2171 LOG(2,("INIT: effective mode slopspace is %d pixels\n", 2172 (video_pitch - target->virtual_width))); 2173 2174 /* now calculate bytes_per_row for this mode */ 2175 *bytes_per_row = video_pitch * (depth >> 3); 2176 2177 return B_OK; 2178 } 2179