1 /* Authors: 2 Mark Watson 12/1999, 3 Apsed, 4 Rudolf Cornelissen 10/2002-4/2006 5 */ 6 7 #define MODULE_BIT 0x00008000 8 9 #include "nv_std.h" 10 11 static status_t test_ram(void); 12 static status_t nvxx_general_powerup (void); 13 static void unlock_card(void); 14 static status_t nv_general_bios_to_powergraphics(void); 15 16 static void nv_dump_configuration_space (void) 17 { 18 #define DUMP_CFG(reg, type) if (si->ps.card_type >= type) do { \ 19 uint32 value = CFGR(reg); \ 20 MSG(("configuration_space 0x%02x %20s 0x%08x\n", \ 21 NVCFG_##reg, #reg, value)); \ 22 } while (0) 23 DUMP_CFG (DEVID, 0); 24 DUMP_CFG (DEVCTRL, 0); 25 DUMP_CFG (CLASS, 0); 26 DUMP_CFG (HEADER, 0); 27 DUMP_CFG (BASE1REGS,0); 28 DUMP_CFG (BASE2FB, 0); 29 DUMP_CFG (BASE3, 0); 30 DUMP_CFG (BASE4, 0); 31 DUMP_CFG (BASE5, 0); 32 DUMP_CFG (BASE6, 0); 33 DUMP_CFG (BASE7, 0); 34 DUMP_CFG (SUBSYSID1,0); 35 DUMP_CFG (ROMBASE, 0); 36 DUMP_CFG (CAPPTR, 0); 37 DUMP_CFG (CFG_1, 0); 38 DUMP_CFG (INTERRUPT,0); 39 DUMP_CFG (SUBSYSID2,0); 40 DUMP_CFG (AGPREF, 0); 41 DUMP_CFG (AGPSTAT, 0); 42 DUMP_CFG (AGPCMD, 0); 43 DUMP_CFG (ROMSHADOW,0); 44 DUMP_CFG (VGA, 0); 45 DUMP_CFG (SCHRATCH, 0); 46 DUMP_CFG (CFG_10, 0); 47 DUMP_CFG (CFG_11, 0); 48 DUMP_CFG (CFG_12, 0); 49 DUMP_CFG (CFG_13, 0); 50 DUMP_CFG (CFG_14, 0); 51 DUMP_CFG (CFG_15, 0); 52 DUMP_CFG (CFG_16, 0); 53 DUMP_CFG (PCIEREF, 0); 54 DUMP_CFG (PCIEDCAP, 0); 55 DUMP_CFG (PCIEDCTST,0); 56 DUMP_CFG (PCIELCAP, 0); 57 DUMP_CFG (PCIELCTST,0); 58 DUMP_CFG (CFG_22, 0); 59 DUMP_CFG (CFG_23, 0); 60 DUMP_CFG (CFG_24, 0); 61 DUMP_CFG (CFG_25, 0); 62 DUMP_CFG (CFG_26, 0); 63 DUMP_CFG (CFG_27, 0); 64 DUMP_CFG (CFG_28, 0); 65 DUMP_CFG (CFG_29, 0); 66 DUMP_CFG (CFG_30, 0); 67 DUMP_CFG (CFG_31, 0); 68 DUMP_CFG (CFG_32, 0); 69 DUMP_CFG (CFG_33, 0); 70 DUMP_CFG (CFG_34, 0); 71 DUMP_CFG (CFG_35, 0); 72 DUMP_CFG (CFG_36, 0); 73 DUMP_CFG (CFG_37, 0); 74 DUMP_CFG (CFG_38, 0); 75 DUMP_CFG (CFG_39, 0); 76 DUMP_CFG (CFG_40, 0); 77 DUMP_CFG (CFG_41, 0); 78 DUMP_CFG (CFG_42, 0); 79 DUMP_CFG (CFG_43, 0); 80 DUMP_CFG (CFG_44, 0); 81 DUMP_CFG (CFG_45, 0); 82 DUMP_CFG (CFG_46, 0); 83 DUMP_CFG (CFG_47, 0); 84 DUMP_CFG (CFG_48, 0); 85 DUMP_CFG (CFG_49, 0); 86 DUMP_CFG (CFG_50, 0); 87 #undef DUMP_CFG 88 } 89 90 status_t nv_general_powerup() 91 { 92 status_t status; 93 94 LOG(1,("POWERUP: Haiku nVidia Accelerant 0.81 running.\n")); 95 96 /* log VBLANK INT usability status */ 97 if (si->ps.int_assigned) 98 LOG(4,("POWERUP: Usable INT assigned to HW; Vblank semaphore enabled\n")); 99 else 100 LOG(4,("POWERUP: No (usable) INT assigned to HW; Vblank semaphore disabled\n")); 101 102 /* preset no laptop */ 103 si->ps.laptop = false; 104 105 /* WARNING: 106 * _adi.name_ and _adi.chipset_ can contain 31 readable characters max.!!! */ 107 108 /* detect card type and power it up */ 109 switch(CFGR(DEVID)) 110 { 111 /* Vendor Nvidia */ 112 case 0x002010de: /* Nvidia TNT1 */ 113 si->ps.card_type = NV04; 114 si->ps.card_arch = NV04A; 115 sprintf(si->adi.name, "Nvidia TNT1"); 116 sprintf(si->adi.chipset, "NV04"); 117 status = nvxx_general_powerup(); 118 break; 119 case 0x002810de: /* Nvidia TNT2 (pro) */ 120 case 0x002910de: /* Nvidia TNT2 Ultra */ 121 case 0x002a10de: /* Nvidia TNT2 */ 122 case 0x002b10de: /* Nvidia TNT2 */ 123 si->ps.card_type = NV05; 124 si->ps.card_arch = NV04A; 125 sprintf(si->adi.name, "Nvidia TNT2"); 126 sprintf(si->adi.chipset, "NV05"); 127 status = nvxx_general_powerup(); 128 break; 129 case 0x002c10de: /* Nvidia Vanta (Lt) */ 130 si->ps.card_type = NV05; 131 si->ps.card_arch = NV04A; 132 sprintf(si->adi.name, "Nvidia Vanta (Lt)"); 133 sprintf(si->adi.chipset, "NV05"); 134 status = nvxx_general_powerup(); 135 break; 136 case 0x002d10de: /* Nvidia TNT2-M64 (Pro) */ 137 si->ps.card_type = NV05M64; 138 si->ps.card_arch = NV04A; 139 sprintf(si->adi.name, "Nvidia TNT2-M64 (Pro)"); 140 sprintf(si->adi.chipset, "NV05 model 64"); 141 status = nvxx_general_powerup(); 142 break; 143 case 0x002e10de: /* Nvidia NV06 Vanta */ 144 case 0x002f10de: /* Nvidia NV06 Vanta */ 145 si->ps.card_type = NV06; 146 si->ps.card_arch = NV04A; 147 sprintf(si->adi.name, "Nvidia Vanta"); 148 sprintf(si->adi.chipset, "NV06"); 149 status = nvxx_general_powerup(); 150 break; 151 case 0x004010de: /* Nvidia GeForce FX 6800 Ultra */ 152 case 0x004110de: /* Nvidia GeForce FX 6800 */ 153 case 0x004210de: /* Nvidia GeForce FX 6800LE */ 154 si->ps.card_type = NV40; 155 si->ps.card_arch = NV40A; 156 sprintf(si->adi.name, "Nvidia GeForce FX 6800"); 157 sprintf(si->adi.chipset, "NV40"); 158 status = nvxx_general_powerup(); 159 break; 160 case 0x004310de: /* Nvidia unknown FX */ 161 si->ps.card_type = NV40; 162 si->ps.card_arch = NV40A; 163 sprintf(si->adi.name, "Nvidia unknown FX"); 164 sprintf(si->adi.chipset, "NV40"); 165 status = nvxx_general_powerup(); 166 break; 167 case 0x004510de: /* Nvidia GeForce FX 6800 GT */ 168 case 0x004610de: /* Nvidia GeForce FX 6800 GT */ 169 case 0x004810de: /* Nvidia GeForce FX 6800 XT */ 170 si->ps.card_type = NV40; 171 si->ps.card_arch = NV40A; 172 sprintf(si->adi.name, "Nvidia GeForce FX 6800"); 173 sprintf(si->adi.chipset, "NV40"); 174 status = nvxx_general_powerup(); 175 break; 176 case 0x004910de: /* Nvidia unknown FX */ 177 si->ps.card_type = NV40; 178 si->ps.card_arch = NV40A; 179 sprintf(si->adi.name, "Nvidia unknown FX"); 180 sprintf(si->adi.chipset, "NV40"); 181 status = nvxx_general_powerup(); 182 break; 183 case 0x004d10de: /* Nvidia Quadro FX 4400 */ 184 case 0x004e10de: /* Nvidia Quadro FX 4000 */ 185 si->ps.card_type = NV40; 186 si->ps.card_arch = NV40A; 187 sprintf(si->adi.name, "Nvidia Quadro FX 4000/4400"); 188 sprintf(si->adi.chipset, "NV40"); 189 status = nvxx_general_powerup(); 190 break; 191 case 0x009110de: /* Nvidia GeForce 7800 GTX PCIe */ 192 case 0x009210de: /* Nvidia Geforce 7800 GT PCIe */ 193 si->ps.card_type = G70; 194 si->ps.card_arch = NV40A; 195 sprintf(si->adi.name, "Nvidia Geforce 7800 GT PCIe"); 196 sprintf(si->adi.chipset, "G70"); 197 status = nvxx_general_powerup(); 198 break; 199 case 0x009810de: /* Nvidia Geforce 7800 Go PCIe */ 200 case 0x009910de: /* Nvidia Geforce 7800 GTX Go PCIe */ 201 si->ps.card_type = G70; 202 si->ps.card_arch = NV40A; 203 si->ps.laptop = true; 204 sprintf(si->adi.name, "Nvidia Geforce 7800 GTX Go PCIe"); 205 sprintf(si->adi.chipset, "G70"); 206 status = nvxx_general_powerup(); 207 break; 208 case 0x009d10de: /* Nvidia Quadro FX 4500 */ 209 si->ps.card_type = G70; 210 si->ps.card_arch = NV40A; 211 sprintf(si->adi.name, "Nvidia Quadro FX 4500"); 212 sprintf(si->adi.chipset, "G70"); 213 status = nvxx_general_powerup(); 214 break; 215 case 0x00a010de: /* Nvidia Aladdin TNT2 */ 216 si->ps.card_type = NV05; 217 si->ps.card_arch = NV04A; 218 sprintf(si->adi.name, "Nvidia Aladdin TNT2"); 219 sprintf(si->adi.chipset, "NV05"); 220 status = nvxx_general_powerup(); 221 break; 222 case 0x00c010de: /* Nvidia unknown FX */ 223 si->ps.card_type = NV41; 224 si->ps.card_arch = NV40A; 225 sprintf(si->adi.name, "Nvidia unknown FX"); 226 sprintf(si->adi.chipset, "NV41"); 227 status = nvxx_general_powerup(); 228 break; 229 case 0x00c110de: /* Nvidia GeForce FX 6800 */ 230 case 0x00c210de: /* Nvidia GeForce FX 6800LE */ 231 case 0x00c310de: /* Nvidia GeForce FX 6800 XT */ 232 si->ps.card_type = NV41; 233 si->ps.card_arch = NV40A; 234 sprintf(si->adi.name, "Nvidia GeForce FX 6800"); 235 sprintf(si->adi.chipset, "NV41"); 236 status = nvxx_general_powerup(); 237 break; 238 case 0x00c810de: /* Nvidia GeForce FX 6800 Go */ 239 case 0x00c910de: /* Nvidia GeForce FX 6800 Ultra Go */ 240 si->ps.card_type = NV41; 241 si->ps.card_arch = NV40A; 242 si->ps.laptop = true; 243 sprintf(si->adi.name, "Nvidia GeForce FX 6800 Go"); 244 sprintf(si->adi.chipset, "NV41"); 245 status = nvxx_general_powerup(); 246 break; 247 case 0x00cc10de: /* Nvidia Quadro FX 1400 Go */ 248 si->ps.card_type = NV41; 249 si->ps.card_arch = NV40A; 250 si->ps.laptop = true; 251 sprintf(si->adi.name, "Nvidia Quadro FX 1400 Go"); 252 sprintf(si->adi.chipset, "NV41"); 253 status = nvxx_general_powerup(); 254 break; 255 case 0x00cd10de: /* Nvidia Quadro FX 3450/4000 SDI */ 256 si->ps.card_type = NV41; 257 si->ps.card_arch = NV40A; 258 sprintf(si->adi.name, "Nvidia Quadro FX 3450/4000 SDI"); 259 sprintf(si->adi.chipset, "NV41"); 260 status = nvxx_general_powerup(); 261 break; 262 case 0x00ce10de: /* Nvidia Quadro FX 1400 */ 263 si->ps.card_type = NV41; 264 si->ps.card_arch = NV40A; 265 sprintf(si->adi.name, "Nvidia Quadro FX 1400"); 266 sprintf(si->adi.chipset, "NV41"); 267 status = nvxx_general_powerup(); 268 break; 269 case 0x00f010de: /* Nvidia GeForce FX 6800 (Ultra) AGP(?) */ 270 si->ps.card_type = NV40; 271 si->ps.card_arch = NV40A; 272 sprintf(si->adi.name, "Nvidia GeForce FX 6800 AGP(?)"); 273 sprintf(si->adi.chipset, "NV40(?)"); 274 status = nvxx_general_powerup(); 275 break; 276 case 0x00f110de: /* Nvidia GeForce FX 6600 GT AGP */ 277 case 0x00f210de: /* Nvidia GeForce FX 6600 AGP */ 278 si->ps.card_type = NV43; 279 si->ps.card_arch = NV40A; 280 sprintf(si->adi.name, "Nvidia GeForce FX 6600 (GT) AGP"); 281 sprintf(si->adi.chipset, "NV43"); 282 status = nvxx_general_powerup(); 283 break; 284 case 0x00f310de: /* Nvidia GeForce 6200 */ 285 si->ps.card_type = NV44; 286 si->ps.card_arch = NV40A; 287 sprintf(si->adi.name, "Nvidia GeForce 6200"); 288 sprintf(si->adi.chipset, "NV44"); 289 status = nvxx_general_powerup(); 290 break; 291 case 0x00f510de: /* Nvidia GeForce FX 7800 GS AGP */ 292 si->ps.card_type = G70; 293 si->ps.card_arch = NV40A; 294 sprintf(si->adi.name, "Nvidia GeForce 7800 GS AGP"); 295 sprintf(si->adi.chipset, "G70"); 296 status = nvxx_general_powerup(); 297 break; 298 case 0x00f810de: /* Nvidia Quadro FX 3400/4400 PCIe */ 299 si->ps.card_type = NV45; 300 si->ps.card_arch = NV40A; 301 sprintf(si->adi.name, "Nvidia Quadro FX 3400 PCIe"); 302 sprintf(si->adi.chipset, "NV45"); 303 status = nvxx_general_powerup(); 304 break; 305 case 0x00f910de: /* Nvidia GeForce PCX 6800 PCIe */ 306 si->ps.card_type = NV45; 307 si->ps.card_arch = NV40A; 308 sprintf(si->adi.name, "Nvidia GeForce PCX 6800 PCIe"); 309 sprintf(si->adi.chipset, "NV45"); 310 status = nvxx_general_powerup(); 311 break; 312 case 0x00fa10de: /* Nvidia GeForce PCX 5750 PCIe */ 313 si->ps.card_type = NV36; 314 si->ps.card_arch = NV30A; 315 sprintf(si->adi.name, "Nvidia GeForce PCX 5750 PCIe"); 316 sprintf(si->adi.chipset, "NV36"); 317 status = nvxx_general_powerup(); 318 break; 319 case 0x00fb10de: /* Nvidia GeForce PCX 5900 PCIe */ 320 si->ps.card_type = NV35; 321 si->ps.card_arch = NV30A; 322 sprintf(si->adi.name, "Nvidia GeForce PCX 5900 PCIe"); 323 sprintf(si->adi.chipset, "NV35(?)"); 324 status = nvxx_general_powerup(); 325 break; 326 case 0x00fc10de: /* Nvidia GeForce PCX 5300 PCIe */ 327 si->ps.card_type = NV34; 328 si->ps.card_arch = NV30A; 329 sprintf(si->adi.name, "Nvidia GeForce PCX 5300 PCIe"); 330 sprintf(si->adi.chipset, "NV34"); 331 status = nvxx_general_powerup(); 332 break; 333 case 0x00fd10de: /* Nvidia Quadro PCX PCIe */ 334 si->ps.card_type = NV45; 335 si->ps.card_arch = NV40A; 336 sprintf(si->adi.name, "Nvidia Quadro PCX PCIe"); 337 sprintf(si->adi.chipset, "NV45"); 338 status = nvxx_general_powerup(); 339 break; 340 case 0x00fe10de: /* Nvidia Quadro FX 1300 PCIe(?) */ 341 si->ps.card_type = NV36; 342 si->ps.card_arch = NV30A; 343 sprintf(si->adi.name, "Nvidia Quadro FX 1300 PCIe(?)"); 344 sprintf(si->adi.chipset, "NV36(?)"); 345 status = nvxx_general_powerup(); 346 break; 347 case 0x00ff10de: /* Nvidia GeForce PCX 4300 PCIe */ 348 si->ps.card_type = NV18; 349 si->ps.card_arch = NV10A; 350 sprintf(si->adi.name, "Nvidia GeForce PCX 4300 PCIe"); 351 sprintf(si->adi.chipset, "NV18"); 352 status = nvxx_general_powerup(); 353 break; 354 case 0x010010de: /* Nvidia GeForce256 SDR */ 355 case 0x010110de: /* Nvidia GeForce256 DDR */ 356 case 0x010210de: /* Nvidia GeForce256 Ultra */ 357 si->ps.card_type = NV10; 358 si->ps.card_arch = NV10A; 359 sprintf(si->adi.name, "Nvidia GeForce256"); 360 sprintf(si->adi.chipset, "NV10"); 361 status = nvxx_general_powerup(); 362 break; 363 case 0x010310de: /* Nvidia Quadro */ 364 si->ps.card_type = NV10; 365 si->ps.card_arch = NV10A; 366 sprintf(si->adi.name, "Nvidia Quadro"); 367 sprintf(si->adi.chipset, "NV10"); 368 status = nvxx_general_powerup(); 369 break; 370 case 0x011010de: /* Nvidia GeForce2 MX/MX400 */ 371 case 0x011110de: /* Nvidia GeForce2 MX100/MX200 DDR */ 372 si->ps.card_type = NV11; 373 si->ps.card_arch = NV10A; 374 sprintf(si->adi.name, "Nvidia GeForce2 MX"); 375 sprintf(si->adi.chipset, "NV11"); 376 status = nvxx_general_powerup(); 377 break; 378 case 0x011210de: /* Nvidia GeForce2 Go */ 379 si->ps.card_type = NV11; 380 si->ps.card_arch = NV10A; 381 si->ps.laptop = true; 382 sprintf(si->adi.name, "Nvidia GeForce2 Go"); 383 sprintf(si->adi.chipset, "NV11"); 384 status = nvxx_general_powerup(); 385 break; 386 case 0x011310de: /* Nvidia Quadro2 MXR/EX/Go */ 387 si->ps.card_type = NV11; 388 si->ps.card_arch = NV10A; 389 sprintf(si->adi.name, "Nvidia Quadro2 MXR/EX/Go"); 390 sprintf(si->adi.chipset, "NV11"); 391 status = nvxx_general_powerup(); 392 break; 393 case 0x014010de: /* Nvidia GeForce FX 6600 GT */ 394 case 0x014110de: /* Nvidia GeForce FX 6600 */ 395 case 0x014210de: /* Nvidia GeForce FX 6600LE */ 396 si->ps.card_type = NV43; 397 si->ps.card_arch = NV40A; 398 sprintf(si->adi.name, "Nvidia GeForce FX 6600"); 399 sprintf(si->adi.chipset, "NV43"); 400 status = nvxx_general_powerup(); 401 break; 402 case 0x014310de: /* Nvidia unknown FX */ 403 si->ps.card_type = NV43; 404 si->ps.card_arch = NV40A; 405 sprintf(si->adi.name, "Nvidia unknown FX"); 406 sprintf(si->adi.chipset, "NV43"); 407 status = nvxx_general_powerup(); 408 break; 409 case 0x014410de: /* Nvidia GeForce FX 6600 Go */ 410 si->ps.card_type = NV43; 411 si->ps.card_arch = NV40A; 412 si->ps.laptop = true; 413 sprintf(si->adi.name, "Nvidia GeForce FX 6600 Go"); 414 sprintf(si->adi.chipset, "NV43"); 415 status = nvxx_general_powerup(); 416 break; 417 case 0x014510de: /* Nvidia GeForce FX 6610 XL */ 418 si->ps.card_type = NV43; 419 si->ps.card_arch = NV40A; 420 sprintf(si->adi.name, "Nvidia GeForce FX 6610 XL"); 421 sprintf(si->adi.chipset, "NV43"); 422 status = nvxx_general_powerup(); 423 break; 424 case 0x014710de: /* Nvidia GeForce FX 6700 XL */ 425 si->ps.card_type = NV43; 426 si->ps.card_arch = NV40A; 427 sprintf(si->adi.name, "Nvidia GeForce FX 6700 XL"); 428 sprintf(si->adi.chipset, "NV43"); 429 status = nvxx_general_powerup(); 430 break; 431 case 0x014610de: /* Nvidia GeForce FX 6600 TE Go / 6200 TE Go */ 432 case 0x014810de: /* Nvidia GeForce FX 6600 Go */ 433 case 0x014910de: /* Nvidia GeForce FX 6600 GT Go */ 434 si->ps.card_type = NV43; 435 si->ps.card_arch = NV40A; 436 si->ps.laptop = true; 437 sprintf(si->adi.name, "Nvidia GeForce FX 6600Go/6200Go"); 438 sprintf(si->adi.chipset, "NV43"); 439 status = nvxx_general_powerup(); 440 break; 441 case 0x014b10de: /* Nvidia unknown FX */ 442 case 0x014c10de: /* Nvidia unknown FX */ 443 case 0x014d10de: /* Nvidia unknown FX */ 444 si->ps.card_type = NV43; 445 si->ps.card_arch = NV40A; 446 sprintf(si->adi.name, "Nvidia unknown FX"); 447 sprintf(si->adi.chipset, "NV43"); 448 status = nvxx_general_powerup(); 449 break; 450 case 0x014e10de: /* Nvidia Quadro FX 540 */ 451 si->ps.card_type = NV43; 452 si->ps.card_arch = NV40A; 453 sprintf(si->adi.name, "Nvidia Quadro FX 540"); 454 sprintf(si->adi.chipset, "NV43"); 455 status = nvxx_general_powerup(); 456 break; 457 case 0x014f10de: /* Nvidia GeForce 6200 PCIe (128Mb) */ 458 si->ps.card_type = NV44; 459 si->ps.card_arch = NV40A; 460 sprintf(si->adi.name, "Nvidia GeForce 6200 PCIe 128Mb"); 461 sprintf(si->adi.chipset, "NV44"); 462 status = nvxx_general_powerup(); 463 break; 464 case 0x015010de: /* Nvidia GeForce2 GTS/Pro */ 465 case 0x015110de: /* Nvidia GeForce2 Ti DDR */ 466 case 0x015210de: /* Nvidia GeForce2 Ultra */ 467 si->ps.card_type = NV15; 468 si->ps.card_arch = NV10A; 469 sprintf(si->adi.name, "Nvidia GeForce2"); 470 sprintf(si->adi.chipset, "NV15"); 471 status = nvxx_general_powerup(); 472 break; 473 case 0x015310de: /* Nvidia Quadro2 Pro */ 474 si->ps.card_type = NV15; 475 si->ps.card_arch = NV10A; 476 sprintf(si->adi.name, "Nvidia Quadro2 Pro"); 477 sprintf(si->adi.chipset, "NV15"); 478 status = nvxx_general_powerup(); 479 break; 480 case 0x016010de: /* Nvidia GeForce 6500 Go */ 481 si->ps.card_type = NV44; 482 si->ps.card_arch = NV40A; 483 si->ps.laptop = true; 484 sprintf(si->adi.name, "Nvidia GeForce 6500 Go"); 485 sprintf(si->adi.chipset, "NV44"); 486 status = nvxx_general_powerup(); 487 break; 488 case 0x016110de: /* Nvidia GeForce 6200 TurboCache */ 489 si->ps.card_type = NV44; 490 si->ps.card_arch = NV40A; 491 sprintf(si->adi.name, "Nvidia GeForce 6200 TC"); 492 sprintf(si->adi.chipset, "NV44"); 493 status = nvxx_general_powerup(); 494 break; 495 case 0x016210de: /* Nvidia GeForce 6200SE TurboCache */ 496 si->ps.card_type = NV44; 497 si->ps.card_arch = NV40A; 498 sprintf(si->adi.name, "Nvidia GeForce 6200SE TC"); 499 sprintf(si->adi.chipset, "NV44"); 500 status = nvxx_general_powerup(); 501 break; 502 case 0x016310de: /* Nvidia GeForce 6200LE */ 503 si->ps.card_type = NV44; 504 si->ps.card_arch = NV40A; 505 sprintf(si->adi.name, "Nvidia GeForce 6200LE"); 506 sprintf(si->adi.chipset, "NV44"); 507 status = nvxx_general_powerup(); 508 break; 509 case 0x016410de: /* Nvidia GeForce FX 6200 Go */ 510 si->ps.card_type = NV44; 511 si->ps.card_arch = NV40A; 512 si->ps.laptop = true; 513 sprintf(si->adi.name, "Nvidia GeForce FX 6200 Go"); 514 sprintf(si->adi.chipset, "NV44"); 515 status = nvxx_general_powerup(); 516 break; 517 case 0x016510de: /* Nvidia Quadro FX NVS 285 */ 518 si->ps.card_type = NV44; 519 si->ps.card_arch = NV40A; 520 sprintf(si->adi.name, "Nvidia Quadro FX NVS 285"); 521 sprintf(si->adi.chipset, "NV44"); 522 status = nvxx_general_powerup(); 523 break; 524 case 0x016610de: /* Nvidia GeForce 6400 Go */ 525 si->ps.card_type = NV44; 526 si->ps.card_arch = NV40A; 527 si->ps.laptop = true; 528 sprintf(si->adi.name, "Nvidia GeForce 6400 Go"); 529 sprintf(si->adi.chipset, "NV44"); 530 status = nvxx_general_powerup(); 531 break; 532 case 0x016710de: /* Nvidia GeForce 6200 Go */ 533 si->ps.card_type = NV44; 534 si->ps.card_arch = NV40A; 535 si->ps.laptop = true; 536 sprintf(si->adi.name, "Nvidia GeForce 6200 Go"); 537 sprintf(si->adi.chipset, "NV44"); 538 status = nvxx_general_powerup(); 539 break; 540 case 0x016810de: /* Nvidia GeForce 6400 Go */ 541 si->ps.card_type = NV44; 542 si->ps.card_arch = NV40A; 543 si->ps.laptop = true; 544 sprintf(si->adi.name, "Nvidia GeForce 6400 Go"); 545 sprintf(si->adi.chipset, "NV44"); 546 status = nvxx_general_powerup(); 547 break; 548 case 0x016910de: /* Nvidia GeForce 6250 Go */ 549 si->ps.card_type = NV44; 550 si->ps.card_arch = NV40A; 551 si->ps.laptop = true; 552 sprintf(si->adi.name, "Nvidia GeForce 6250 Go"); 553 sprintf(si->adi.chipset, "NV44"); 554 status = nvxx_general_powerup(); 555 break; 556 case 0x016b10de: /* Nvidia unknown FX Go */ 557 case 0x016c10de: /* Nvidia unknown FX Go */ 558 case 0x016d10de: /* Nvidia unknown FX Go */ 559 si->ps.card_type = NV44; 560 si->ps.card_arch = NV40A; 561 si->ps.laptop = true; 562 sprintf(si->adi.name, "Nvidia unknown FX Go"); 563 sprintf(si->adi.chipset, "NV44"); 564 status = nvxx_general_powerup(); 565 break; 566 case 0x016e10de: /* Nvidia unknown FX */ 567 si->ps.card_type = NV44; 568 si->ps.card_arch = NV40A; 569 sprintf(si->adi.name, "Nvidia unknown FX"); 570 sprintf(si->adi.chipset, "NV44"); 571 status = nvxx_general_powerup(); 572 break; 573 case 0x017010de: /* Nvidia GeForce4 MX 460 */ 574 case 0x017110de: /* Nvidia GeForce4 MX 440 */ 575 case 0x017210de: /* Nvidia GeForce4 MX 420 */ 576 case 0x017310de: /* Nvidia GeForce4 MX 440SE */ 577 si->ps.card_type = NV17; 578 si->ps.card_arch = NV10A; 579 sprintf(si->adi.name, "Nvidia GeForce4 MX"); 580 sprintf(si->adi.chipset, "NV17"); 581 status = nvxx_general_powerup(); 582 break; 583 case 0x017410de: /* Nvidia GeForce4 440 Go */ 584 case 0x017510de: /* Nvidia GeForce4 420 Go */ 585 case 0x017610de: /* Nvidia GeForce4 420 Go 32M */ 586 case 0x017710de: /* Nvidia GeForce4 460 Go */ 587 case 0x017910de: /* Nvidia GeForce4 440 Go 64M (on PPC GeForce4 MX) */ 588 si->ps.card_type = NV17; 589 si->ps.card_arch = NV10A; 590 si->ps.laptop = true; 591 sprintf(si->adi.name, "Nvidia GeForce4 Go"); 592 sprintf(si->adi.chipset, "NV17"); 593 status = nvxx_general_powerup(); 594 break; 595 case 0x017810de: /* Nvidia Quadro4 500 XGL/550 XGL */ 596 case 0x017a10de: /* Nvidia Quadro4 200 NVS/400 NVS */ 597 si->ps.card_type = NV17; 598 si->ps.card_arch = NV10A; 599 sprintf(si->adi.name, "Nvidia Quadro4"); 600 sprintf(si->adi.chipset, "NV17"); 601 status = nvxx_general_powerup(); 602 break; 603 case 0x017c10de: /* Nvidia Quadro4 500 GoGL */ 604 si->ps.card_type = NV17; 605 si->ps.card_arch = NV10A; 606 si->ps.laptop = true; 607 sprintf(si->adi.name, "Nvidia Quadro4 500 GoGL"); 608 sprintf(si->adi.chipset, "NV17"); 609 status = nvxx_general_powerup(); 610 break; 611 case 0x017d10de: /* Nvidia GeForce4 410 Go 16M*/ 612 si->ps.card_type = NV17; 613 si->ps.card_arch = NV10A; 614 si->ps.laptop = true; 615 sprintf(si->adi.name, "Nvidia GeForce4 410 Go"); 616 sprintf(si->adi.chipset, "NV17"); 617 status = nvxx_general_powerup(); 618 break; 619 case 0x018110de: /* Nvidia GeForce4 MX 440 AGP8X */ 620 case 0x018210de: /* Nvidia GeForce4 MX 440SE AGP8X */ 621 case 0x018310de: /* Nvidia GeForce4 MX 420 AGP8X */ 622 case 0x018510de: /* Nvidia GeForce4 MX 4000 AGP8X */ 623 si->ps.card_type = NV18; 624 si->ps.card_arch = NV10A; 625 sprintf(si->adi.name, "Nvidia GeForce4 MX AGP8X"); 626 sprintf(si->adi.chipset, "NV18"); 627 status = nvxx_general_powerup(); 628 break; 629 case 0x018610de: /* Nvidia GeForce4 448 Go */ 630 case 0x018710de: /* Nvidia GeForce4 488 Go */ 631 si->ps.card_type = NV18; 632 si->ps.card_arch = NV10A; 633 si->ps.laptop = true; 634 sprintf(si->adi.name, "Nvidia GeForce4 Go"); 635 sprintf(si->adi.chipset, "NV18"); 636 status = nvxx_general_powerup(); 637 break; 638 case 0x018810de: /* Nvidia Quadro4 580 XGL */ 639 si->ps.card_type = NV18; 640 si->ps.card_arch = NV10A; 641 sprintf(si->adi.name, "Nvidia Quadro4"); 642 sprintf(si->adi.chipset, "NV18"); 643 status = nvxx_general_powerup(); 644 break; 645 case 0x018910de: /* Nvidia GeForce4 MX AGP8X (PPC) */ 646 si->ps.card_type = NV18; 647 si->ps.card_arch = NV10A; 648 sprintf(si->adi.name, "Nvidia GeForce4 MX AGP8X"); 649 sprintf(si->adi.chipset, "NV18"); 650 status = nvxx_general_powerup(); 651 break; 652 case 0x018a10de: /* Nvidia Quadro4 280 NVS AGP8X */ 653 case 0x018b10de: /* Nvidia Quadro4 380 XGL */ 654 case 0x018c10de: /* Nvidia Quadro4 NVS 50 PCI */ 655 si->ps.card_type = NV18; 656 si->ps.card_arch = NV10A; 657 sprintf(si->adi.name, "Nvidia Quadro4"); 658 sprintf(si->adi.chipset, "NV18"); 659 status = nvxx_general_powerup(); 660 break; 661 case 0x018d10de: /* Nvidia GeForce4 448 Go */ 662 si->ps.card_type = NV18; 663 si->ps.card_arch = NV10A; 664 si->ps.laptop = true; 665 sprintf(si->adi.name, "Nvidia GeForce4 Go"); 666 sprintf(si->adi.chipset, "NV18"); 667 status = nvxx_general_powerup(); 668 break; 669 case 0x01a010de: /* Nvidia GeForce2 Integrated GPU */ 670 si->ps.card_type = NV11; 671 si->ps.card_arch = NV10A; 672 sprintf(si->adi.name, "Nvidia GeForce2 Integrated GPU"); 673 sprintf(si->adi.chipset, "CRUSH, NV11"); 674 status = nvxx_general_powerup(); 675 break; 676 case 0x01d110de: /* Nvidia GeForce 7300 LE */ 677 case 0x01df10de: /* Nvidia GeForce 7300 GS */ 678 si->ps.card_type = G72; 679 si->ps.card_arch = NV40A; 680 sprintf(si->adi.name, "Nvidia GeForce 7300"); 681 sprintf(si->adi.chipset, "G72"); 682 status = nvxx_general_powerup(); 683 break; 684 case 0x01d810de: /* Nvidia GeForce 7400 GO */ 685 si->ps.card_type = G72; 686 si->ps.card_arch = NV40A; 687 sprintf(si->adi.name, "Nvidia GeForce 7400 Go"); 688 sprintf(si->adi.chipset, "G72"); 689 status = nvxx_general_powerup(); 690 break; 691 case 0x01f010de: /* Nvidia GeForce4 MX Integrated GPU */ 692 si->ps.card_type = NV17; 693 si->ps.card_arch = NV10A; 694 sprintf(si->adi.name, "Nvidia GeForce4 MX Integr. GPU"); 695 sprintf(si->adi.chipset, "NFORCE2, NV17"); 696 status = nvxx_general_powerup(); 697 break; 698 case 0x020010de: /* Nvidia GeForce3 */ 699 case 0x020110de: /* Nvidia GeForce3 Ti 200 */ 700 case 0x020210de: /* Nvidia GeForce3 Ti 500 */ 701 si->ps.card_type = NV20; 702 si->ps.card_arch = NV20A; 703 sprintf(si->adi.name, "Nvidia GeForce3"); 704 sprintf(si->adi.chipset, "NV20"); 705 status = nvxx_general_powerup(); 706 break; 707 case 0x020310de: /* Nvidia Quadro DCC */ 708 si->ps.card_type = NV20; 709 si->ps.card_arch = NV20A; 710 sprintf(si->adi.name, "Nvidia Quadro DCC"); 711 sprintf(si->adi.chipset, "NV20"); 712 status = nvxx_general_powerup(); 713 break; 714 case 0x021110de: /* Nvidia GeForce FX 6800 */ 715 case 0x021210de: /* Nvidia GeForce FX 6800LE */ 716 case 0x021510de: /* Nvidia GeForce FX 6800 GT */ 717 si->ps.card_type = NV45; /* NV48 is NV45 with 512Mb */ 718 si->ps.card_arch = NV40A; 719 sprintf(si->adi.name, "Nvidia GeForce FX 6800"); 720 sprintf(si->adi.chipset, "NV48"); 721 status = nvxx_general_powerup(); 722 break; 723 case 0x022010de: /* Nvidia unknown FX */ 724 si->ps.card_type = NV44; 725 si->ps.card_arch = NV40A; 726 sprintf(si->adi.name, "Nvidia unknown FX"); 727 sprintf(si->adi.chipset, "NV44"); 728 status = nvxx_general_powerup(); 729 break; 730 case 0x022110de: /* Nvidia GeForce 6200 AGP (256Mb - 128bit) */ 731 si->ps.card_type = NV44; 732 si->ps.card_arch = NV40A; 733 sprintf(si->adi.name, "Nvidia GeForce 6200 AGP 256Mb"); 734 sprintf(si->adi.chipset, "NV44"); 735 status = nvxx_general_powerup(); 736 break; 737 case 0x022210de: /* Nvidia unknown FX */ 738 si->ps.card_type = NV44; 739 si->ps.card_arch = NV40A; 740 sprintf(si->adi.name, "Nvidia unknown FX"); 741 sprintf(si->adi.chipset, "NV44"); 742 status = nvxx_general_powerup(); 743 break; 744 case 0x022810de: /* Nvidia unknown FX Go */ 745 si->ps.card_type = NV44; 746 si->ps.card_arch = NV40A; 747 si->ps.laptop = true; 748 sprintf(si->adi.name, "Nvidia unknown FX Go"); 749 sprintf(si->adi.chipset, "NV44"); 750 status = nvxx_general_powerup(); 751 break; 752 case 0x024010de: /* Nvidia GeForce 6150 (NFORCE4 Integr.GPU) */ 753 case 0x024110de: /* Nvidia GeForce 6150 LE (NFORCE4 Integr.GPU) */ 754 si->ps.card_type = NV44; 755 si->ps.card_arch = NV40A; 756 sprintf(si->adi.name, "Nvidia GeForce 6150"); 757 sprintf(si->adi.chipset, "NV44"); 758 status = nvxx_general_powerup(); 759 break; 760 case 0x024210de: /* Nvidia GeForce 6100 (NFORCE4 Integr.GPU) */ 761 si->ps.card_type = NV44; 762 si->ps.card_arch = NV40A; 763 sprintf(si->adi.name, "Nvidia GeForce 6100"); 764 sprintf(si->adi.chipset, "NV44"); 765 status = nvxx_general_powerup(); 766 break; 767 case 0x025010de: /* Nvidia GeForce4 Ti 4600 */ 768 case 0x025110de: /* Nvidia GeForce4 Ti 4400 */ 769 case 0x025210de: /* Nvidia GeForce4 Ti 4600 */ 770 case 0x025310de: /* Nvidia GeForce4 Ti 4200 */ 771 si->ps.card_type = NV25; 772 si->ps.card_arch = NV20A; 773 sprintf(si->adi.name, "Nvidia GeForce4 Ti"); 774 sprintf(si->adi.chipset, "NV25"); 775 status = nvxx_general_powerup(); 776 break; 777 case 0x025810de: /* Nvidia Quadro4 900 XGL */ 778 case 0x025910de: /* Nvidia Quadro4 750 XGL */ 779 case 0x025b10de: /* Nvidia Quadro4 700 XGL */ 780 si->ps.card_type = NV25; 781 si->ps.card_arch = NV20A; 782 sprintf(si->adi.name, "Nvidia Quadro4 XGL"); 783 sprintf(si->adi.chipset, "NV25"); 784 status = nvxx_general_powerup(); 785 break; 786 case 0x028010de: /* Nvidia GeForce4 Ti 4800 AGP8X */ 787 case 0x028110de: /* Nvidia GeForce4 Ti 4200 AGP8X */ 788 si->ps.card_type = NV28; 789 si->ps.card_arch = NV20A; 790 sprintf(si->adi.name, "Nvidia GeForce4 Ti AGP8X"); 791 sprintf(si->adi.chipset, "NV28"); 792 status = nvxx_general_powerup(); 793 break; 794 case 0x028210de: /* Nvidia GeForce4 Ti 4800SE */ 795 si->ps.card_type = NV28; 796 si->ps.card_arch = NV20A; 797 sprintf(si->adi.name, "Nvidia GeForce4 Ti 4800SE"); 798 sprintf(si->adi.chipset, "NV28"); 799 status = nvxx_general_powerup(); 800 break; 801 case 0x028610de: /* Nvidia GeForce4 4200 Go */ 802 si->ps.card_type = NV28; 803 si->ps.card_arch = NV20A; 804 si->ps.laptop = true; 805 sprintf(si->adi.name, "Nvidia GeForce4 4200 Go"); 806 sprintf(si->adi.chipset, "NV28"); 807 status = nvxx_general_powerup(); 808 break; 809 case 0x028810de: /* Nvidia Quadro4 980 XGL */ 810 case 0x028910de: /* Nvidia Quadro4 780 XGL */ 811 si->ps.card_type = NV28; 812 si->ps.card_arch = NV20A; 813 sprintf(si->adi.name, "Nvidia Quadro4 XGL"); 814 sprintf(si->adi.chipset, "NV28"); 815 status = nvxx_general_powerup(); 816 break; 817 case 0x028c10de: /* Nvidia Quadro4 700 GoGL */ 818 si->ps.card_type = NV28; 819 si->ps.card_arch = NV20A; 820 si->ps.laptop = true; 821 sprintf(si->adi.name, "Nvidia Quadro4 700 GoGL"); 822 sprintf(si->adi.chipset, "NV28"); 823 status = nvxx_general_powerup(); 824 break; 825 case 0x029010de: /* Nvidia GeForce 7900 GTX */ 826 case 0x029110de: /* Nvidia GeForce 7900 GT */ 827 si->ps.card_type = G71; 828 si->ps.card_arch = NV40A; 829 sprintf(si->adi.name, "Nvidia GeForce 7900 GT(X)"); 830 sprintf(si->adi.chipset, "G71"); 831 status = nvxx_general_powerup(); 832 break; 833 case 0x02a010de: /* Nvidia GeForce3 Integrated GPU */ 834 si->ps.card_type = NV20; 835 si->ps.card_arch = NV20A; 836 sprintf(si->adi.name, "Nvidia GeForce3 Integrated GPU"); 837 sprintf(si->adi.chipset, "XBOX, NV20"); 838 status = nvxx_general_powerup(); 839 break; 840 case 0x030110de: /* Nvidia GeForce FX 5800 Ultra */ 841 case 0x030210de: /* Nvidia GeForce FX 5800 */ 842 si->ps.card_type = NV30; 843 si->ps.card_arch = NV30A; 844 sprintf(si->adi.name, "Nvidia GeForce FX 5800"); 845 sprintf(si->adi.chipset, "NV30"); 846 status = nvxx_general_powerup(); 847 break; 848 case 0x030810de: /* Nvidia Quadro FX 2000 */ 849 case 0x030910de: /* Nvidia Quadro FX 1000 */ 850 si->ps.card_type = NV30; 851 si->ps.card_arch = NV30A; 852 sprintf(si->adi.name, "Nvidia Quadro FX"); 853 sprintf(si->adi.chipset, "NV30"); 854 status = nvxx_general_powerup(); 855 break; 856 case 0x031110de: /* Nvidia GeForce FX 5600 Ultra */ 857 case 0x031210de: /* Nvidia GeForce FX 5600 */ 858 si->ps.card_type = NV31; 859 si->ps.card_arch = NV30A; 860 sprintf(si->adi.name, "Nvidia GeForce FX 5600"); 861 sprintf(si->adi.chipset, "NV31"); 862 status = nvxx_general_powerup(); 863 break; 864 case 0x031310de: /* Nvidia unknown FX */ 865 si->ps.card_type = NV31; 866 si->ps.card_arch = NV30A; 867 sprintf(si->adi.name, "Nvidia unknown FX"); 868 sprintf(si->adi.chipset, "NV31"); 869 status = nvxx_general_powerup(); 870 break; 871 case 0x031410de: /* Nvidia GeForce FX 5600XT */ 872 si->ps.card_type = NV31; 873 si->ps.card_arch = NV30A; 874 sprintf(si->adi.name, "Nvidia GeForce FX 5600XT"); 875 sprintf(si->adi.chipset, "NV31"); 876 status = nvxx_general_powerup(); 877 break; 878 case 0x031610de: /* Nvidia unknown FX Go */ 879 case 0x031710de: /* Nvidia unknown FX Go */ 880 si->ps.card_type = NV31; 881 si->ps.card_arch = NV30A; 882 si->ps.laptop = true; 883 sprintf(si->adi.name, "Nvidia unknown FX Go"); 884 sprintf(si->adi.chipset, "NV31"); 885 status = nvxx_general_powerup(); 886 break; 887 case 0x031a10de: /* Nvidia GeForce FX 5600 Go */ 888 si->ps.card_type = NV31; 889 si->ps.card_arch = NV30A; 890 si->ps.laptop = true; 891 sprintf(si->adi.name, "Nvidia GeForce FX 5600 Go"); 892 sprintf(si->adi.chipset, "NV31"); 893 status = nvxx_general_powerup(); 894 break; 895 case 0x031b10de: /* Nvidia GeForce FX 5650 Go */ 896 si->ps.card_type = NV31; 897 si->ps.card_arch = NV30A; 898 si->ps.laptop = true; 899 sprintf(si->adi.name, "Nvidia GeForce FX 5650 Go"); 900 sprintf(si->adi.chipset, "NV31"); 901 status = nvxx_general_powerup(); 902 break; 903 case 0x031c10de: /* Nvidia Quadro FX 700 Go */ 904 si->ps.card_type = NV31; 905 si->ps.card_arch = NV30A; 906 si->ps.laptop = true; 907 sprintf(si->adi.name, "Nvidia Quadro FX 700 Go"); 908 sprintf(si->adi.chipset, "NV31"); 909 status = nvxx_general_powerup(); 910 break; 911 case 0x031d10de: /* Nvidia unknown FX Go */ 912 case 0x031e10de: /* Nvidia unknown FX Go */ 913 case 0x031f10de: /* Nvidia unknown FX Go */ 914 si->ps.card_type = NV31; 915 si->ps.card_arch = NV30A; 916 si->ps.laptop = true; 917 sprintf(si->adi.name, "Nvidia unknown FX Go"); 918 sprintf(si->adi.chipset, "NV31"); 919 status = nvxx_general_powerup(); 920 break; 921 case 0x032010de: /* Nvidia GeForce FX 5200 */ 922 case 0x032110de: /* Nvidia GeForce FX 5200 Ultra */ 923 case 0x032210de: /* Nvidia GeForce FX 5200 */ 924 case 0x032310de: /* Nvidia GeForce FX 5200LE */ 925 si->ps.card_type = NV34; 926 si->ps.card_arch = NV30A; 927 sprintf(si->adi.name, "Nvidia GeForce FX 5200"); 928 sprintf(si->adi.chipset, "NV34"); 929 status = nvxx_general_powerup(); 930 break; 931 case 0x032410de: /* Nvidia GeForce FX 5200 Go */ 932 si->ps.card_type = NV34; 933 si->ps.card_arch = NV30A; 934 si->ps.laptop = true; 935 sprintf(si->adi.name, "Nvidia GeForce FX 5200 Go"); 936 sprintf(si->adi.chipset, "NV34"); 937 status = nvxx_general_powerup(); 938 break; 939 case 0x032510de: /* Nvidia GeForce FX 5250 Go */ 940 si->ps.card_type = NV34; 941 si->ps.card_arch = NV30A; 942 si->ps.laptop = true; 943 sprintf(si->adi.name, "Nvidia GeForce FX 5250 Go"); 944 sprintf(si->adi.chipset, "NV34"); 945 status = nvxx_general_powerup(); 946 break; 947 case 0x032610de: /* Nvidia GeForce FX 5500 */ 948 si->ps.card_type = NV34; 949 si->ps.card_arch = NV30A; 950 sprintf(si->adi.name, "Nvidia GeForce FX 5500"); 951 sprintf(si->adi.chipset, "NV34"); 952 status = nvxx_general_powerup(); 953 break; 954 case 0x032710de: /* Nvidia GeForce FX 5100 */ 955 si->ps.card_type = NV34; 956 si->ps.card_arch = NV30A; 957 sprintf(si->adi.name, "Nvidia GeForce FX 5100"); 958 sprintf(si->adi.chipset, "NV34"); 959 status = nvxx_general_powerup(); 960 break; 961 case 0x032810de: /* Nvidia GeForce FX 5200 Go 32M/64M */ 962 si->ps.card_type = NV34; 963 si->ps.card_arch = NV30A; 964 si->ps.laptop = true; 965 sprintf(si->adi.name, "Nvidia GeForce FX 5200 Go"); 966 sprintf(si->adi.chipset, "NV34"); 967 status = nvxx_general_powerup(); 968 break; 969 case 0x032910de: /* Nvidia GeForce FX 5200 (PPC) */ 970 si->ps.card_type = NV34; 971 si->ps.card_arch = NV30A; 972 sprintf(si->adi.name, "Nvidia GeForce FX 5200"); 973 sprintf(si->adi.chipset, "NV34"); 974 status = nvxx_general_powerup(); 975 break; 976 case 0x032a10de: /* Nvidia Quadro NVS 280 PCI */ 977 si->ps.card_type = NV34; 978 si->ps.card_arch = NV30A; 979 sprintf(si->adi.name, "Nvidia Quadro NVS 280 PCI"); 980 sprintf(si->adi.chipset, "NV34"); 981 status = nvxx_general_powerup(); 982 break; 983 case 0x032b10de: /* Nvidia Quadro FX 500/600 PCI */ 984 si->ps.card_type = NV34; 985 si->ps.card_arch = NV30A; 986 sprintf(si->adi.name, "Nvidia Quadro FX 500/600 PCI"); 987 sprintf(si->adi.chipset, "NV34"); 988 status = nvxx_general_powerup(); 989 break; 990 case 0x032c10de: /* Nvidia GeForce FX 5300 Go */ 991 case 0x032d10de: /* Nvidia GeForce FX 5100 Go */ 992 si->ps.card_type = NV34; 993 si->ps.card_arch = NV30A; 994 si->ps.laptop = true; 995 sprintf(si->adi.name, "Nvidia GeForce FX Go"); 996 sprintf(si->adi.chipset, "NV34"); 997 status = nvxx_general_powerup(); 998 break; 999 case 0x032e10de: /* Nvidia unknown FX Go */ 1000 case 0x032f10de: /* Nvidia unknown FX Go */ 1001 si->ps.card_type = NV34; 1002 si->ps.card_arch = NV30A; 1003 si->ps.laptop = true; 1004 sprintf(si->adi.name, "Nvidia unknown FX Go"); 1005 sprintf(si->adi.chipset, "NV34"); 1006 status = nvxx_general_powerup(); 1007 break; 1008 case 0x033010de: /* Nvidia GeForce FX 5900 Ultra */ 1009 case 0x033110de: /* Nvidia GeForce FX 5900 */ 1010 si->ps.card_type = NV35; 1011 si->ps.card_arch = NV30A; 1012 sprintf(si->adi.name, "Nvidia GeForce FX 5900"); 1013 sprintf(si->adi.chipset, "NV35"); 1014 status = nvxx_general_powerup(); 1015 break; 1016 case 0x033210de: /* Nvidia GeForce FX 5900 XT */ 1017 si->ps.card_type = NV35; 1018 si->ps.card_arch = NV30A; 1019 sprintf(si->adi.name, "Nvidia GeForce FX 5900 XT"); 1020 sprintf(si->adi.chipset, "NV35"); 1021 status = nvxx_general_powerup(); 1022 break; 1023 case 0x033310de: /* Nvidia GeForce FX 5950 Ultra */ 1024 si->ps.card_type = NV38; 1025 si->ps.card_arch = NV30A; 1026 sprintf(si->adi.name, "Nvidia GeForce FX 5950 Ultra"); 1027 sprintf(si->adi.chipset, "NV38"); 1028 status = nvxx_general_powerup(); 1029 break; 1030 case 0x033410de: /* Nvidia GeForce FX 5900 ZT */ 1031 si->ps.card_type = NV38; 1032 si->ps.card_arch = NV30A; 1033 sprintf(si->adi.name, "Nvidia GeForce FX 5900 ZT"); 1034 sprintf(si->adi.chipset, "NV38(?)"); 1035 status = nvxx_general_powerup(); 1036 break; 1037 case 0x033810de: /* Nvidia Quadro FX 3000 */ 1038 si->ps.card_type = NV35; 1039 si->ps.card_arch = NV30A; 1040 sprintf(si->adi.name, "Nvidia Quadro FX 3000"); 1041 sprintf(si->adi.chipset, "NV35"); 1042 status = nvxx_general_powerup(); 1043 break; 1044 case 0x033f10de: /* Nvidia Quadro FX 700 */ 1045 si->ps.card_type = NV35; 1046 si->ps.card_arch = NV30A; 1047 sprintf(si->adi.name, "Nvidia Quadro FX 700"); 1048 sprintf(si->adi.chipset, "NV35"); 1049 status = nvxx_general_powerup(); 1050 break; 1051 case 0x034110de: /* Nvidia GeForce FX 5700 Ultra */ 1052 case 0x034210de: /* Nvidia GeForce FX 5700 */ 1053 case 0x034310de: /* Nvidia GeForce FX 5700LE */ 1054 case 0x034410de: /* Nvidia GeForce FX 5700VE */ 1055 si->ps.card_type = NV36; 1056 si->ps.card_arch = NV30A; 1057 sprintf(si->adi.name, "Nvidia GeForce FX 5700"); 1058 sprintf(si->adi.chipset, "NV36"); 1059 status = nvxx_general_powerup(); 1060 break; 1061 case 0x034510de: /* Nvidia unknown FX */ 1062 si->ps.card_type = NV36; 1063 si->ps.card_arch = NV30A; 1064 sprintf(si->adi.name, "Nvidia unknown FX"); 1065 sprintf(si->adi.chipset, "NV36"); 1066 status = nvxx_general_powerup(); 1067 break; 1068 case 0x034710de: /* Nvidia GeForce FX 5700 Go */ 1069 case 0x034810de: /* Nvidia GeForce FX 5700 Go */ 1070 si->ps.card_type = NV36; 1071 si->ps.card_arch = NV30A; 1072 si->ps.laptop = true; 1073 sprintf(si->adi.name, "Nvidia GeForce FX 5700 Go"); 1074 sprintf(si->adi.chipset, "NV36"); 1075 status = nvxx_general_powerup(); 1076 break; 1077 case 0x034910de: /* Nvidia unknown FX Go */ 1078 case 0x034b10de: /* Nvidia unknown FX Go */ 1079 si->ps.card_type = NV36; 1080 si->ps.card_arch = NV30A; 1081 si->ps.laptop = true; 1082 sprintf(si->adi.name, "Nvidia unknown FX Go"); 1083 sprintf(si->adi.chipset, "NV36"); 1084 status = nvxx_general_powerup(); 1085 break; 1086 case 0x034c10de: /* Nvidia Quadro FX 1000 Go */ 1087 si->ps.card_type = NV36; 1088 si->ps.card_arch = NV30A; 1089 si->ps.laptop = true; 1090 sprintf(si->adi.name, "Nvidia Quadro FX 1000 Go"); 1091 sprintf(si->adi.chipset, "NV36"); 1092 status = nvxx_general_powerup(); 1093 break; 1094 case 0x034e10de: /* Nvidia Quadro FX 1100 */ 1095 si->ps.card_type = NV36; 1096 si->ps.card_arch = NV30A; 1097 sprintf(si->adi.name, "Nvidia Quadro FX 1100"); 1098 sprintf(si->adi.chipset, "NV36"); 1099 status = nvxx_general_powerup(); 1100 break; 1101 case 0x034f10de: /* Nvidia unknown FX */ 1102 si->ps.card_type = NV36; 1103 si->ps.card_arch = NV30A; 1104 sprintf(si->adi.name, "Nvidia unknown FX"); 1105 sprintf(si->adi.chipset, "NV36(?)"); 1106 status = nvxx_general_powerup(); 1107 break; 1108 case 0x039110de: /* Nvidia GeForce 7600 GT */ 1109 si->ps.card_type = G73; 1110 si->ps.card_arch = NV40A; 1111 sprintf(si->adi.name, "Nvidia GeForce 7600 GT"); 1112 sprintf(si->adi.chipset, "G73"); 1113 status = nvxx_general_powerup(); 1114 break; 1115 case 0x039210de: /* Nvidia GeForce 7600 GS */ 1116 case 0x02e110de: 1117 si->ps.card_type = G73; 1118 si->ps.card_arch = NV40A; 1119 sprintf(si->adi.name, "Nvidia GeForce 7600 GS"); 1120 sprintf(si->adi.chipset, "G73"); 1121 status = nvxx_general_powerup(); 1122 break; 1123 case 0x039310de: /* Nvidia GeForce 7300 GT */ 1124 si->ps.card_type = G73; 1125 si->ps.card_arch = NV40A; 1126 sprintf(si->adi.name, "Nvidia GeForce 7300 GT"); 1127 sprintf(si->adi.chipset, "G73"); 1128 status = nvxx_general_powerup(); 1129 break; 1130 case 0x039810de: /* Nvidia GeForce 7600 GO */ 1131 si->ps.card_type = G73; 1132 si->ps.card_arch = NV40A; 1133 si->ps.laptop = true; 1134 sprintf(si->adi.name, "Nvidia GeForce 7600 GO"); 1135 sprintf(si->adi.chipset, "G73"); 1136 status = nvxx_general_powerup(); 1137 break; 1138 /* Vendor Elsa GmbH */ 1139 case 0x0c601048: /* Elsa Gladiac Geforce2 MX */ 1140 si->ps.card_type = NV11; 1141 si->ps.card_arch = NV10A; 1142 sprintf(si->adi.name, "Elsa Gladiac Geforce2 MX"); 1143 sprintf(si->adi.chipset, "NV11"); 1144 status = nvxx_general_powerup(); 1145 break; 1146 /* Vendor Nvidia STB/SGS-Thompson */ 1147 case 0x002012d2: /* Nvidia STB/SGS-Thompson TNT1 */ 1148 si->ps.card_type = NV04; 1149 si->ps.card_arch = NV04A; 1150 sprintf(si->adi.name, "Nvidia STB/SGS-Thompson TNT1"); 1151 sprintf(si->adi.chipset, "NV04"); 1152 status = nvxx_general_powerup(); 1153 break; 1154 case 0x002812d2: /* Nvidia STB/SGS-Thompson TNT2 (pro) */ 1155 case 0x002912d2: /* Nvidia STB/SGS-Thompson TNT2 Ultra */ 1156 case 0x002a12d2: /* Nvidia STB/SGS-Thompson TNT2 */ 1157 case 0x002b12d2: /* Nvidia STB/SGS-Thompson TNT2 */ 1158 si->ps.card_type = NV05; 1159 si->ps.card_arch = NV04A; 1160 sprintf(si->adi.name, "Nvidia STB/SGS-Thompson TNT2"); 1161 sprintf(si->adi.chipset, "NV05"); 1162 status = nvxx_general_powerup(); 1163 break; 1164 case 0x002c12d2: /* Nvidia STB/SGS-Thompson Vanta (Lt) */ 1165 si->ps.card_type = NV05; 1166 si->ps.card_arch = NV04A; 1167 sprintf(si->adi.name, "Nvidia STB/SGS-Thompson Vanta"); 1168 sprintf(si->adi.chipset, "NV05"); 1169 status = nvxx_general_powerup(); 1170 break; 1171 case 0x002d12d2: /* Nvidia STB/SGS-Thompson TNT2-M64 (Pro) */ 1172 si->ps.card_type = NV05M64; 1173 si->ps.card_arch = NV04A; 1174 sprintf(si->adi.name, "Nvidia STB/SGS-Thompson TNT2M64"); 1175 sprintf(si->adi.chipset, "NV05 model 64"); 1176 status = nvxx_general_powerup(); 1177 break; 1178 case 0x002e12d2: /* Nvidia STB/SGS-Thompson NV06 Vanta */ 1179 case 0x002f12d2: /* Nvidia STB/SGS-Thompson NV06 Vanta */ 1180 si->ps.card_type = NV06; 1181 si->ps.card_arch = NV04A; 1182 sprintf(si->adi.name, "Nvidia STB/SGS-Thompson Vanta"); 1183 sprintf(si->adi.chipset, "NV06"); 1184 status = nvxx_general_powerup(); 1185 break; 1186 case 0x00a012d2: /* Nvidia STB/SGS-Thompson Aladdin TNT2 */ 1187 si->ps.card_type = NV05; 1188 si->ps.card_arch = NV04A; 1189 sprintf(si->adi.name, "Nvidia STB/SGS-Thompson TNT2"); 1190 sprintf(si->adi.chipset, "NV05"); 1191 status = nvxx_general_powerup(); 1192 break; 1193 /* Vendor Varisys Limited */ 1194 case 0x35031888: /* Varisys GeForce4 MX440 */ 1195 si->ps.card_type = NV17; 1196 si->ps.card_arch = NV10A; 1197 sprintf(si->adi.name, "Varisys GeForce4 MX440"); 1198 sprintf(si->adi.chipset, "NV17"); 1199 status = nvxx_general_powerup(); 1200 break; 1201 case 0x35051888: /* Varisys GeForce4 Ti 4200 */ 1202 si->ps.card_type = NV25; 1203 si->ps.card_arch = NV20A; 1204 sprintf(si->adi.name, "Varisys GeForce4 Ti 4200"); 1205 sprintf(si->adi.chipset, "NV25"); 1206 status = nvxx_general_powerup(); 1207 break; 1208 default: 1209 LOG(8,("POWERUP: Failed to detect valid card 0x%08x\n",CFGR(DEVID))); 1210 return B_ERROR; 1211 } 1212 1213 return status; 1214 } 1215 1216 static status_t test_ram() 1217 { 1218 uint32 value, offset; 1219 status_t result = B_OK; 1220 1221 /* make sure we don't corrupt the hardware cursor by using fbc.frame_buffer. */ 1222 if (si->fbc.frame_buffer == NULL) 1223 { 1224 LOG(8,("INIT: test_ram detected NULL pointer.\n")); 1225 return B_ERROR; 1226 } 1227 1228 for (offset = 0, value = 0x55aa55aa; offset < 256; offset++) 1229 { 1230 /* write testpattern to cardRAM */ 1231 ((uint32 *)si->fbc.frame_buffer)[offset] = value; 1232 /* toggle testpattern */ 1233 value = 0xffffffff - value; 1234 } 1235 1236 for (offset = 0, value = 0x55aa55aa; offset < 256; offset++) 1237 { 1238 /* readback and verify testpattern from cardRAM */ 1239 if (((uint32 *)si->fbc.frame_buffer)[offset] != value) result = B_ERROR; 1240 /* toggle testpattern */ 1241 value = 0xffffffff - value; 1242 } 1243 return result; 1244 } 1245 1246 /* NOTE: 1247 * This routine *has* to be done *after* SetDispplayMode has been executed, 1248 * or test results will not be representative! 1249 * (CAS latency is dependant on NV setup on some (DRAM) boards) */ 1250 status_t nv_set_cas_latency() 1251 { 1252 status_t result = B_ERROR; 1253 uint8 latency = 0; 1254 1255 /* check current RAM access to see if we need to change anything */ 1256 if (test_ram() == B_OK) 1257 { 1258 LOG(4,("INIT: RAM access OK.\n")); 1259 return B_OK; 1260 } 1261 1262 /* check if we read PINS at starttime so we have valid registersettings at our disposal */ 1263 if (si->ps.pins_status != B_OK) 1264 { 1265 LOG(4,("INIT: RAM access errors; not fixable: PINS was not read from cardBIOS.\n")); 1266 return B_ERROR; 1267 } 1268 1269 /* OK. We might have a problem, try to fix it now.. */ 1270 LOG(4,("INIT: RAM access errors; tuning CAS latency if prudent...\n")); 1271 1272 switch(si->ps.card_type) 1273 { 1274 default: 1275 LOG(4,("INIT: RAM CAS tuning not implemented for this card, aborting.\n")); 1276 return B_OK; 1277 break; 1278 } 1279 if (result == B_OK) 1280 LOG(4,("INIT: RAM access OK. CAS latency set to %d cycles.\n", latency)); 1281 else 1282 LOG(4,("INIT: RAM access not fixable. CAS latency set to %d cycles.\n", latency)); 1283 1284 return result; 1285 } 1286 1287 void setup_virtualized_heads(bool cross) 1288 { 1289 if (cross) 1290 { 1291 head1_interrupt_enable = (crtc_interrupt_enable) nv_crtc2_interrupt_enable; 1292 head1_update_fifo = (crtc_update_fifo) nv_crtc2_update_fifo; 1293 head1_validate_timing = (crtc_validate_timing) nv_crtc2_validate_timing; 1294 head1_set_timing = (crtc_set_timing) nv_crtc2_set_timing; 1295 head1_depth = (crtc_depth) nv_crtc2_depth; 1296 head1_dpms = (crtc_dpms) nv_crtc2_dpms; 1297 head1_set_display_pitch = (crtc_set_display_pitch) nv_crtc2_set_display_pitch; 1298 head1_set_display_start = (crtc_set_display_start) nv_crtc2_set_display_start; 1299 head1_cursor_init = (crtc_cursor_init) nv_crtc2_cursor_init; 1300 head1_cursor_show = (crtc_cursor_show) nv_crtc2_cursor_show; 1301 head1_cursor_hide = (crtc_cursor_hide) nv_crtc2_cursor_hide; 1302 head1_cursor_define = (crtc_cursor_define) nv_crtc2_cursor_define; 1303 head1_cursor_position = (crtc_cursor_position) nv_crtc2_cursor_position; 1304 head1_stop_tvout = (crtc_stop_tvout) nv_crtc2_stop_tvout; 1305 head1_start_tvout = (crtc_start_tvout) nv_crtc2_start_tvout; 1306 1307 head1_mode = (dac_mode) nv_dac2_mode; 1308 head1_palette = (dac_palette) nv_dac2_palette; 1309 head1_set_pix_pll = (dac_set_pix_pll) nv_dac2_set_pix_pll; 1310 head1_pix_pll_find = (dac_pix_pll_find) nv_dac2_pix_pll_find; 1311 1312 head2_interrupt_enable = (crtc_interrupt_enable) nv_crtc_interrupt_enable; 1313 head2_update_fifo = (crtc_update_fifo) nv_crtc_update_fifo; 1314 head2_validate_timing = (crtc_validate_timing) nv_crtc_validate_timing; 1315 head2_set_timing = (crtc_set_timing) nv_crtc_set_timing; 1316 head2_depth = (crtc_depth) nv_crtc_depth; 1317 head2_dpms = (crtc_dpms) nv_crtc_dpms; 1318 head2_set_display_pitch = (crtc_set_display_pitch) nv_crtc_set_display_pitch; 1319 head2_set_display_start = (crtc_set_display_start) nv_crtc_set_display_start; 1320 head2_cursor_init = (crtc_cursor_init) nv_crtc_cursor_init; 1321 head2_cursor_show = (crtc_cursor_show) nv_crtc_cursor_show; 1322 head2_cursor_hide = (crtc_cursor_hide) nv_crtc_cursor_hide; 1323 head2_cursor_define = (crtc_cursor_define) nv_crtc_cursor_define; 1324 head2_cursor_position = (crtc_cursor_position) nv_crtc_cursor_position; 1325 head2_stop_tvout = (crtc_stop_tvout) nv_crtc_stop_tvout; 1326 head2_start_tvout = (crtc_start_tvout) nv_crtc_start_tvout; 1327 1328 head2_mode = (dac_mode) nv_dac_mode; 1329 head2_palette = (dac_palette) nv_dac_palette; 1330 head2_set_pix_pll = (dac_set_pix_pll) nv_dac_set_pix_pll; 1331 head2_pix_pll_find = (dac_pix_pll_find) nv_dac_pix_pll_find; 1332 } 1333 else 1334 { 1335 head1_interrupt_enable = (crtc_interrupt_enable) nv_crtc_interrupt_enable; 1336 head1_update_fifo = (crtc_update_fifo) nv_crtc_update_fifo; 1337 head1_validate_timing = (crtc_validate_timing) nv_crtc_validate_timing; 1338 head1_set_timing = (crtc_set_timing) nv_crtc_set_timing; 1339 head1_depth = (crtc_depth) nv_crtc_depth; 1340 head1_dpms = (crtc_dpms) nv_crtc_dpms; 1341 head1_set_display_pitch = (crtc_set_display_pitch) nv_crtc_set_display_pitch; 1342 head1_set_display_start = (crtc_set_display_start) nv_crtc_set_display_start; 1343 head1_cursor_init = (crtc_cursor_init) nv_crtc_cursor_init; 1344 head1_cursor_show = (crtc_cursor_show) nv_crtc_cursor_show; 1345 head1_cursor_hide = (crtc_cursor_hide) nv_crtc_cursor_hide; 1346 head1_cursor_define = (crtc_cursor_define) nv_crtc_cursor_define; 1347 head1_cursor_position = (crtc_cursor_position) nv_crtc_cursor_position; 1348 head1_stop_tvout = (crtc_stop_tvout) nv_crtc_stop_tvout; 1349 head1_start_tvout = (crtc_start_tvout) nv_crtc_start_tvout; 1350 1351 head1_mode = (dac_mode) nv_dac_mode; 1352 head1_palette = (dac_palette) nv_dac_palette; 1353 head1_set_pix_pll = (dac_set_pix_pll) nv_dac_set_pix_pll; 1354 head1_pix_pll_find = (dac_pix_pll_find) nv_dac_pix_pll_find; 1355 1356 head2_interrupt_enable = (crtc_interrupt_enable) nv_crtc2_interrupt_enable; 1357 head2_update_fifo = (crtc_update_fifo) nv_crtc2_update_fifo; 1358 head2_validate_timing = (crtc_validate_timing) nv_crtc2_validate_timing; 1359 head2_set_timing = (crtc_set_timing) nv_crtc2_set_timing; 1360 head2_depth = (crtc_depth) nv_crtc2_depth; 1361 head2_dpms = (crtc_dpms) nv_crtc2_dpms; 1362 head2_set_display_pitch = (crtc_set_display_pitch) nv_crtc2_set_display_pitch; 1363 head2_set_display_start = (crtc_set_display_start) nv_crtc2_set_display_start; 1364 head2_cursor_init = (crtc_cursor_init) nv_crtc2_cursor_init; 1365 head2_cursor_show = (crtc_cursor_show) nv_crtc2_cursor_show; 1366 head2_cursor_hide = (crtc_cursor_hide) nv_crtc2_cursor_hide; 1367 head2_cursor_define = (crtc_cursor_define) nv_crtc2_cursor_define; 1368 head2_cursor_position = (crtc_cursor_position) nv_crtc2_cursor_position; 1369 head2_stop_tvout = (crtc_stop_tvout) nv_crtc2_stop_tvout; 1370 head2_start_tvout = (crtc_start_tvout) nv_crtc2_start_tvout; 1371 1372 head2_mode = (dac_mode) nv_dac2_mode; 1373 head2_palette = (dac_palette) nv_dac2_palette; 1374 head2_set_pix_pll = (dac_set_pix_pll) nv_dac2_set_pix_pll; 1375 head2_pix_pll_find = (dac_pix_pll_find) nv_dac2_pix_pll_find; 1376 } 1377 } 1378 1379 void set_crtc_owner(bool head) 1380 { 1381 if (si->ps.secondary_head) 1382 { 1383 if (!head) 1384 { 1385 /* note: 'OWNER' is a non-standard register in behaviour(!) on NV11's, 1386 * while non-NV11 cards behave normally. 1387 * 1388 * Double-write action needed on those strange NV11 cards: */ 1389 /* RESET: needed on NV11 */ 1390 CRTCW(OWNER, 0xff); 1391 /* enable access to CRTC1, SEQ1, GRPH1, ATB1, ??? */ 1392 CRTCW(OWNER, 0x00); 1393 } 1394 else 1395 { 1396 /* note: 'OWNER' is a non-standard register in behaviour(!) on NV11's, 1397 * while non-NV11 cards behave normally. 1398 * 1399 * Double-write action needed on those strange NV11 cards: */ 1400 /* RESET: needed on NV11 */ 1401 CRTC2W(OWNER, 0xff); 1402 /* enable access to CRTC2, SEQ2, GRPH2, ATB2, ??? */ 1403 CRTC2W(OWNER, 0x03); 1404 } 1405 } 1406 } 1407 1408 static status_t nvxx_general_powerup() 1409 { 1410 LOG(4, ("INIT: NV powerup\n")); 1411 LOG(4,("POWERUP: Detected %s (%s)\n", si->adi.name, si->adi.chipset)); 1412 1413 /* setup cardspecs */ 1414 /* note: 1415 * this MUST be done before the driver attempts a card coldstart */ 1416 set_specs(); 1417 1418 /* only process BIOS for finetuning specs and coldstarting card if requested 1419 * by the user; 1420 * note: 1421 * this in fact frees the driver from relying on the BIOS to be executed 1422 * at system power-up POST time. */ 1423 if (!si->settings.usebios) 1424 { 1425 /* Make sure we are running in PCI (not AGP) mode: 1426 * This is a requirement for safely coldstarting cards! 1427 * (some cards reset their AGP PLL during startup which makes acceleration 1428 * engine DMA fail later on. A reboot is needed to overcome that.) 1429 * Note: 1430 * This may only be done when no transfers are in progress on the bus, so now 1431 * is probably a good time.. */ 1432 nv_agp_setup(false); 1433 1434 LOG(2, ("INIT: Attempting card coldstart!\n")); 1435 /* update the cardspecs in the shared_info PINS struct according to reported 1436 * specs as much as is possible; 1437 * this also coldstarts the card if possible (executes BIOS CMD script(s)) */ 1438 parse_pins(); 1439 } 1440 else 1441 { 1442 LOG(2, ("INIT: Skipping card coldstart!\n")); 1443 } 1444 1445 unlock_card(); 1446 1447 /* get RAM size, detect TV encoder and do fake panel startup (panel init code 1448 * is still missing). */ 1449 fake_panel_start(); 1450 1451 /* log the final card specifications */ 1452 dump_pins(); 1453 1454 /* dump config space as it is after a possible coldstart attempt */ 1455 if (si->settings.logmask & 0x80000000) nv_dump_configuration_space(); 1456 1457 /* setup CRTC and DAC functions access: determined in fake_panel_start */ 1458 setup_virtualized_heads(si->ps.crtc2_prim); 1459 1460 /* do powerup needed from pre-inited card state as done by system POST cardBIOS 1461 * execution or driver coldstart above */ 1462 return nv_general_bios_to_powergraphics(); 1463 } 1464 1465 /* this routine switches the CRTC/DAC sets to 'connectors', but only for analog 1466 * outputs. We need this to make sure the analog 'switch' is set in the same way the 1467 * digital 'switch' is set by the BIOS or we might not be able to use dualhead. */ 1468 status_t nv_general_output_select(bool cross) 1469 { 1470 /* make sure this call is warranted */ 1471 if (si->ps.secondary_head) 1472 { 1473 /* NV11 cards can't switch heads (confirmed) */ 1474 if (si->ps.card_type != NV11) 1475 { 1476 if (cross) 1477 { 1478 LOG(4,("INIT: switching analog outputs to be cross-connected\n")); 1479 1480 /* enable head 2 on connector 1 */ 1481 /* (b8 = select CRTC (head) for output, 1482 * b4 = ??? (confirmed not to be a FP switch), 1483 * b0 = enable CRT) */ 1484 DACW(OUTPUT, 0x00000101); 1485 /* enable head 1 on connector 2 */ 1486 DAC2W(OUTPUT, 0x00000001); 1487 } 1488 else 1489 { 1490 LOG(4,("INIT: switching analog outputs to be straight-through\n")); 1491 1492 /* enable head 1 on connector 1 */ 1493 DACW(OUTPUT, 0x00000001); 1494 /* enable head 2 on connector 2 */ 1495 DAC2W(OUTPUT, 0x00000101); 1496 } 1497 } 1498 else 1499 { 1500 LOG(4,("INIT: NV11 analog outputs are hardwired to be straight-through\n")); 1501 } 1502 return B_OK; 1503 } 1504 else 1505 { 1506 return B_ERROR; 1507 } 1508 } 1509 1510 /* this routine switches CRTC/DAC set use. We need this because it's unknown howto 1511 * switch digital panels to/from a specific CRTC/DAC set. */ 1512 status_t nv_general_head_select(bool cross) 1513 { 1514 /* make sure this call is warranted */ 1515 if (si->ps.secondary_head) 1516 { 1517 /* invert CRTC/DAC use to do switching */ 1518 if (cross) 1519 { 1520 LOG(4,("INIT: switching CRTC/DAC use to be cross-connected\n")); 1521 si->crtc_switch_mode = !si->ps.crtc2_prim; 1522 } 1523 else 1524 { 1525 LOG(4,("INIT: switching CRTC/DAC use to be straight-through\n")); 1526 si->crtc_switch_mode = si->ps.crtc2_prim; 1527 } 1528 /* update CRTC and DAC functions access */ 1529 setup_virtualized_heads(si->crtc_switch_mode); 1530 1531 return B_OK; 1532 } 1533 else 1534 { 1535 return B_ERROR; 1536 } 1537 } 1538 1539 static void unlock_card(void) 1540 { 1541 /* power-up all nvidia hardware function blocks */ 1542 /* bit 28: OVERLAY ENGINE (BES), 1543 * bit 25: CRTC2, (> NV04A) 1544 * bit 24: CRTC1, 1545 * bit 20: framebuffer, 1546 * bit 16: PPMI, 1547 * bit 12: PGRAPH, 1548 * bit 8: PFIFO, 1549 * bit 4: PMEDIA, 1550 * bit 0: TVOUT. (> NV04A) */ 1551 NV_REG32(NV32_PWRUPCTRL) = 0x13111111; 1552 1553 /* select colormode CRTC registers base adresses */ 1554 NV_REG8(NV8_MISCW) = 0xcb; 1555 1556 /* enable access to primary head */ 1557 set_crtc_owner(0); 1558 /* unlock head's registers for R/W access */ 1559 CRTCW(LOCK, 0x57); 1560 CRTCW(VSYNCE ,(CRTCR(VSYNCE) & 0x7f)); 1561 if (si->ps.secondary_head) 1562 { 1563 /* enable access to secondary head */ 1564 set_crtc_owner(1); 1565 /* unlock head's registers for R/W access */ 1566 CRTC2W(LOCK, 0x57); 1567 CRTC2W(VSYNCE ,(CRTCR(VSYNCE) & 0x7f)); 1568 } 1569 } 1570 1571 /* basic change of card state from VGA to enhanced mode: 1572 * Should work from VGA BIOS POST init state. */ 1573 static status_t nv_general_bios_to_powergraphics() 1574 { 1575 /* let acc engine make power off/power on cycle to start 'fresh' */ 1576 NV_REG32(NV32_PWRUPCTRL) = 0x13110011; 1577 snooze(1000); 1578 NV_REG32(NV32_PWRUPCTRL) = 0x13111111; 1579 1580 unlock_card(); 1581 1582 /* turn off both displays and the hardcursors (also disables transfers) */ 1583 head1_dpms(false, false, false, true); 1584 head1_cursor_hide(); 1585 if (si->ps.secondary_head) 1586 { 1587 head2_dpms(false, false, false, true); 1588 head2_cursor_hide(); 1589 } 1590 1591 if (si->ps.secondary_head) 1592 { 1593 /* switch overlay engine and TV encoder to CRTC1 */ 1594 /* bit 17: GPU FP port #1 (confirmed NV25, NV28, confirmed not on NV34), 1595 * bit 16: GPU FP port #2 (confirmed NV25, NV28, NV34), 1596 * bit 12: overlay engine (all cards), 1597 * bit 9: TVout chip #2 (confirmed on NV18, NV25, NV28), 1598 * bit 8: TVout chip #1 (all cards), 1599 * bit 4: both I2C busses (all cards) */ 1600 NV_REG32(NV32_2FUNCSEL) &= ~0x00001100; 1601 NV_REG32(NV32_FUNCSEL) |= 0x00001100; 1602 } 1603 si->overlay.crtc = false; 1604 1605 /* enable 'enhanced' mode on primary head: */ 1606 /* enable access to primary head */ 1607 set_crtc_owner(0); 1608 /* note: 'BUFFER' is a non-standard register in behaviour(!) on most 1609 * NV11's like the GeForce2 MX200, while the MX400 and non-NV11 cards 1610 * behave normally. 1611 * Also readback is not nessesarily what was written before! 1612 * 1613 * Double-write action needed on those strange NV11 cards: */ 1614 /* RESET: don't doublebuffer CRTC access: set programmed values immediately... */ 1615 CRTCW(BUFFER, 0xff); 1616 /* ... and use fine pitched CRTC granularity on > NV4 cards (b2 = 0) */ 1617 /* note: this has no effect on possible bandwidth issues. */ 1618 CRTCW(BUFFER, 0xfb); 1619 /* select VGA mode (old VGA register) */ 1620 CRTCW(MODECTL, 0xc3); 1621 /* select graphics mode (old VGA register) */ 1622 SEQW(MEMMODE, 0x0e); 1623 /* select 8 dots character clocks (old VGA register) */ 1624 SEQW(CLKMODE, 0x21); 1625 /* select VGA mode (old VGA register) */ 1626 GRPHW(MODE, 0x00); 1627 /* select graphics mode (old VGA register) */ 1628 GRPHW(MISC, 0x01); 1629 /* select graphics mode (old VGA register) */ 1630 ATBW(MODECTL, 0x01); 1631 /* enable 'enhanced mode', enable Vsync & Hsync, 1632 * set DAC palette to 8-bit width, disable large screen */ 1633 CRTCW(REPAINT1, 0x04); 1634 1635 /* enable 'enhanced' mode on secondary head: */ 1636 if (si->ps.secondary_head) 1637 { 1638 /* enable access to secondary head */ 1639 set_crtc_owner(1); 1640 /* select colormode CRTC2 registers base adresses */ 1641 NV_REG8(NV8_MISCW) = 0xcb; 1642 /* note: 'BUFFER' is a non-standard register in behaviour(!) on most 1643 * NV11's like the GeForce2 MX200, while the MX400 and non-NV11 cards 1644 * behave normally. 1645 * Also readback is not nessesarily what was written before! 1646 * 1647 * Double-write action needed on those strange NV11 cards: */ 1648 /* RESET: don't doublebuffer CRTC2 access: set programmed values immediately... */ 1649 CRTC2W(BUFFER, 0xff); 1650 /* ... and use fine pitched CRTC granularity on > NV4 cards (b2 = 0) */ 1651 /* note: this has no effect on possible bandwidth issues. */ 1652 CRTC2W(BUFFER, 0xfb); 1653 /* select VGA mode (old VGA register) */ 1654 CRTC2W(MODECTL, 0xc3); 1655 /* select graphics mode (old VGA register) */ 1656 SEQW(MEMMODE, 0x0e); 1657 /* select 8 dots character clocks (old VGA register) */ 1658 SEQW(CLKMODE, 0x21); 1659 /* select VGA mode (old VGA register) */ 1660 GRPHW(MODE, 0x00); 1661 /* select graphics mode (old VGA register) */ 1662 GRPHW(MISC, 0x01); 1663 /* select graphics mode (old VGA register) */ 1664 ATB2W(MODECTL, 0x01); 1665 /* enable 'enhanced mode', enable Vsync & Hsync, 1666 * set DAC palette to 8-bit width, disable large screen */ 1667 CRTC2W(REPAINT1, 0x04); 1668 } 1669 1670 /* enable palettes */ 1671 DACW(GENCTRL, 0x00100100); 1672 if (si->ps.secondary_head) DAC2W(GENCTRL, 0x00100100); 1673 1674 /* enable programmable PLLs */ 1675 /* (confirmed PLLSEL to be a write-only register on NV04 and NV11!) */ 1676 if (si->ps.secondary_head) 1677 DACW(PLLSEL, 0x30000f00); 1678 else 1679 DACW(PLLSEL, 0x10000700); 1680 1681 /* turn on DAC and make sure detection testsignal routing is disabled 1682 * (b16 = disable DAC, 1683 * b12 = enable testsignal output */ 1684 //fixme note: b20 ('DACTM_TEST') when set apparantly blocks a DAC's video output 1685 //(confirmed NV43), while it's timing remains operational (black screen). 1686 //It feels like in some screen configurations it can move the output to the other 1687 //output connector as well... 1688 DACW(TSTCTRL, (DACR(TSTCTRL) & 0xfffeefff)); 1689 /* turn on DAC2 if it exists 1690 * (NOTE: testsignal function block resides in DAC1 only (!)) */ 1691 if (si->ps.secondary_head) DAC2W(TSTCTRL, (DAC2R(TSTCTRL) & 0xfffeefff)); 1692 1693 /* NV40 and NV45 need a 'tweak' to make sure the CRTC FIFO's/shiftregisters get 1694 * their data in time (otherwise momentarily ghost images of windows or such 1695 * may appear on heavy acceleration engine use for instance, especially in 32-bit 1696 * colordepth) */ 1697 if ((si->ps.card_type == NV40) || (si->ps.card_type == NV45)) 1698 { 1699 /* clear b15: some framebuffer config item (unknown) */ 1700 NV_REG32(NV32_PFB_CLS_PAGE2) &= 0xffff7fff; 1701 } 1702 1703 /* tweak card GPU-core and RAM speeds if requested (hoping we'll survive)... */ 1704 if (si->settings.gpu_clk) 1705 { 1706 LOG(2,("INIT: tweaking GPU clock!\n")); 1707 1708 set_pll(NV32_COREPLL, si->settings.gpu_clk); 1709 snooze(1000); 1710 } 1711 if (si->settings.ram_clk) 1712 { 1713 LOG(2,("INIT: tweaking cardRAM clock!\n")); 1714 1715 set_pll(NV32_MEMPLL, si->settings.ram_clk); 1716 snooze(1000); 1717 } 1718 1719 /* setup AGP: 1720 * Note: 1721 * This may only be done when no transfers are in progress on the bus, so now 1722 * is probably a good time.. */ 1723 nv_agp_setup(true); 1724 1725 return B_OK; 1726 } 1727 1728 /* Check if mode virtual_size adheres to the cards _maximum_ contraints, and modify 1729 * virtual_size to the nearest valid maximum for the mode on the card if not so. 1730 * Also: check if virtual_width adheres to the cards granularity constraints, and 1731 * create mode slopspace if not so. 1732 * We use acc or crtc granularity constraints based on the 'worst case' scenario. 1733 * 1734 * Mode slopspace is reflected in fbc->bytes_per_row BTW. */ 1735 status_t nv_general_validate_pic_size (display_mode *target, uint32 *bytes_per_row, bool *acc_mode) 1736 { 1737 uint32 video_pitch; 1738 uint32 acc_mask, crtc_mask; 1739 uint32 max_crtc_width, max_acc_width; 1740 uint8 depth = 8; 1741 1742 /* determine pixel multiple based on acceleration engine constraints */ 1743 /* note: 1744 * because of the seemingly 'random' variations in these constraints we take 1745 * a reasonable 'lowest common denominator' instead of always true constraints. */ 1746 switch (si->ps.card_arch) 1747 { 1748 case NV04A: 1749 /* confirmed for: 1750 * TNT1 (NV04), TNT2 (NV05), TNT2-M64 (NV05M64), GeForce2 MX400 (NV11), 1751 * GeForce4 MX440 (NV18), GeForceFX 5200 (NV34) in PIO acc mode; 1752 * confirmed for: 1753 * TNT1 (NV04), TNT2 (NV05), TNT2-M64 (NV05M64), GeForce4 Ti4200 (NV28), 1754 * GeForceFX 5200 (NV34) in DMA acc mode. */ 1755 switch (target->space) 1756 { 1757 case B_CMAP8: acc_mask = 0x0f; depth = 8; break; 1758 case B_RGB15: acc_mask = 0x07; depth = 16; break; 1759 case B_RGB16: acc_mask = 0x07; depth = 16; break; 1760 case B_RGB24: acc_mask = 0x0f; depth = 24; break; 1761 case B_RGB32: acc_mask = 0x03; depth = 32; break; 1762 default: 1763 LOG(8,("INIT: unknown color space: 0x%08x\n", target->space)); 1764 return B_ERROR; 1765 } 1766 break; 1767 default: 1768 /* confirmed for: 1769 * GeForce4 Ti4200 (NV28), GeForceFX 5600 (NV31) in PIO acc mode; 1770 * confirmed for: 1771 * GeForce2 MX400 (NV11), GeForce4 MX440 (NV18), GeForcePCX 5750 (NV36), 1772 * GeForcePCX 6600 GT (NV43) in DMA acc mode. */ 1773 switch (target->space) 1774 { 1775 case B_CMAP8: acc_mask = 0x3f; depth = 8; break; 1776 case B_RGB15: acc_mask = 0x1f; depth = 16; break; 1777 case B_RGB16: acc_mask = 0x1f; depth = 16; break; 1778 case B_RGB24: acc_mask = 0x3f; depth = 24; break; 1779 case B_RGB32: acc_mask = 0x0f; depth = 32; break; 1780 default: 1781 LOG(8,("INIT: unknown color space: 0x%08x\n", target->space)); 1782 return B_ERROR; 1783 } 1784 break; 1785 } 1786 1787 /* determine pixel multiple based on CRTC memory pitch constraints: 1788 * -> all NV cards have same granularity constraints on CRTC1 and CRTC2, 1789 * provided that the CRTC1 and CRTC2 BUFFER register b2 = 0; 1790 * 1791 * (Note: Don't mix this up with CRTC timing contraints! Those are 1792 * multiples of 8 for horizontal, 1 for vertical timing.) */ 1793 switch (si->ps.card_type) 1794 { 1795 default: 1796 // case NV04: 1797 /* confirmed for: 1798 * TNT1 always; 1799 * TNT2, TNT2-M64, GeForce2 MX400, GeForce4 MX440, GeForce4 Ti4200, 1800 * GeForceFX 5200: if the CRTC1 (and CRTC2) BUFFER register b2 = 0 */ 1801 /* NOTE: 1802 * Unfortunately older cards have a hardware fault that prevents use. 1803 * We need doubled granularity on those to prevent the single top line 1804 * from shifting to the left! 1805 * This is confirmed for TNT2, GeForce2 MX200, GeForce2 MX400. 1806 * Confirmed OK are: 1807 * GeForce4 MX440, GeForce4 Ti4200, GeForceFX 5200. */ 1808 switch (target->space) 1809 { 1810 case B_CMAP8: crtc_mask = 0x0f; break; /* 0x07 */ 1811 case B_RGB15: crtc_mask = 0x07; break; /* 0x03 */ 1812 case B_RGB16: crtc_mask = 0x07; break; /* 0x03 */ 1813 case B_RGB24: crtc_mask = 0x0f; break; /* 0x07 */ 1814 case B_RGB32: crtc_mask = 0x03; break; /* 0x01 */ 1815 default: 1816 LOG(8,("INIT: unknown color space: 0x%08x\n", target->space)); 1817 return B_ERROR; 1818 } 1819 break; 1820 // default: 1821 /* confirmed for: 1822 * TNT2, TNT2-M64, GeForce2 MX400, GeForce4 MX440, GeForce4 Ti4200, 1823 * GeForceFX 5200: if the CRTC1 (and CRTC2) BUFFER register b2 = 1 */ 1824 /* switch (target->space) 1825 { 1826 case B_CMAP8: crtc_mask = 0x1f; break; 1827 case B_RGB15: crtc_mask = 0x0f; break; 1828 case B_RGB16: crtc_mask = 0x0f; break; 1829 case B_RGB24: crtc_mask = 0x1f; break; 1830 case B_RGB32: crtc_mask = 0x07; break; 1831 default: 1832 LOG(8,("INIT: unknown color space: 0x%08x\n", target->space)); 1833 return B_ERROR; 1834 } 1835 break; 1836 */ } 1837 1838 /* set virtual_width limit for accelerated modes */ 1839 /* note: 1840 * because of the seemingly 'random' variations in these constraints we take 1841 * a reasonable 'lowest common denominator' instead of always true constraints. */ 1842 switch (si->ps.card_arch) 1843 { 1844 case NV04A: 1845 /* confirmed for: 1846 * TNT1 (NV04), TNT2 (NV05), TNT2-M64 (NV05M64) in both PIO and DMA acc mode. */ 1847 switch(target->space) 1848 { 1849 case B_CMAP8: max_acc_width = 8176; break; 1850 case B_RGB15: max_acc_width = 4088; break; 1851 case B_RGB16: max_acc_width = 4088; break; 1852 case B_RGB24: max_acc_width = 2720; break; 1853 case B_RGB32: max_acc_width = 2044; break; 1854 default: 1855 LOG(8,("INIT: unknown color space: 0x%08x\n", target->space)); 1856 return B_ERROR; 1857 } 1858 break; 1859 default: 1860 /* confirmed for: 1861 * GeForce4 Ti4200 (NV28), GeForceFX 5600 (NV31) in PIO acc mode; 1862 * GeForce2 MX400 (NV11), GeForce4 MX440 (NV18), GeForceFX 5200 (NV34) can do 1863 * 16368/8184/8184/5456/4092, so a bit better in PIO acc mode; 1864 * confirmed for: 1865 * GeForce2 MX400 (NV11), GeForce4 MX440 (NV18), GeForcePCX 5750 (NV36), 1866 * GeForcePCX 6600 GT (NV43) in DMA acc mode; 1867 * GeForce4 Ti4200 (NV28), GeForceFX 5200 (NV34) can do 1868 * 16368/8184/8184/5456/4092, so a bit better in DMA acc mode. */ 1869 switch(target->space) 1870 { 1871 case B_CMAP8: max_acc_width = 16320; break; 1872 case B_RGB15: max_acc_width = 8160; break; 1873 case B_RGB16: max_acc_width = 8160; break; 1874 case B_RGB24: max_acc_width = 5440; break; 1875 case B_RGB32: max_acc_width = 4080; break; 1876 default: 1877 LOG(8,("INIT: unknown color space: 0x%08x\n", target->space)); 1878 return B_ERROR; 1879 } 1880 break; 1881 } 1882 1883 /* set virtual_width limit for unaccelerated modes */ 1884 switch (si->ps.card_type) 1885 { 1886 default: 1887 // case NV04: 1888 /* confirmed for: 1889 * TNT1 always; 1890 * TNT2, TNT2-M64, GeForce2 MX400, GeForce4 MX440, GeForce4 Ti4200, 1891 * GeForceFX 5200: if the CRTC1 (and CRTC2) BUFFER register b2 = 0 */ 1892 /* NOTE: 1893 * Unfortunately older cards have a hardware fault that prevents use. 1894 * We need doubled granularity on those to prevent the single top line 1895 * from shifting to the left! 1896 * This is confirmed for TNT2, GeForce2 MX200, GeForce2 MX400. 1897 * Confirmed OK are: 1898 * GeForce4 MX440, GeForce4 Ti4200, GeForceFX 5200. */ 1899 switch(target->space) 1900 { 1901 case B_CMAP8: max_crtc_width = 16368; break; /* 16376 */ 1902 case B_RGB15: max_crtc_width = 8184; break; /* 8188 */ 1903 case B_RGB16: max_crtc_width = 8184; break; /* 8188 */ 1904 case B_RGB24: max_crtc_width = 5456; break; /* 5456 */ 1905 case B_RGB32: max_crtc_width = 4092; break; /* 4094 */ 1906 default: 1907 LOG(8,("INIT: unknown color space: 0x%08x\n", target->space)); 1908 return B_ERROR; 1909 } 1910 break; 1911 // default: 1912 /* confirmed for: 1913 * TNT2, TNT2-M64, GeForce2 MX400, GeForce4 MX440, GeForce4 Ti4200, 1914 * GeForceFX 5200: if the CRTC1 (and CRTC2) BUFFER register b2 = 1 */ 1915 /* switch(target->space) 1916 { 1917 case B_CMAP8: max_crtc_width = 16352; break; 1918 case B_RGB15: max_crtc_width = 8176; break; 1919 case B_RGB16: max_crtc_width = 8176; break; 1920 case B_RGB24: max_crtc_width = 5440; break; 1921 case B_RGB32: max_crtc_width = 4088; break; 1922 default: 1923 LOG(8,("INIT: unknown color space: 0x%08x\n", target->space)); 1924 return B_ERROR; 1925 } 1926 break; 1927 */ } 1928 1929 /* check for acc capability, and adjust mode to adhere to hardware constraints */ 1930 if (max_acc_width <= max_crtc_width) 1931 { 1932 /* check if we can setup this mode with acceleration */ 1933 *acc_mode = true; 1934 /* virtual_width */ 1935 if (target->virtual_width > max_acc_width) *acc_mode = false; 1936 /* virtual_height */ 1937 /* (NV cards can even do more than this(?)... 1938 * but 4096 is confirmed on all cards at max. accelerated width.) */ 1939 if (target->virtual_height > 4096) *acc_mode = false; 1940 1941 /* now check virtual_size based on CRTC constraints */ 1942 if (target->virtual_width > max_crtc_width) target->virtual_width = max_crtc_width; 1943 /* virtual_height: The only constraint here is the cards memory size which is 1944 * checked later on in ProposeMode: virtual_height is adjusted then if needed. 1945 * 'Limiting here' to the variable size that's at least available (uint16). */ 1946 if (target->virtual_height > 65535) target->virtual_height = 65535; 1947 1948 /* OK, now we know that virtual_width is valid, and it's needing no slopspace if 1949 * it was confined above, so we can finally calculate safely if we need slopspace 1950 * for this mode... */ 1951 if (*acc_mode) 1952 { 1953 /* the mode needs to adhere to the largest granularity imposed... */ 1954 if (acc_mask < crtc_mask) 1955 video_pitch = ((target->virtual_width + crtc_mask) & ~crtc_mask); 1956 else 1957 video_pitch = ((target->virtual_width + acc_mask) & ~acc_mask); 1958 } 1959 else /* unaccelerated mode */ 1960 video_pitch = ((target->virtual_width + crtc_mask) & ~crtc_mask); 1961 } 1962 else /* max_acc_width > max_crtc_width */ 1963 { 1964 /* check if we can setup this mode with acceleration */ 1965 *acc_mode = true; 1966 /* (we already know virtual_width will be no problem) */ 1967 /* virtual_height */ 1968 /* (NV cards can even do more than this(?)... 1969 * but 4096 is confirmed on all cards at max. accelerated width.) */ 1970 if (target->virtual_height > 4096) *acc_mode = false; 1971 1972 /* now check virtual_size based on CRTC constraints */ 1973 if (*acc_mode) 1974 { 1975 /* note that max_crtc_width already adheres to crtc_mask */ 1976 if (target->virtual_width > (max_crtc_width & ~acc_mask)) 1977 target->virtual_width = (max_crtc_width & ~acc_mask); 1978 } 1979 else /* unaccelerated mode */ 1980 { 1981 if (target->virtual_width > max_crtc_width) 1982 target->virtual_width = max_crtc_width; 1983 } 1984 /* virtual_height: The only constraint here is the cards memory size which is 1985 * checked later on in ProposeMode: virtual_height is adjusted then if needed. 1986 * 'Limiting here' to the variable size that's at least available (uint16). */ 1987 if (target->virtual_height > 65535) target->virtual_height = 65535; 1988 1989 /* OK, now we know that virtual_width is valid, and it's needing no slopspace if 1990 * it was confined above, so we can finally calculate safely if we need slopspace 1991 * for this mode... */ 1992 if (*acc_mode) 1993 { 1994 /* the mode needs to adhere to the largest granularity imposed... */ 1995 if (acc_mask < crtc_mask) 1996 video_pitch = ((target->virtual_width + crtc_mask) & ~crtc_mask); 1997 else 1998 video_pitch = ((target->virtual_width + acc_mask) & ~acc_mask); 1999 } 2000 else /* unaccelerated mode */ 2001 video_pitch = ((target->virtual_width + crtc_mask) & ~crtc_mask); 2002 } 2003 2004 LOG(2,("INIT: memory pitch will be set to %d pixels for colorspace 0x%08x\n", 2005 video_pitch, target->space)); 2006 if (target->virtual_width != video_pitch) 2007 LOG(2,("INIT: effective mode slopspace is %d pixels\n", 2008 (video_pitch - target->virtual_width))); 2009 2010 /* now calculate bytes_per_row for this mode */ 2011 *bytes_per_row = video_pitch * (depth >> 3); 2012 2013 return B_OK; 2014 } 2015