1 /* Authors: 2 Mark Watson 12/1999, 3 Apsed, 4 Rudolf Cornelissen 10/2002-4/2006 5 */ 6 7 #define MODULE_BIT 0x00008000 8 9 #include "nv_std.h" 10 11 static status_t test_ram(void); 12 static status_t nvxx_general_powerup (void); 13 static void unlock_card(void); 14 static status_t nv_general_bios_to_powergraphics(void); 15 16 static void nv_dump_configuration_space (void) 17 { 18 #define DUMP_CFG(reg, type) if (si->ps.card_type >= type) do { \ 19 uint32 value = CFGR(reg); \ 20 MSG(("configuration_space 0x%02x %20s 0x%08x\n", \ 21 NVCFG_##reg, #reg, value)); \ 22 } while (0) 23 DUMP_CFG (DEVID, 0); 24 DUMP_CFG (DEVCTRL, 0); 25 DUMP_CFG (CLASS, 0); 26 DUMP_CFG (HEADER, 0); 27 DUMP_CFG (BASE1REGS,0); 28 DUMP_CFG (BASE2FB, 0); 29 DUMP_CFG (BASE3, 0); 30 DUMP_CFG (BASE4, 0); 31 DUMP_CFG (BASE5, 0); 32 DUMP_CFG (BASE6, 0); 33 DUMP_CFG (BASE7, 0); 34 DUMP_CFG (SUBSYSID1,0); 35 DUMP_CFG (ROMBASE, 0); 36 DUMP_CFG (CAPPTR, 0); 37 DUMP_CFG (CFG_1, 0); 38 DUMP_CFG (INTERRUPT,0); 39 DUMP_CFG (SUBSYSID2,0); 40 DUMP_CFG (AGPREF, 0); 41 DUMP_CFG (AGPSTAT, 0); 42 DUMP_CFG (AGPCMD, 0); 43 DUMP_CFG (ROMSHADOW,0); 44 DUMP_CFG (VGA, 0); 45 DUMP_CFG (SCHRATCH, 0); 46 DUMP_CFG (CFG_10, 0); 47 DUMP_CFG (CFG_11, 0); 48 DUMP_CFG (CFG_12, 0); 49 DUMP_CFG (CFG_13, 0); 50 DUMP_CFG (CFG_14, 0); 51 DUMP_CFG (CFG_15, 0); 52 DUMP_CFG (CFG_16, 0); 53 DUMP_CFG (PCIEREF, 0); 54 DUMP_CFG (PCIEDCAP, 0); 55 DUMP_CFG (PCIEDCTST,0); 56 DUMP_CFG (PCIELCAP, 0); 57 DUMP_CFG (PCIELCTST,0); 58 DUMP_CFG (CFG_22, 0); 59 DUMP_CFG (CFG_23, 0); 60 DUMP_CFG (CFG_24, 0); 61 DUMP_CFG (CFG_25, 0); 62 DUMP_CFG (CFG_26, 0); 63 DUMP_CFG (CFG_27, 0); 64 DUMP_CFG (CFG_28, 0); 65 DUMP_CFG (CFG_29, 0); 66 DUMP_CFG (CFG_30, 0); 67 DUMP_CFG (CFG_31, 0); 68 DUMP_CFG (CFG_32, 0); 69 DUMP_CFG (CFG_33, 0); 70 DUMP_CFG (CFG_34, 0); 71 DUMP_CFG (CFG_35, 0); 72 DUMP_CFG (CFG_36, 0); 73 DUMP_CFG (CFG_37, 0); 74 DUMP_CFG (CFG_38, 0); 75 DUMP_CFG (CFG_39, 0); 76 DUMP_CFG (CFG_40, 0); 77 DUMP_CFG (CFG_41, 0); 78 DUMP_CFG (CFG_42, 0); 79 DUMP_CFG (CFG_43, 0); 80 DUMP_CFG (CFG_44, 0); 81 DUMP_CFG (CFG_45, 0); 82 DUMP_CFG (CFG_46, 0); 83 DUMP_CFG (CFG_47, 0); 84 DUMP_CFG (CFG_48, 0); 85 DUMP_CFG (CFG_49, 0); 86 DUMP_CFG (CFG_50, 0); 87 #undef DUMP_CFG 88 } 89 90 status_t nv_general_powerup() 91 { 92 status_t status; 93 94 LOG(1,("POWERUP: Haiku nVidia Accelerant 0.81 running.\n")); 95 96 /* log VBLANK INT usability status */ 97 if (si->ps.int_assigned) 98 LOG(4,("POWERUP: Usable INT assigned to HW; Vblank semaphore enabled\n")); 99 else 100 LOG(4,("POWERUP: No (usable) INT assigned to HW; Vblank semaphore disabled\n")); 101 102 /* preset no laptop */ 103 si->ps.laptop = false; 104 105 /* WARNING: 106 * _adi.name_ and _adi.chipset_ can contain 31 readable characters max.!!! */ 107 108 /* detect card type and power it up */ 109 switch(CFGR(DEVID)) 110 { 111 /* Vendor Nvidia */ 112 case 0x002010de: /* Nvidia TNT1 */ 113 si->ps.card_type = NV04; 114 si->ps.card_arch = NV04A; 115 sprintf(si->adi.name, "Nvidia TNT1"); 116 sprintf(si->adi.chipset, "NV04"); 117 status = nvxx_general_powerup(); 118 break; 119 case 0x002810de: /* Nvidia TNT2 (pro) */ 120 case 0x002910de: /* Nvidia TNT2 Ultra */ 121 case 0x002a10de: /* Nvidia TNT2 */ 122 case 0x002b10de: /* Nvidia TNT2 */ 123 si->ps.card_type = NV05; 124 si->ps.card_arch = NV04A; 125 sprintf(si->adi.name, "Nvidia TNT2"); 126 sprintf(si->adi.chipset, "NV05"); 127 status = nvxx_general_powerup(); 128 break; 129 case 0x002c10de: /* Nvidia Vanta (Lt) */ 130 si->ps.card_type = NV05; 131 si->ps.card_arch = NV04A; 132 sprintf(si->adi.name, "Nvidia Vanta (Lt)"); 133 sprintf(si->adi.chipset, "NV05"); 134 status = nvxx_general_powerup(); 135 break; 136 case 0x002d10de: /* Nvidia TNT2-M64 (Pro) */ 137 si->ps.card_type = NV05M64; 138 si->ps.card_arch = NV04A; 139 sprintf(si->adi.name, "Nvidia TNT2-M64 (Pro)"); 140 sprintf(si->adi.chipset, "NV05 model 64"); 141 status = nvxx_general_powerup(); 142 break; 143 case 0x002e10de: /* Nvidia NV06 Vanta */ 144 case 0x002f10de: /* Nvidia NV06 Vanta */ 145 si->ps.card_type = NV06; 146 si->ps.card_arch = NV04A; 147 sprintf(si->adi.name, "Nvidia Vanta"); 148 sprintf(si->adi.chipset, "NV06"); 149 status = nvxx_general_powerup(); 150 break; 151 case 0x004010de: /* Nvidia GeForce FX 6800 Ultra */ 152 case 0x004110de: /* Nvidia GeForce FX 6800 */ 153 case 0x004210de: /* Nvidia GeForce FX 6800LE */ 154 si->ps.card_type = NV40; 155 si->ps.card_arch = NV40A; 156 sprintf(si->adi.name, "Nvidia GeForce FX 6800"); 157 sprintf(si->adi.chipset, "NV40"); 158 status = nvxx_general_powerup(); 159 break; 160 case 0x004310de: /* Nvidia unknown FX */ 161 si->ps.card_type = NV40; 162 si->ps.card_arch = NV40A; 163 sprintf(si->adi.name, "Nvidia unknown FX"); 164 sprintf(si->adi.chipset, "NV40"); 165 status = nvxx_general_powerup(); 166 break; 167 case 0x004510de: /* Nvidia GeForce FX 6800 GT */ 168 case 0x004610de: /* Nvidia GeForce FX 6800 GT */ 169 case 0x004810de: /* Nvidia GeForce FX 6800 XT */ 170 si->ps.card_type = NV40; 171 si->ps.card_arch = NV40A; 172 sprintf(si->adi.name, "Nvidia GeForce FX 6800"); 173 sprintf(si->adi.chipset, "NV40"); 174 status = nvxx_general_powerup(); 175 break; 176 case 0x004910de: /* Nvidia unknown FX */ 177 si->ps.card_type = NV40; 178 si->ps.card_arch = NV40A; 179 sprintf(si->adi.name, "Nvidia unknown FX"); 180 sprintf(si->adi.chipset, "NV40"); 181 status = nvxx_general_powerup(); 182 break; 183 case 0x004d10de: /* Nvidia Quadro FX 4400 */ 184 case 0x004e10de: /* Nvidia Quadro FX 4000 */ 185 si->ps.card_type = NV40; 186 si->ps.card_arch = NV40A; 187 sprintf(si->adi.name, "Nvidia Quadro FX 4000/4400"); 188 sprintf(si->adi.chipset, "NV40"); 189 status = nvxx_general_powerup(); 190 break; 191 case 0x009110de: /* Nvidia GeForce 7800 GTX PCIe */ 192 case 0x009210de: /* Nvidia Geforce 7800 GT PCIe */ 193 si->ps.card_type = G70; 194 si->ps.card_arch = NV40A; 195 sprintf(si->adi.name, "Nvidia Geforce 7800 GT PCIe"); 196 sprintf(si->adi.chipset, "G70"); 197 status = nvxx_general_powerup(); 198 break; 199 case 0x009810de: /* Nvidia Geforce 7800 Go PCIe */ 200 case 0x009910de: /* Nvidia Geforce 7800 GTX Go PCIe */ 201 si->ps.card_type = G70; 202 si->ps.card_arch = NV40A; 203 si->ps.laptop = true; 204 sprintf(si->adi.name, "Nvidia Geforce 7800 GTX Go PCIe"); 205 sprintf(si->adi.chipset, "G70"); 206 status = nvxx_general_powerup(); 207 break; 208 case 0x009d10de: /* Nvidia Quadro FX 4500 */ 209 si->ps.card_type = G70; 210 si->ps.card_arch = NV40A; 211 sprintf(si->adi.name, "Nvidia Quadro FX 4500"); 212 sprintf(si->adi.chipset, "G70"); 213 status = nvxx_general_powerup(); 214 break; 215 case 0x00a010de: /* Nvidia Aladdin TNT2 */ 216 si->ps.card_type = NV05; 217 si->ps.card_arch = NV04A; 218 sprintf(si->adi.name, "Nvidia Aladdin TNT2"); 219 sprintf(si->adi.chipset, "NV05"); 220 status = nvxx_general_powerup(); 221 break; 222 case 0x00c010de: /* Nvidia unknown FX */ 223 si->ps.card_type = NV41; 224 si->ps.card_arch = NV40A; 225 sprintf(si->adi.name, "Nvidia unknown FX"); 226 sprintf(si->adi.chipset, "NV41"); 227 status = nvxx_general_powerup(); 228 break; 229 case 0x00c110de: /* Nvidia GeForce FX 6800 */ 230 case 0x00c210de: /* Nvidia GeForce FX 6800LE */ 231 case 0x00c310de: /* Nvidia GeForce FX 6800 XT */ 232 si->ps.card_type = NV41; 233 si->ps.card_arch = NV40A; 234 sprintf(si->adi.name, "Nvidia GeForce FX 6800"); 235 sprintf(si->adi.chipset, "NV41"); 236 status = nvxx_general_powerup(); 237 break; 238 case 0x00c810de: /* Nvidia GeForce FX 6800 Go */ 239 case 0x00c910de: /* Nvidia GeForce FX 6800 Ultra Go */ 240 si->ps.card_type = NV41; 241 si->ps.card_arch = NV40A; 242 si->ps.laptop = true; 243 sprintf(si->adi.name, "Nvidia GeForce FX 6800 Go"); 244 sprintf(si->adi.chipset, "NV41"); 245 status = nvxx_general_powerup(); 246 break; 247 case 0x00cc10de: /* Nvidia Quadro FX 1400 Go */ 248 si->ps.card_type = NV41; 249 si->ps.card_arch = NV40A; 250 si->ps.laptop = true; 251 sprintf(si->adi.name, "Nvidia Quadro FX 1400 Go"); 252 sprintf(si->adi.chipset, "NV41"); 253 status = nvxx_general_powerup(); 254 break; 255 case 0x00cd10de: /* Nvidia Quadro FX 3450/4000 SDI */ 256 si->ps.card_type = NV41; 257 si->ps.card_arch = NV40A; 258 sprintf(si->adi.name, "Nvidia Quadro FX 3450/4000 SDI"); 259 sprintf(si->adi.chipset, "NV41"); 260 status = nvxx_general_powerup(); 261 break; 262 case 0x00ce10de: /* Nvidia Quadro FX 1400 */ 263 si->ps.card_type = NV41; 264 si->ps.card_arch = NV40A; 265 sprintf(si->adi.name, "Nvidia Quadro FX 1400"); 266 sprintf(si->adi.chipset, "NV41"); 267 status = nvxx_general_powerup(); 268 break; 269 case 0x00f010de: /* Nvidia GeForce FX 6800 (Ultra) AGP(?) */ 270 si->ps.card_type = NV40; 271 si->ps.card_arch = NV40A; 272 sprintf(si->adi.name, "Nvidia GeForce FX 6800 AGP(?)"); 273 sprintf(si->adi.chipset, "NV40(?)"); 274 status = nvxx_general_powerup(); 275 break; 276 case 0x00f110de: /* Nvidia GeForce FX 6600 GT AGP */ 277 case 0x00f210de: /* Nvidia GeForce FX 6600 AGP */ 278 si->ps.card_type = NV43; 279 si->ps.card_arch = NV40A; 280 sprintf(si->adi.name, "Nvidia GeForce FX 6600 (GT) AGP"); 281 sprintf(si->adi.chipset, "NV43"); 282 status = nvxx_general_powerup(); 283 break; 284 case 0x00f310de: /* Nvidia GeForce 6200 */ 285 si->ps.card_type = NV44; 286 si->ps.card_arch = NV40A; 287 sprintf(si->adi.name, "Nvidia GeForce 6200"); 288 sprintf(si->adi.chipset, "NV44"); 289 status = nvxx_general_powerup(); 290 break; 291 case 0x00f510de: /* Nvidia GeForce FX 7800 GS AGP */ 292 si->ps.card_type = G70; 293 si->ps.card_arch = NV40A; 294 sprintf(si->adi.name, "Nvidia GeForce 7800 GS AGP"); 295 sprintf(si->adi.chipset, "G70"); 296 status = nvxx_general_powerup(); 297 break; 298 case 0x00f810de: /* Nvidia Quadro FX 3400/4400 PCIe */ 299 si->ps.card_type = NV45; 300 si->ps.card_arch = NV40A; 301 sprintf(si->adi.name, "Nvidia Quadro FX 3400 PCIe"); 302 sprintf(si->adi.chipset, "NV45"); 303 status = nvxx_general_powerup(); 304 break; 305 case 0x00f910de: /* Nvidia GeForce PCX 6800 PCIe */ 306 si->ps.card_type = NV45; 307 si->ps.card_arch = NV40A; 308 sprintf(si->adi.name, "Nvidia GeForce PCX 6800 PCIe"); 309 sprintf(si->adi.chipset, "NV45"); 310 status = nvxx_general_powerup(); 311 break; 312 case 0x00fa10de: /* Nvidia GeForce PCX 5750 PCIe */ 313 si->ps.card_type = NV36; 314 si->ps.card_arch = NV30A; 315 sprintf(si->adi.name, "Nvidia GeForce PCX 5750 PCIe"); 316 sprintf(si->adi.chipset, "NV36"); 317 status = nvxx_general_powerup(); 318 break; 319 case 0x00fb10de: /* Nvidia GeForce PCX 5900 PCIe */ 320 si->ps.card_type = NV35; 321 si->ps.card_arch = NV30A; 322 sprintf(si->adi.name, "Nvidia GeForce PCX 5900 PCIe"); 323 sprintf(si->adi.chipset, "NV35(?)"); 324 status = nvxx_general_powerup(); 325 break; 326 case 0x00fc10de: /* Nvidia GeForce PCX 5300 PCIe */ 327 si->ps.card_type = NV34; 328 si->ps.card_arch = NV30A; 329 sprintf(si->adi.name, "Nvidia GeForce PCX 5300 PCIe"); 330 sprintf(si->adi.chipset, "NV34"); 331 status = nvxx_general_powerup(); 332 break; 333 case 0x00fd10de: /* Nvidia Quadro PCX PCIe */ 334 si->ps.card_type = NV45; 335 si->ps.card_arch = NV40A; 336 sprintf(si->adi.name, "Nvidia Quadro PCX PCIe"); 337 sprintf(si->adi.chipset, "NV45"); 338 status = nvxx_general_powerup(); 339 break; 340 case 0x00fe10de: /* Nvidia Quadro FX 1300 PCIe(?) */ 341 si->ps.card_type = NV36; 342 si->ps.card_arch = NV30A; 343 sprintf(si->adi.name, "Nvidia Quadro FX 1300 PCIe(?)"); 344 sprintf(si->adi.chipset, "NV36(?)"); 345 status = nvxx_general_powerup(); 346 break; 347 case 0x00ff10de: /* Nvidia GeForce PCX 4300 PCIe */ 348 si->ps.card_type = NV18; 349 si->ps.card_arch = NV10A; 350 sprintf(si->adi.name, "Nvidia GeForce PCX 4300 PCIe"); 351 sprintf(si->adi.chipset, "NV18"); 352 status = nvxx_general_powerup(); 353 break; 354 case 0x010010de: /* Nvidia GeForce256 SDR */ 355 case 0x010110de: /* Nvidia GeForce256 DDR */ 356 case 0x010210de: /* Nvidia GeForce256 Ultra */ 357 si->ps.card_type = NV10; 358 si->ps.card_arch = NV10A; 359 sprintf(si->adi.name, "Nvidia GeForce256"); 360 sprintf(si->adi.chipset, "NV10"); 361 status = nvxx_general_powerup(); 362 break; 363 case 0x010310de: /* Nvidia Quadro */ 364 si->ps.card_type = NV10; 365 si->ps.card_arch = NV10A; 366 sprintf(si->adi.name, "Nvidia Quadro"); 367 sprintf(si->adi.chipset, "NV10"); 368 status = nvxx_general_powerup(); 369 break; 370 case 0x011010de: /* Nvidia GeForce2 MX/MX400 */ 371 case 0x011110de: /* Nvidia GeForce2 MX100/MX200 DDR */ 372 si->ps.card_type = NV11; 373 si->ps.card_arch = NV10A; 374 sprintf(si->adi.name, "Nvidia GeForce2 MX"); 375 sprintf(si->adi.chipset, "NV11"); 376 status = nvxx_general_powerup(); 377 break; 378 case 0x011210de: /* Nvidia GeForce2 Go */ 379 si->ps.card_type = NV11; 380 si->ps.card_arch = NV10A; 381 si->ps.laptop = true; 382 sprintf(si->adi.name, "Nvidia GeForce2 Go"); 383 sprintf(si->adi.chipset, "NV11"); 384 status = nvxx_general_powerup(); 385 break; 386 case 0x011310de: /* Nvidia Quadro2 MXR/EX/Go */ 387 si->ps.card_type = NV11; 388 si->ps.card_arch = NV10A; 389 sprintf(si->adi.name, "Nvidia Quadro2 MXR/EX/Go"); 390 sprintf(si->adi.chipset, "NV11"); 391 status = nvxx_general_powerup(); 392 break; 393 case 0x014010de: /* Nvidia GeForce FX 6600 GT */ 394 case 0x014110de: /* Nvidia GeForce FX 6600 */ 395 case 0x014210de: /* Nvidia GeForce FX 6600LE */ 396 si->ps.card_type = NV43; 397 si->ps.card_arch = NV40A; 398 sprintf(si->adi.name, "Nvidia GeForce FX 6600"); 399 sprintf(si->adi.chipset, "NV43"); 400 status = nvxx_general_powerup(); 401 break; 402 case 0x014310de: /* Nvidia unknown FX */ 403 si->ps.card_type = NV43; 404 si->ps.card_arch = NV40A; 405 sprintf(si->adi.name, "Nvidia unknown FX"); 406 sprintf(si->adi.chipset, "NV43"); 407 status = nvxx_general_powerup(); 408 break; 409 case 0x014410de: /* Nvidia GeForce FX 6600 Go */ 410 si->ps.card_type = NV43; 411 si->ps.card_arch = NV40A; 412 si->ps.laptop = true; 413 sprintf(si->adi.name, "Nvidia GeForce FX 6600 Go"); 414 sprintf(si->adi.chipset, "NV43"); 415 status = nvxx_general_powerup(); 416 break; 417 case 0x014510de: /* Nvidia GeForce FX 6610 XL */ 418 si->ps.card_type = NV43; 419 si->ps.card_arch = NV40A; 420 sprintf(si->adi.name, "Nvidia GeForce FX 6610 XL"); 421 sprintf(si->adi.chipset, "NV43"); 422 status = nvxx_general_powerup(); 423 break; 424 case 0x014710de: /* Nvidia GeForce FX 6700 XL */ 425 si->ps.card_type = NV43; 426 si->ps.card_arch = NV40A; 427 sprintf(si->adi.name, "Nvidia GeForce FX 6700 XL"); 428 sprintf(si->adi.chipset, "NV43"); 429 status = nvxx_general_powerup(); 430 break; 431 case 0x014610de: /* Nvidia GeForce FX 6600 TE Go / 6200 TE Go */ 432 case 0x014810de: /* Nvidia GeForce FX 6600 Go */ 433 case 0x014910de: /* Nvidia GeForce FX 6600 GT Go */ 434 si->ps.card_type = NV43; 435 si->ps.card_arch = NV40A; 436 si->ps.laptop = true; 437 sprintf(si->adi.name, "Nvidia GeForce FX 6600Go/6200Go"); 438 sprintf(si->adi.chipset, "NV43"); 439 status = nvxx_general_powerup(); 440 break; 441 case 0x014b10de: /* Nvidia unknown FX */ 442 case 0x014c10de: /* Nvidia unknown FX */ 443 case 0x014d10de: /* Nvidia unknown FX */ 444 si->ps.card_type = NV43; 445 si->ps.card_arch = NV40A; 446 sprintf(si->adi.name, "Nvidia unknown FX"); 447 sprintf(si->adi.chipset, "NV43"); 448 status = nvxx_general_powerup(); 449 break; 450 case 0x014e10de: /* Nvidia Quadro FX 540 */ 451 si->ps.card_type = NV43; 452 si->ps.card_arch = NV40A; 453 sprintf(si->adi.name, "Nvidia Quadro FX 540"); 454 sprintf(si->adi.chipset, "NV43"); 455 status = nvxx_general_powerup(); 456 break; 457 case 0x014f10de: /* Nvidia GeForce 6200 PCIe (128Mb) */ 458 si->ps.card_type = NV44; 459 si->ps.card_arch = NV40A; 460 sprintf(si->adi.name, "Nvidia GeForce 6200 PCIe 128Mb"); 461 sprintf(si->adi.chipset, "NV44"); 462 status = nvxx_general_powerup(); 463 break; 464 case 0x015010de: /* Nvidia GeForce2 GTS/Pro */ 465 case 0x015110de: /* Nvidia GeForce2 Ti DDR */ 466 case 0x015210de: /* Nvidia GeForce2 Ultra */ 467 si->ps.card_type = NV15; 468 si->ps.card_arch = NV10A; 469 sprintf(si->adi.name, "Nvidia GeForce2"); 470 sprintf(si->adi.chipset, "NV15"); 471 status = nvxx_general_powerup(); 472 break; 473 case 0x015310de: /* Nvidia Quadro2 Pro */ 474 si->ps.card_type = NV15; 475 si->ps.card_arch = NV10A; 476 sprintf(si->adi.name, "Nvidia Quadro2 Pro"); 477 sprintf(si->adi.chipset, "NV15"); 478 status = nvxx_general_powerup(); 479 break; 480 case 0x016010de: /* Nvidia GeForce 6500 Go */ 481 si->ps.card_type = NV44; 482 si->ps.card_arch = NV40A; 483 si->ps.laptop = true; 484 sprintf(si->adi.name, "Nvidia GeForce 6500 Go"); 485 sprintf(si->adi.chipset, "NV44"); 486 status = nvxx_general_powerup(); 487 break; 488 case 0x016110de: /* Nvidia GeForce 6200 TurboCache */ 489 si->ps.card_type = NV44; 490 si->ps.card_arch = NV40A; 491 sprintf(si->adi.name, "Nvidia GeForce 6200 TC"); 492 sprintf(si->adi.chipset, "NV44"); 493 status = nvxx_general_powerup(); 494 break; 495 case 0x016210de: /* Nvidia GeForce 6200SE TurboCache */ 496 si->ps.card_type = NV44; 497 si->ps.card_arch = NV40A; 498 sprintf(si->adi.name, "Nvidia GeForce 6200SE TC"); 499 sprintf(si->adi.chipset, "NV44"); 500 status = nvxx_general_powerup(); 501 break; 502 case 0x016310de: /* Nvidia GeForce 6200LE */ 503 si->ps.card_type = NV44; 504 si->ps.card_arch = NV40A; 505 sprintf(si->adi.name, "Nvidia GeForce 6200LE"); 506 sprintf(si->adi.chipset, "NV44"); 507 status = nvxx_general_powerup(); 508 break; 509 case 0x016410de: /* Nvidia GeForce FX 6200 Go */ 510 si->ps.card_type = NV44; 511 si->ps.card_arch = NV40A; 512 si->ps.laptop = true; 513 sprintf(si->adi.name, "Nvidia GeForce FX 6200 Go"); 514 sprintf(si->adi.chipset, "NV44"); 515 status = nvxx_general_powerup(); 516 break; 517 case 0x016510de: /* Nvidia Quadro FX NVS 285 */ 518 si->ps.card_type = NV44; 519 si->ps.card_arch = NV40A; 520 sprintf(si->adi.name, "Nvidia Quadro FX NVS 285"); 521 sprintf(si->adi.chipset, "NV44"); 522 status = nvxx_general_powerup(); 523 break; 524 case 0x016610de: /* Nvidia GeForce 6400 Go */ 525 si->ps.card_type = NV44; 526 si->ps.card_arch = NV40A; 527 si->ps.laptop = true; 528 sprintf(si->adi.name, "Nvidia GeForce 6400 Go"); 529 sprintf(si->adi.chipset, "NV44"); 530 status = nvxx_general_powerup(); 531 break; 532 case 0x016710de: /* Nvidia GeForce 6200 Go */ 533 si->ps.card_type = NV44; 534 si->ps.card_arch = NV40A; 535 si->ps.laptop = true; 536 sprintf(si->adi.name, "Nvidia GeForce 6200 Go"); 537 sprintf(si->adi.chipset, "NV44"); 538 status = nvxx_general_powerup(); 539 break; 540 case 0x016810de: /* Nvidia GeForce 6400 Go */ 541 si->ps.card_type = NV44; 542 si->ps.card_arch = NV40A; 543 si->ps.laptop = true; 544 sprintf(si->adi.name, "Nvidia GeForce 6400 Go"); 545 sprintf(si->adi.chipset, "NV44"); 546 status = nvxx_general_powerup(); 547 break; 548 case 0x016910de: /* Nvidia GeForce 6250 Go */ 549 si->ps.card_type = NV44; 550 si->ps.card_arch = NV40A; 551 si->ps.laptop = true; 552 sprintf(si->adi.name, "Nvidia GeForce 6250 Go"); 553 sprintf(si->adi.chipset, "NV44"); 554 status = nvxx_general_powerup(); 555 break; 556 case 0x016a10de: /* Nvidia 7100 GS */ 557 si->ps.card_type = NV44; 558 si->ps.card_arch = NV40A; 559 sprintf(si->adi.name, "Nvidia GeForce 7100 GS"); 560 sprintf(si->adi.chipset, "NV44"); 561 status = nvxx_general_powerup(); 562 break; 563 case 0x016b10de: /* Nvidia unknown FX Go */ 564 case 0x016c10de: /* Nvidia unknown FX Go */ 565 case 0x016d10de: /* Nvidia unknown FX Go */ 566 si->ps.card_type = NV44; 567 si->ps.card_arch = NV40A; 568 si->ps.laptop = true; 569 sprintf(si->adi.name, "Nvidia unknown FX Go"); 570 sprintf(si->adi.chipset, "NV44"); 571 status = nvxx_general_powerup(); 572 break; 573 case 0x016e10de: /* Nvidia unknown FX */ 574 si->ps.card_type = NV44; 575 si->ps.card_arch = NV40A; 576 sprintf(si->adi.name, "Nvidia unknown FX"); 577 sprintf(si->adi.chipset, "NV44"); 578 status = nvxx_general_powerup(); 579 break; 580 case 0x017010de: /* Nvidia GeForce4 MX 460 */ 581 case 0x017110de: /* Nvidia GeForce4 MX 440 */ 582 case 0x017210de: /* Nvidia GeForce4 MX 420 */ 583 case 0x017310de: /* Nvidia GeForce4 MX 440SE */ 584 si->ps.card_type = NV17; 585 si->ps.card_arch = NV10A; 586 sprintf(si->adi.name, "Nvidia GeForce4 MX"); 587 sprintf(si->adi.chipset, "NV17"); 588 status = nvxx_general_powerup(); 589 break; 590 case 0x017410de: /* Nvidia GeForce4 440 Go */ 591 case 0x017510de: /* Nvidia GeForce4 420 Go */ 592 case 0x017610de: /* Nvidia GeForce4 420 Go 32M */ 593 case 0x017710de: /* Nvidia GeForce4 460 Go */ 594 case 0x017910de: /* Nvidia GeForce4 440 Go 64M (on PPC GeForce4 MX) */ 595 si->ps.card_type = NV17; 596 si->ps.card_arch = NV10A; 597 si->ps.laptop = true; 598 sprintf(si->adi.name, "Nvidia GeForce4 Go"); 599 sprintf(si->adi.chipset, "NV17"); 600 status = nvxx_general_powerup(); 601 break; 602 case 0x017810de: /* Nvidia Quadro4 500 XGL/550 XGL */ 603 case 0x017a10de: /* Nvidia Quadro4 200 NVS/400 NVS */ 604 si->ps.card_type = NV17; 605 si->ps.card_arch = NV10A; 606 sprintf(si->adi.name, "Nvidia Quadro4"); 607 sprintf(si->adi.chipset, "NV17"); 608 status = nvxx_general_powerup(); 609 break; 610 case 0x017c10de: /* Nvidia Quadro4 500 GoGL */ 611 si->ps.card_type = NV17; 612 si->ps.card_arch = NV10A; 613 si->ps.laptop = true; 614 sprintf(si->adi.name, "Nvidia Quadro4 500 GoGL"); 615 sprintf(si->adi.chipset, "NV17"); 616 status = nvxx_general_powerup(); 617 break; 618 case 0x017d10de: /* Nvidia GeForce4 410 Go 16M*/ 619 si->ps.card_type = NV17; 620 si->ps.card_arch = NV10A; 621 si->ps.laptop = true; 622 sprintf(si->adi.name, "Nvidia GeForce4 410 Go"); 623 sprintf(si->adi.chipset, "NV17"); 624 status = nvxx_general_powerup(); 625 break; 626 case 0x018110de: /* Nvidia GeForce4 MX 440 AGP8X */ 627 case 0x018210de: /* Nvidia GeForce4 MX 440SE AGP8X */ 628 case 0x018310de: /* Nvidia GeForce4 MX 420 AGP8X */ 629 case 0x018510de: /* Nvidia GeForce4 MX 4000 AGP8X */ 630 si->ps.card_type = NV18; 631 si->ps.card_arch = NV10A; 632 sprintf(si->adi.name, "Nvidia GeForce4 MX AGP8X"); 633 sprintf(si->adi.chipset, "NV18"); 634 status = nvxx_general_powerup(); 635 break; 636 case 0x018610de: /* Nvidia GeForce4 448 Go */ 637 case 0x018710de: /* Nvidia GeForce4 488 Go */ 638 si->ps.card_type = NV18; 639 si->ps.card_arch = NV10A; 640 si->ps.laptop = true; 641 sprintf(si->adi.name, "Nvidia GeForce4 Go"); 642 sprintf(si->adi.chipset, "NV18"); 643 status = nvxx_general_powerup(); 644 break; 645 case 0x018810de: /* Nvidia Quadro4 580 XGL */ 646 si->ps.card_type = NV18; 647 si->ps.card_arch = NV10A; 648 sprintf(si->adi.name, "Nvidia Quadro4"); 649 sprintf(si->adi.chipset, "NV18"); 650 status = nvxx_general_powerup(); 651 break; 652 case 0x018910de: /* Nvidia GeForce4 MX AGP8X (PPC) */ 653 si->ps.card_type = NV18; 654 si->ps.card_arch = NV10A; 655 sprintf(si->adi.name, "Nvidia GeForce4 MX AGP8X"); 656 sprintf(si->adi.chipset, "NV18"); 657 status = nvxx_general_powerup(); 658 break; 659 case 0x018a10de: /* Nvidia Quadro4 280 NVS AGP8X */ 660 case 0x018b10de: /* Nvidia Quadro4 380 XGL */ 661 case 0x018c10de: /* Nvidia Quadro4 NVS 50 PCI */ 662 si->ps.card_type = NV18; 663 si->ps.card_arch = NV10A; 664 sprintf(si->adi.name, "Nvidia Quadro4"); 665 sprintf(si->adi.chipset, "NV18"); 666 status = nvxx_general_powerup(); 667 break; 668 case 0x018d10de: /* Nvidia GeForce4 448 Go */ 669 si->ps.card_type = NV18; 670 si->ps.card_arch = NV10A; 671 si->ps.laptop = true; 672 sprintf(si->adi.name, "Nvidia GeForce4 Go"); 673 sprintf(si->adi.chipset, "NV18"); 674 status = nvxx_general_powerup(); 675 break; 676 case 0x01a010de: /* Nvidia GeForce2 Integrated GPU */ 677 si->ps.card_type = NV11; 678 si->ps.card_arch = NV10A; 679 sprintf(si->adi.name, "Nvidia GeForce2 Integrated GPU"); 680 sprintf(si->adi.chipset, "CRUSH, NV11"); 681 status = nvxx_general_powerup(); 682 break; 683 case 0x01d110de: /* Nvidia GeForce 7300 LE */ 684 case 0x01df10de: /* Nvidia GeForce 7300 GS */ 685 si->ps.card_type = G72; 686 si->ps.card_arch = NV40A; 687 sprintf(si->adi.name, "Nvidia GeForce 7300"); 688 sprintf(si->adi.chipset, "G72"); 689 status = nvxx_general_powerup(); 690 break; 691 case 0x01d810de: /* Nvidia GeForce 7400 GO */ 692 si->ps.card_type = G72; 693 si->ps.card_arch = NV40A; 694 sprintf(si->adi.name, "Nvidia GeForce 7400 Go"); 695 sprintf(si->adi.chipset, "G72"); 696 status = nvxx_general_powerup(); 697 break; 698 case 0x01f010de: /* Nvidia GeForce4 MX Integrated GPU */ 699 si->ps.card_type = NV17; 700 si->ps.card_arch = NV10A; 701 sprintf(si->adi.name, "Nvidia GeForce4 MX Integr. GPU"); 702 sprintf(si->adi.chipset, "NFORCE2, NV17"); 703 status = nvxx_general_powerup(); 704 break; 705 case 0x020010de: /* Nvidia GeForce3 */ 706 case 0x020110de: /* Nvidia GeForce3 Ti 200 */ 707 case 0x020210de: /* Nvidia GeForce3 Ti 500 */ 708 si->ps.card_type = NV20; 709 si->ps.card_arch = NV20A; 710 sprintf(si->adi.name, "Nvidia GeForce3"); 711 sprintf(si->adi.chipset, "NV20"); 712 status = nvxx_general_powerup(); 713 break; 714 case 0x020310de: /* Nvidia Quadro DCC */ 715 si->ps.card_type = NV20; 716 si->ps.card_arch = NV20A; 717 sprintf(si->adi.name, "Nvidia Quadro DCC"); 718 sprintf(si->adi.chipset, "NV20"); 719 status = nvxx_general_powerup(); 720 break; 721 case 0x021110de: /* Nvidia GeForce FX 6800 */ 722 case 0x021210de: /* Nvidia GeForce FX 6800LE */ 723 case 0x021510de: /* Nvidia GeForce FX 6800 GT */ 724 si->ps.card_type = NV45; /* NV48 is NV45 with 512Mb */ 725 si->ps.card_arch = NV40A; 726 sprintf(si->adi.name, "Nvidia GeForce FX 6800"); 727 sprintf(si->adi.chipset, "NV48"); 728 status = nvxx_general_powerup(); 729 break; 730 case 0x022010de: /* Nvidia unknown FX */ 731 si->ps.card_type = NV44; 732 si->ps.card_arch = NV40A; 733 sprintf(si->adi.name, "Nvidia unknown FX"); 734 sprintf(si->adi.chipset, "NV44"); 735 status = nvxx_general_powerup(); 736 break; 737 case 0x022110de: /* Nvidia GeForce 6200 AGP (256Mb - 128bit) */ 738 si->ps.card_type = NV44; 739 si->ps.card_arch = NV40A; 740 sprintf(si->adi.name, "Nvidia GeForce 6200 AGP 256Mb"); 741 sprintf(si->adi.chipset, "NV44"); 742 status = nvxx_general_powerup(); 743 break; 744 case 0x022210de: /* Nvidia unknown FX */ 745 si->ps.card_type = NV44; 746 si->ps.card_arch = NV40A; 747 sprintf(si->adi.name, "Nvidia unknown FX"); 748 sprintf(si->adi.chipset, "NV44"); 749 status = nvxx_general_powerup(); 750 break; 751 case 0x022810de: /* Nvidia unknown FX Go */ 752 si->ps.card_type = NV44; 753 si->ps.card_arch = NV40A; 754 si->ps.laptop = true; 755 sprintf(si->adi.name, "Nvidia unknown FX Go"); 756 sprintf(si->adi.chipset, "NV44"); 757 status = nvxx_general_powerup(); 758 break; 759 case 0x024010de: /* Nvidia GeForce 6150 (NFORCE4 Integr.GPU) */ 760 case 0x024110de: /* Nvidia GeForce 6150 LE (NFORCE4 Integr.GPU) */ 761 si->ps.card_type = NV44; 762 si->ps.card_arch = NV40A; 763 sprintf(si->adi.name, "Nvidia GeForce 6150"); 764 sprintf(si->adi.chipset, "NV44"); 765 status = nvxx_general_powerup(); 766 break; 767 case 0x024210de: /* Nvidia GeForce 6100 (NFORCE4 Integr.GPU) */ 768 si->ps.card_type = NV44; 769 si->ps.card_arch = NV40A; 770 sprintf(si->adi.name, "Nvidia GeForce 6100"); 771 sprintf(si->adi.chipset, "NV44"); 772 status = nvxx_general_powerup(); 773 break; 774 case 0x025010de: /* Nvidia GeForce4 Ti 4600 */ 775 case 0x025110de: /* Nvidia GeForce4 Ti 4400 */ 776 case 0x025210de: /* Nvidia GeForce4 Ti 4600 */ 777 case 0x025310de: /* Nvidia GeForce4 Ti 4200 */ 778 si->ps.card_type = NV25; 779 si->ps.card_arch = NV20A; 780 sprintf(si->adi.name, "Nvidia GeForce4 Ti"); 781 sprintf(si->adi.chipset, "NV25"); 782 status = nvxx_general_powerup(); 783 break; 784 case 0x025810de: /* Nvidia Quadro4 900 XGL */ 785 case 0x025910de: /* Nvidia Quadro4 750 XGL */ 786 case 0x025b10de: /* Nvidia Quadro4 700 XGL */ 787 si->ps.card_type = NV25; 788 si->ps.card_arch = NV20A; 789 sprintf(si->adi.name, "Nvidia Quadro4 XGL"); 790 sprintf(si->adi.chipset, "NV25"); 791 status = nvxx_general_powerup(); 792 break; 793 case 0x028010de: /* Nvidia GeForce4 Ti 4800 AGP8X */ 794 case 0x028110de: /* Nvidia GeForce4 Ti 4200 AGP8X */ 795 si->ps.card_type = NV28; 796 si->ps.card_arch = NV20A; 797 sprintf(si->adi.name, "Nvidia GeForce4 Ti AGP8X"); 798 sprintf(si->adi.chipset, "NV28"); 799 status = nvxx_general_powerup(); 800 break; 801 case 0x028210de: /* Nvidia GeForce4 Ti 4800SE */ 802 si->ps.card_type = NV28; 803 si->ps.card_arch = NV20A; 804 sprintf(si->adi.name, "Nvidia GeForce4 Ti 4800SE"); 805 sprintf(si->adi.chipset, "NV28"); 806 status = nvxx_general_powerup(); 807 break; 808 case 0x028610de: /* Nvidia GeForce4 4200 Go */ 809 si->ps.card_type = NV28; 810 si->ps.card_arch = NV20A; 811 si->ps.laptop = true; 812 sprintf(si->adi.name, "Nvidia GeForce4 4200 Go"); 813 sprintf(si->adi.chipset, "NV28"); 814 status = nvxx_general_powerup(); 815 break; 816 case 0x028810de: /* Nvidia Quadro4 980 XGL */ 817 case 0x028910de: /* Nvidia Quadro4 780 XGL */ 818 si->ps.card_type = NV28; 819 si->ps.card_arch = NV20A; 820 sprintf(si->adi.name, "Nvidia Quadro4 XGL"); 821 sprintf(si->adi.chipset, "NV28"); 822 status = nvxx_general_powerup(); 823 break; 824 case 0x028c10de: /* Nvidia Quadro4 700 GoGL */ 825 si->ps.card_type = NV28; 826 si->ps.card_arch = NV20A; 827 si->ps.laptop = true; 828 sprintf(si->adi.name, "Nvidia Quadro4 700 GoGL"); 829 sprintf(si->adi.chipset, "NV28"); 830 status = nvxx_general_powerup(); 831 break; 832 case 0x029010de: /* Nvidia GeForce 7900 GTX */ 833 case 0x029110de: /* Nvidia GeForce 7900 GT */ 834 si->ps.card_type = G71; 835 si->ps.card_arch = NV40A; 836 sprintf(si->adi.name, "Nvidia GeForce 7900 GT(X)"); 837 sprintf(si->adi.chipset, "G71"); 838 status = nvxx_general_powerup(); 839 break; 840 case 0x02a010de: /* Nvidia GeForce3 Integrated GPU */ 841 si->ps.card_type = NV20; 842 si->ps.card_arch = NV20A; 843 sprintf(si->adi.name, "Nvidia GeForce3 Integrated GPU"); 844 sprintf(si->adi.chipset, "XBOX, NV20"); 845 status = nvxx_general_powerup(); 846 break; 847 case 0x030110de: /* Nvidia GeForce FX 5800 Ultra */ 848 case 0x030210de: /* Nvidia GeForce FX 5800 */ 849 si->ps.card_type = NV30; 850 si->ps.card_arch = NV30A; 851 sprintf(si->adi.name, "Nvidia GeForce FX 5800"); 852 sprintf(si->adi.chipset, "NV30"); 853 status = nvxx_general_powerup(); 854 break; 855 case 0x030810de: /* Nvidia Quadro FX 2000 */ 856 case 0x030910de: /* Nvidia Quadro FX 1000 */ 857 si->ps.card_type = NV30; 858 si->ps.card_arch = NV30A; 859 sprintf(si->adi.name, "Nvidia Quadro FX"); 860 sprintf(si->adi.chipset, "NV30"); 861 status = nvxx_general_powerup(); 862 break; 863 case 0x031110de: /* Nvidia GeForce FX 5600 Ultra */ 864 case 0x031210de: /* Nvidia GeForce FX 5600 */ 865 si->ps.card_type = NV31; 866 si->ps.card_arch = NV30A; 867 sprintf(si->adi.name, "Nvidia GeForce FX 5600"); 868 sprintf(si->adi.chipset, "NV31"); 869 status = nvxx_general_powerup(); 870 break; 871 case 0x031310de: /* Nvidia unknown FX */ 872 si->ps.card_type = NV31; 873 si->ps.card_arch = NV30A; 874 sprintf(si->adi.name, "Nvidia unknown FX"); 875 sprintf(si->adi.chipset, "NV31"); 876 status = nvxx_general_powerup(); 877 break; 878 case 0x031410de: /* Nvidia GeForce FX 5600XT */ 879 si->ps.card_type = NV31; 880 si->ps.card_arch = NV30A; 881 sprintf(si->adi.name, "Nvidia GeForce FX 5600XT"); 882 sprintf(si->adi.chipset, "NV31"); 883 status = nvxx_general_powerup(); 884 break; 885 case 0x031610de: /* Nvidia unknown FX Go */ 886 case 0x031710de: /* Nvidia unknown FX Go */ 887 si->ps.card_type = NV31; 888 si->ps.card_arch = NV30A; 889 si->ps.laptop = true; 890 sprintf(si->adi.name, "Nvidia unknown FX Go"); 891 sprintf(si->adi.chipset, "NV31"); 892 status = nvxx_general_powerup(); 893 break; 894 case 0x031a10de: /* Nvidia GeForce FX 5600 Go */ 895 si->ps.card_type = NV31; 896 si->ps.card_arch = NV30A; 897 si->ps.laptop = true; 898 sprintf(si->adi.name, "Nvidia GeForce FX 5600 Go"); 899 sprintf(si->adi.chipset, "NV31"); 900 status = nvxx_general_powerup(); 901 break; 902 case 0x031b10de: /* Nvidia GeForce FX 5650 Go */ 903 si->ps.card_type = NV31; 904 si->ps.card_arch = NV30A; 905 si->ps.laptop = true; 906 sprintf(si->adi.name, "Nvidia GeForce FX 5650 Go"); 907 sprintf(si->adi.chipset, "NV31"); 908 status = nvxx_general_powerup(); 909 break; 910 case 0x031c10de: /* Nvidia Quadro FX 700 Go */ 911 si->ps.card_type = NV31; 912 si->ps.card_arch = NV30A; 913 si->ps.laptop = true; 914 sprintf(si->adi.name, "Nvidia Quadro FX 700 Go"); 915 sprintf(si->adi.chipset, "NV31"); 916 status = nvxx_general_powerup(); 917 break; 918 case 0x031d10de: /* Nvidia unknown FX Go */ 919 case 0x031e10de: /* Nvidia unknown FX Go */ 920 case 0x031f10de: /* Nvidia unknown FX Go */ 921 si->ps.card_type = NV31; 922 si->ps.card_arch = NV30A; 923 si->ps.laptop = true; 924 sprintf(si->adi.name, "Nvidia unknown FX Go"); 925 sprintf(si->adi.chipset, "NV31"); 926 status = nvxx_general_powerup(); 927 break; 928 case 0x032010de: /* Nvidia GeForce FX 5200 */ 929 case 0x032110de: /* Nvidia GeForce FX 5200 Ultra */ 930 case 0x032210de: /* Nvidia GeForce FX 5200 */ 931 case 0x032310de: /* Nvidia GeForce FX 5200LE */ 932 si->ps.card_type = NV34; 933 si->ps.card_arch = NV30A; 934 sprintf(si->adi.name, "Nvidia GeForce FX 5200"); 935 sprintf(si->adi.chipset, "NV34"); 936 status = nvxx_general_powerup(); 937 break; 938 case 0x032410de: /* Nvidia GeForce FX 5200 Go */ 939 si->ps.card_type = NV34; 940 si->ps.card_arch = NV30A; 941 si->ps.laptop = true; 942 sprintf(si->adi.name, "Nvidia GeForce FX 5200 Go"); 943 sprintf(si->adi.chipset, "NV34"); 944 status = nvxx_general_powerup(); 945 break; 946 case 0x032510de: /* Nvidia GeForce FX 5250 Go */ 947 si->ps.card_type = NV34; 948 si->ps.card_arch = NV30A; 949 si->ps.laptop = true; 950 sprintf(si->adi.name, "Nvidia GeForce FX 5250 Go"); 951 sprintf(si->adi.chipset, "NV34"); 952 status = nvxx_general_powerup(); 953 break; 954 case 0x032610de: /* Nvidia GeForce FX 5500 */ 955 si->ps.card_type = NV34; 956 si->ps.card_arch = NV30A; 957 sprintf(si->adi.name, "Nvidia GeForce FX 5500"); 958 sprintf(si->adi.chipset, "NV34"); 959 status = nvxx_general_powerup(); 960 break; 961 case 0x032710de: /* Nvidia GeForce FX 5100 */ 962 si->ps.card_type = NV34; 963 si->ps.card_arch = NV30A; 964 sprintf(si->adi.name, "Nvidia GeForce FX 5100"); 965 sprintf(si->adi.chipset, "NV34"); 966 status = nvxx_general_powerup(); 967 break; 968 case 0x032810de: /* Nvidia GeForce FX 5200 Go 32M/64M */ 969 si->ps.card_type = NV34; 970 si->ps.card_arch = NV30A; 971 si->ps.laptop = true; 972 sprintf(si->adi.name, "Nvidia GeForce FX 5200 Go"); 973 sprintf(si->adi.chipset, "NV34"); 974 status = nvxx_general_powerup(); 975 break; 976 case 0x032910de: /* Nvidia GeForce FX 5200 (PPC) */ 977 si->ps.card_type = NV34; 978 si->ps.card_arch = NV30A; 979 sprintf(si->adi.name, "Nvidia GeForce FX 5200"); 980 sprintf(si->adi.chipset, "NV34"); 981 status = nvxx_general_powerup(); 982 break; 983 case 0x032a10de: /* Nvidia Quadro NVS 280 PCI */ 984 si->ps.card_type = NV34; 985 si->ps.card_arch = NV30A; 986 sprintf(si->adi.name, "Nvidia Quadro NVS 280 PCI"); 987 sprintf(si->adi.chipset, "NV34"); 988 status = nvxx_general_powerup(); 989 break; 990 case 0x032b10de: /* Nvidia Quadro FX 500/600 PCI */ 991 si->ps.card_type = NV34; 992 si->ps.card_arch = NV30A; 993 sprintf(si->adi.name, "Nvidia Quadro FX 500/600 PCI"); 994 sprintf(si->adi.chipset, "NV34"); 995 status = nvxx_general_powerup(); 996 break; 997 case 0x032c10de: /* Nvidia GeForce FX 5300 Go */ 998 case 0x032d10de: /* Nvidia GeForce FX 5100 Go */ 999 si->ps.card_type = NV34; 1000 si->ps.card_arch = NV30A; 1001 si->ps.laptop = true; 1002 sprintf(si->adi.name, "Nvidia GeForce FX Go"); 1003 sprintf(si->adi.chipset, "NV34"); 1004 status = nvxx_general_powerup(); 1005 break; 1006 case 0x032e10de: /* Nvidia unknown FX Go */ 1007 case 0x032f10de: /* Nvidia unknown FX Go */ 1008 si->ps.card_type = NV34; 1009 si->ps.card_arch = NV30A; 1010 si->ps.laptop = true; 1011 sprintf(si->adi.name, "Nvidia unknown FX Go"); 1012 sprintf(si->adi.chipset, "NV34"); 1013 status = nvxx_general_powerup(); 1014 break; 1015 case 0x033010de: /* Nvidia GeForce FX 5900 Ultra */ 1016 case 0x033110de: /* Nvidia GeForce FX 5900 */ 1017 si->ps.card_type = NV35; 1018 si->ps.card_arch = NV30A; 1019 sprintf(si->adi.name, "Nvidia GeForce FX 5900"); 1020 sprintf(si->adi.chipset, "NV35"); 1021 status = nvxx_general_powerup(); 1022 break; 1023 case 0x033210de: /* Nvidia GeForce FX 5900 XT */ 1024 si->ps.card_type = NV35; 1025 si->ps.card_arch = NV30A; 1026 sprintf(si->adi.name, "Nvidia GeForce FX 5900 XT"); 1027 sprintf(si->adi.chipset, "NV35"); 1028 status = nvxx_general_powerup(); 1029 break; 1030 case 0x033310de: /* Nvidia GeForce FX 5950 Ultra */ 1031 si->ps.card_type = NV38; 1032 si->ps.card_arch = NV30A; 1033 sprintf(si->adi.name, "Nvidia GeForce FX 5950 Ultra"); 1034 sprintf(si->adi.chipset, "NV38"); 1035 status = nvxx_general_powerup(); 1036 break; 1037 case 0x033410de: /* Nvidia GeForce FX 5900 ZT */ 1038 si->ps.card_type = NV38; 1039 si->ps.card_arch = NV30A; 1040 sprintf(si->adi.name, "Nvidia GeForce FX 5900 ZT"); 1041 sprintf(si->adi.chipset, "NV38(?)"); 1042 status = nvxx_general_powerup(); 1043 break; 1044 case 0x033810de: /* Nvidia Quadro FX 3000 */ 1045 si->ps.card_type = NV35; 1046 si->ps.card_arch = NV30A; 1047 sprintf(si->adi.name, "Nvidia Quadro FX 3000"); 1048 sprintf(si->adi.chipset, "NV35"); 1049 status = nvxx_general_powerup(); 1050 break; 1051 case 0x033f10de: /* Nvidia Quadro FX 700 */ 1052 si->ps.card_type = NV35; 1053 si->ps.card_arch = NV30A; 1054 sprintf(si->adi.name, "Nvidia Quadro FX 700"); 1055 sprintf(si->adi.chipset, "NV35"); 1056 status = nvxx_general_powerup(); 1057 break; 1058 case 0x034110de: /* Nvidia GeForce FX 5700 Ultra */ 1059 case 0x034210de: /* Nvidia GeForce FX 5700 */ 1060 case 0x034310de: /* Nvidia GeForce FX 5700LE */ 1061 case 0x034410de: /* Nvidia GeForce FX 5700VE */ 1062 si->ps.card_type = NV36; 1063 si->ps.card_arch = NV30A; 1064 sprintf(si->adi.name, "Nvidia GeForce FX 5700"); 1065 sprintf(si->adi.chipset, "NV36"); 1066 status = nvxx_general_powerup(); 1067 break; 1068 case 0x034510de: /* Nvidia unknown FX */ 1069 si->ps.card_type = NV36; 1070 si->ps.card_arch = NV30A; 1071 sprintf(si->adi.name, "Nvidia unknown FX"); 1072 sprintf(si->adi.chipset, "NV36"); 1073 status = nvxx_general_powerup(); 1074 break; 1075 case 0x034710de: /* Nvidia GeForce FX 5700 Go */ 1076 case 0x034810de: /* Nvidia GeForce FX 5700 Go */ 1077 si->ps.card_type = NV36; 1078 si->ps.card_arch = NV30A; 1079 si->ps.laptop = true; 1080 sprintf(si->adi.name, "Nvidia GeForce FX 5700 Go"); 1081 sprintf(si->adi.chipset, "NV36"); 1082 status = nvxx_general_powerup(); 1083 break; 1084 case 0x034910de: /* Nvidia unknown FX Go */ 1085 case 0x034b10de: /* Nvidia unknown FX Go */ 1086 si->ps.card_type = NV36; 1087 si->ps.card_arch = NV30A; 1088 si->ps.laptop = true; 1089 sprintf(si->adi.name, "Nvidia unknown FX Go"); 1090 sprintf(si->adi.chipset, "NV36"); 1091 status = nvxx_general_powerup(); 1092 break; 1093 case 0x034c10de: /* Nvidia Quadro FX 1000 Go */ 1094 si->ps.card_type = NV36; 1095 si->ps.card_arch = NV30A; 1096 si->ps.laptop = true; 1097 sprintf(si->adi.name, "Nvidia Quadro FX 1000 Go"); 1098 sprintf(si->adi.chipset, "NV36"); 1099 status = nvxx_general_powerup(); 1100 break; 1101 case 0x034e10de: /* Nvidia Quadro FX 1100 */ 1102 si->ps.card_type = NV36; 1103 si->ps.card_arch = NV30A; 1104 sprintf(si->adi.name, "Nvidia Quadro FX 1100"); 1105 sprintf(si->adi.chipset, "NV36"); 1106 status = nvxx_general_powerup(); 1107 break; 1108 case 0x034f10de: /* Nvidia unknown FX */ 1109 si->ps.card_type = NV36; 1110 si->ps.card_arch = NV30A; 1111 sprintf(si->adi.name, "Nvidia unknown FX"); 1112 sprintf(si->adi.chipset, "NV36(?)"); 1113 status = nvxx_general_powerup(); 1114 break; 1115 case 0x039110de: /* Nvidia GeForce 7600 GT */ 1116 si->ps.card_type = G73; 1117 si->ps.card_arch = NV40A; 1118 sprintf(si->adi.name, "Nvidia GeForce 7600 GT"); 1119 sprintf(si->adi.chipset, "G73"); 1120 status = nvxx_general_powerup(); 1121 break; 1122 case 0x039210de: /* Nvidia GeForce 7600 GS */ 1123 case 0x02e110de: 1124 si->ps.card_type = G73; 1125 si->ps.card_arch = NV40A; 1126 sprintf(si->adi.name, "Nvidia GeForce 7600 GS"); 1127 sprintf(si->adi.chipset, "G73"); 1128 status = nvxx_general_powerup(); 1129 break; 1130 case 0x039310de: /* Nvidia GeForce 7300 GT */ 1131 si->ps.card_type = G73; 1132 si->ps.card_arch = NV40A; 1133 sprintf(si->adi.name, "Nvidia GeForce 7300 GT"); 1134 sprintf(si->adi.chipset, "G73"); 1135 status = nvxx_general_powerup(); 1136 break; 1137 case 0x039810de: /* Nvidia GeForce 7600 GO */ 1138 si->ps.card_type = G73; 1139 si->ps.card_arch = NV40A; 1140 si->ps.laptop = true; 1141 sprintf(si->adi.name, "Nvidia GeForce 7600 GO"); 1142 sprintf(si->adi.chipset, "G73"); 1143 status = nvxx_general_powerup(); 1144 break; 1145 /* Vendor Elsa GmbH */ 1146 case 0x0c601048: /* Elsa Gladiac Geforce2 MX */ 1147 si->ps.card_type = NV11; 1148 si->ps.card_arch = NV10A; 1149 sprintf(si->adi.name, "Elsa Gladiac Geforce2 MX"); 1150 sprintf(si->adi.chipset, "NV11"); 1151 status = nvxx_general_powerup(); 1152 break; 1153 /* Vendor Nvidia STB/SGS-Thompson */ 1154 case 0x002012d2: /* Nvidia STB/SGS-Thompson TNT1 */ 1155 si->ps.card_type = NV04; 1156 si->ps.card_arch = NV04A; 1157 sprintf(si->adi.name, "Nvidia STB/SGS-Thompson TNT1"); 1158 sprintf(si->adi.chipset, "NV04"); 1159 status = nvxx_general_powerup(); 1160 break; 1161 case 0x002812d2: /* Nvidia STB/SGS-Thompson TNT2 (pro) */ 1162 case 0x002912d2: /* Nvidia STB/SGS-Thompson TNT2 Ultra */ 1163 case 0x002a12d2: /* Nvidia STB/SGS-Thompson TNT2 */ 1164 case 0x002b12d2: /* Nvidia STB/SGS-Thompson TNT2 */ 1165 si->ps.card_type = NV05; 1166 si->ps.card_arch = NV04A; 1167 sprintf(si->adi.name, "Nvidia STB/SGS-Thompson TNT2"); 1168 sprintf(si->adi.chipset, "NV05"); 1169 status = nvxx_general_powerup(); 1170 break; 1171 case 0x002c12d2: /* Nvidia STB/SGS-Thompson Vanta (Lt) */ 1172 si->ps.card_type = NV05; 1173 si->ps.card_arch = NV04A; 1174 sprintf(si->adi.name, "Nvidia STB/SGS-Thompson Vanta"); 1175 sprintf(si->adi.chipset, "NV05"); 1176 status = nvxx_general_powerup(); 1177 break; 1178 case 0x002d12d2: /* Nvidia STB/SGS-Thompson TNT2-M64 (Pro) */ 1179 si->ps.card_type = NV05M64; 1180 si->ps.card_arch = NV04A; 1181 sprintf(si->adi.name, "Nvidia STB/SGS-Thompson TNT2M64"); 1182 sprintf(si->adi.chipset, "NV05 model 64"); 1183 status = nvxx_general_powerup(); 1184 break; 1185 case 0x002e12d2: /* Nvidia STB/SGS-Thompson NV06 Vanta */ 1186 case 0x002f12d2: /* Nvidia STB/SGS-Thompson NV06 Vanta */ 1187 si->ps.card_type = NV06; 1188 si->ps.card_arch = NV04A; 1189 sprintf(si->adi.name, "Nvidia STB/SGS-Thompson Vanta"); 1190 sprintf(si->adi.chipset, "NV06"); 1191 status = nvxx_general_powerup(); 1192 break; 1193 case 0x00a012d2: /* Nvidia STB/SGS-Thompson Aladdin TNT2 */ 1194 si->ps.card_type = NV05; 1195 si->ps.card_arch = NV04A; 1196 sprintf(si->adi.name, "Nvidia STB/SGS-Thompson TNT2"); 1197 sprintf(si->adi.chipset, "NV05"); 1198 status = nvxx_general_powerup(); 1199 break; 1200 /* Vendor Varisys Limited */ 1201 case 0x35031888: /* Varisys GeForce4 MX440 */ 1202 si->ps.card_type = NV17; 1203 si->ps.card_arch = NV10A; 1204 sprintf(si->adi.name, "Varisys GeForce4 MX440"); 1205 sprintf(si->adi.chipset, "NV17"); 1206 status = nvxx_general_powerup(); 1207 break; 1208 case 0x35051888: /* Varisys GeForce4 Ti 4200 */ 1209 si->ps.card_type = NV25; 1210 si->ps.card_arch = NV20A; 1211 sprintf(si->adi.name, "Varisys GeForce4 Ti 4200"); 1212 sprintf(si->adi.chipset, "NV25"); 1213 status = nvxx_general_powerup(); 1214 break; 1215 default: 1216 LOG(8,("POWERUP: Failed to detect valid card 0x%08x\n",CFGR(DEVID))); 1217 return B_ERROR; 1218 } 1219 1220 return status; 1221 } 1222 1223 static status_t test_ram() 1224 { 1225 uint32 value, offset; 1226 status_t result = B_OK; 1227 1228 /* make sure we don't corrupt the hardware cursor by using fbc.frame_buffer. */ 1229 if (si->fbc.frame_buffer == NULL) 1230 { 1231 LOG(8,("INIT: test_ram detected NULL pointer.\n")); 1232 return B_ERROR; 1233 } 1234 1235 for (offset = 0, value = 0x55aa55aa; offset < 256; offset++) 1236 { 1237 /* write testpattern to cardRAM */ 1238 ((uint32 *)si->fbc.frame_buffer)[offset] = value; 1239 /* toggle testpattern */ 1240 value = 0xffffffff - value; 1241 } 1242 1243 for (offset = 0, value = 0x55aa55aa; offset < 256; offset++) 1244 { 1245 /* readback and verify testpattern from cardRAM */ 1246 if (((uint32 *)si->fbc.frame_buffer)[offset] != value) result = B_ERROR; 1247 /* toggle testpattern */ 1248 value = 0xffffffff - value; 1249 } 1250 return result; 1251 } 1252 1253 /* NOTE: 1254 * This routine *has* to be done *after* SetDispplayMode has been executed, 1255 * or test results will not be representative! 1256 * (CAS latency is dependant on NV setup on some (DRAM) boards) */ 1257 status_t nv_set_cas_latency() 1258 { 1259 status_t result = B_ERROR; 1260 uint8 latency = 0; 1261 1262 /* check current RAM access to see if we need to change anything */ 1263 if (test_ram() == B_OK) 1264 { 1265 LOG(4,("INIT: RAM access OK.\n")); 1266 return B_OK; 1267 } 1268 1269 /* check if we read PINS at starttime so we have valid registersettings at our disposal */ 1270 if (si->ps.pins_status != B_OK) 1271 { 1272 LOG(4,("INIT: RAM access errors; not fixable: PINS was not read from cardBIOS.\n")); 1273 return B_ERROR; 1274 } 1275 1276 /* OK. We might have a problem, try to fix it now.. */ 1277 LOG(4,("INIT: RAM access errors; tuning CAS latency if prudent...\n")); 1278 1279 switch(si->ps.card_type) 1280 { 1281 default: 1282 LOG(4,("INIT: RAM CAS tuning not implemented for this card, aborting.\n")); 1283 return B_OK; 1284 break; 1285 } 1286 if (result == B_OK) 1287 LOG(4,("INIT: RAM access OK. CAS latency set to %d cycles.\n", latency)); 1288 else 1289 LOG(4,("INIT: RAM access not fixable. CAS latency set to %d cycles.\n", latency)); 1290 1291 return result; 1292 } 1293 1294 void setup_virtualized_heads(bool cross) 1295 { 1296 if (cross) 1297 { 1298 head1_interrupt_enable = (crtc_interrupt_enable) nv_crtc2_interrupt_enable; 1299 head1_update_fifo = (crtc_update_fifo) nv_crtc2_update_fifo; 1300 head1_validate_timing = (crtc_validate_timing) nv_crtc2_validate_timing; 1301 head1_set_timing = (crtc_set_timing) nv_crtc2_set_timing; 1302 head1_depth = (crtc_depth) nv_crtc2_depth; 1303 head1_dpms = (crtc_dpms) nv_crtc2_dpms; 1304 head1_set_display_pitch = (crtc_set_display_pitch) nv_crtc2_set_display_pitch; 1305 head1_set_display_start = (crtc_set_display_start) nv_crtc2_set_display_start; 1306 head1_cursor_init = (crtc_cursor_init) nv_crtc2_cursor_init; 1307 head1_cursor_show = (crtc_cursor_show) nv_crtc2_cursor_show; 1308 head1_cursor_hide = (crtc_cursor_hide) nv_crtc2_cursor_hide; 1309 head1_cursor_define = (crtc_cursor_define) nv_crtc2_cursor_define; 1310 head1_cursor_position = (crtc_cursor_position) nv_crtc2_cursor_position; 1311 head1_stop_tvout = (crtc_stop_tvout) nv_crtc2_stop_tvout; 1312 head1_start_tvout = (crtc_start_tvout) nv_crtc2_start_tvout; 1313 1314 head1_mode = (dac_mode) nv_dac2_mode; 1315 head1_palette = (dac_palette) nv_dac2_palette; 1316 head1_set_pix_pll = (dac_set_pix_pll) nv_dac2_set_pix_pll; 1317 head1_pix_pll_find = (dac_pix_pll_find) nv_dac2_pix_pll_find; 1318 1319 head2_interrupt_enable = (crtc_interrupt_enable) nv_crtc_interrupt_enable; 1320 head2_update_fifo = (crtc_update_fifo) nv_crtc_update_fifo; 1321 head2_validate_timing = (crtc_validate_timing) nv_crtc_validate_timing; 1322 head2_set_timing = (crtc_set_timing) nv_crtc_set_timing; 1323 head2_depth = (crtc_depth) nv_crtc_depth; 1324 head2_dpms = (crtc_dpms) nv_crtc_dpms; 1325 head2_set_display_pitch = (crtc_set_display_pitch) nv_crtc_set_display_pitch; 1326 head2_set_display_start = (crtc_set_display_start) nv_crtc_set_display_start; 1327 head2_cursor_init = (crtc_cursor_init) nv_crtc_cursor_init; 1328 head2_cursor_show = (crtc_cursor_show) nv_crtc_cursor_show; 1329 head2_cursor_hide = (crtc_cursor_hide) nv_crtc_cursor_hide; 1330 head2_cursor_define = (crtc_cursor_define) nv_crtc_cursor_define; 1331 head2_cursor_position = (crtc_cursor_position) nv_crtc_cursor_position; 1332 head2_stop_tvout = (crtc_stop_tvout) nv_crtc_stop_tvout; 1333 head2_start_tvout = (crtc_start_tvout) nv_crtc_start_tvout; 1334 1335 head2_mode = (dac_mode) nv_dac_mode; 1336 head2_palette = (dac_palette) nv_dac_palette; 1337 head2_set_pix_pll = (dac_set_pix_pll) nv_dac_set_pix_pll; 1338 head2_pix_pll_find = (dac_pix_pll_find) nv_dac_pix_pll_find; 1339 } 1340 else 1341 { 1342 head1_interrupt_enable = (crtc_interrupt_enable) nv_crtc_interrupt_enable; 1343 head1_update_fifo = (crtc_update_fifo) nv_crtc_update_fifo; 1344 head1_validate_timing = (crtc_validate_timing) nv_crtc_validate_timing; 1345 head1_set_timing = (crtc_set_timing) nv_crtc_set_timing; 1346 head1_depth = (crtc_depth) nv_crtc_depth; 1347 head1_dpms = (crtc_dpms) nv_crtc_dpms; 1348 head1_set_display_pitch = (crtc_set_display_pitch) nv_crtc_set_display_pitch; 1349 head1_set_display_start = (crtc_set_display_start) nv_crtc_set_display_start; 1350 head1_cursor_init = (crtc_cursor_init) nv_crtc_cursor_init; 1351 head1_cursor_show = (crtc_cursor_show) nv_crtc_cursor_show; 1352 head1_cursor_hide = (crtc_cursor_hide) nv_crtc_cursor_hide; 1353 head1_cursor_define = (crtc_cursor_define) nv_crtc_cursor_define; 1354 head1_cursor_position = (crtc_cursor_position) nv_crtc_cursor_position; 1355 head1_stop_tvout = (crtc_stop_tvout) nv_crtc_stop_tvout; 1356 head1_start_tvout = (crtc_start_tvout) nv_crtc_start_tvout; 1357 1358 head1_mode = (dac_mode) nv_dac_mode; 1359 head1_palette = (dac_palette) nv_dac_palette; 1360 head1_set_pix_pll = (dac_set_pix_pll) nv_dac_set_pix_pll; 1361 head1_pix_pll_find = (dac_pix_pll_find) nv_dac_pix_pll_find; 1362 1363 head2_interrupt_enable = (crtc_interrupt_enable) nv_crtc2_interrupt_enable; 1364 head2_update_fifo = (crtc_update_fifo) nv_crtc2_update_fifo; 1365 head2_validate_timing = (crtc_validate_timing) nv_crtc2_validate_timing; 1366 head2_set_timing = (crtc_set_timing) nv_crtc2_set_timing; 1367 head2_depth = (crtc_depth) nv_crtc2_depth; 1368 head2_dpms = (crtc_dpms) nv_crtc2_dpms; 1369 head2_set_display_pitch = (crtc_set_display_pitch) nv_crtc2_set_display_pitch; 1370 head2_set_display_start = (crtc_set_display_start) nv_crtc2_set_display_start; 1371 head2_cursor_init = (crtc_cursor_init) nv_crtc2_cursor_init; 1372 head2_cursor_show = (crtc_cursor_show) nv_crtc2_cursor_show; 1373 head2_cursor_hide = (crtc_cursor_hide) nv_crtc2_cursor_hide; 1374 head2_cursor_define = (crtc_cursor_define) nv_crtc2_cursor_define; 1375 head2_cursor_position = (crtc_cursor_position) nv_crtc2_cursor_position; 1376 head2_stop_tvout = (crtc_stop_tvout) nv_crtc2_stop_tvout; 1377 head2_start_tvout = (crtc_start_tvout) nv_crtc2_start_tvout; 1378 1379 head2_mode = (dac_mode) nv_dac2_mode; 1380 head2_palette = (dac_palette) nv_dac2_palette; 1381 head2_set_pix_pll = (dac_set_pix_pll) nv_dac2_set_pix_pll; 1382 head2_pix_pll_find = (dac_pix_pll_find) nv_dac2_pix_pll_find; 1383 } 1384 } 1385 1386 void set_crtc_owner(bool head) 1387 { 1388 if (si->ps.secondary_head) 1389 { 1390 if (!head) 1391 { 1392 /* note: 'OWNER' is a non-standard register in behaviour(!) on NV11's, 1393 * while non-NV11 cards behave normally. 1394 * 1395 * Double-write action needed on those strange NV11 cards: */ 1396 /* RESET: needed on NV11 */ 1397 CRTCW(OWNER, 0xff); 1398 /* enable access to CRTC1, SEQ1, GRPH1, ATB1, ??? */ 1399 CRTCW(OWNER, 0x00); 1400 } 1401 else 1402 { 1403 /* note: 'OWNER' is a non-standard register in behaviour(!) on NV11's, 1404 * while non-NV11 cards behave normally. 1405 * 1406 * Double-write action needed on those strange NV11 cards: */ 1407 /* RESET: needed on NV11 */ 1408 CRTC2W(OWNER, 0xff); 1409 /* enable access to CRTC2, SEQ2, GRPH2, ATB2, ??? */ 1410 CRTC2W(OWNER, 0x03); 1411 } 1412 } 1413 } 1414 1415 static status_t nvxx_general_powerup() 1416 { 1417 LOG(4, ("INIT: NV powerup\n")); 1418 LOG(4,("POWERUP: Detected %s (%s)\n", si->adi.name, si->adi.chipset)); 1419 1420 /* setup cardspecs */ 1421 /* note: 1422 * this MUST be done before the driver attempts a card coldstart */ 1423 set_specs(); 1424 1425 /* only process BIOS for finetuning specs and coldstarting card if requested 1426 * by the user; 1427 * note: 1428 * this in fact frees the driver from relying on the BIOS to be executed 1429 * at system power-up POST time. */ 1430 if (!si->settings.usebios) 1431 { 1432 /* Make sure we are running in PCI (not AGP) mode: 1433 * This is a requirement for safely coldstarting cards! 1434 * (some cards reset their AGP PLL during startup which makes acceleration 1435 * engine DMA fail later on. A reboot is needed to overcome that.) 1436 * Note: 1437 * This may only be done when no transfers are in progress on the bus, so now 1438 * is probably a good time.. */ 1439 nv_agp_setup(false); 1440 1441 LOG(2, ("INIT: Attempting card coldstart!\n")); 1442 /* update the cardspecs in the shared_info PINS struct according to reported 1443 * specs as much as is possible; 1444 * this also coldstarts the card if possible (executes BIOS CMD script(s)) */ 1445 parse_pins(); 1446 } 1447 else 1448 { 1449 LOG(2, ("INIT: Skipping card coldstart!\n")); 1450 } 1451 1452 unlock_card(); 1453 1454 /* get RAM size, detect TV encoder and do fake panel startup (panel init code 1455 * is still missing). */ 1456 fake_panel_start(); 1457 1458 /* log the final card specifications */ 1459 dump_pins(); 1460 1461 /* dump config space as it is after a possible coldstart attempt */ 1462 if (si->settings.logmask & 0x80000000) nv_dump_configuration_space(); 1463 1464 /* setup CRTC and DAC functions access: determined in fake_panel_start */ 1465 setup_virtualized_heads(si->ps.crtc2_prim); 1466 1467 /* do powerup needed from pre-inited card state as done by system POST cardBIOS 1468 * execution or driver coldstart above */ 1469 return nv_general_bios_to_powergraphics(); 1470 } 1471 1472 /* this routine switches the CRTC/DAC sets to 'connectors', but only for analog 1473 * outputs. We need this to make sure the analog 'switch' is set in the same way the 1474 * digital 'switch' is set by the BIOS or we might not be able to use dualhead. */ 1475 status_t nv_general_output_select(bool cross) 1476 { 1477 /* make sure this call is warranted */ 1478 if (si->ps.secondary_head) 1479 { 1480 /* NV11 cards can't switch heads (confirmed) */ 1481 if (si->ps.card_type != NV11) 1482 { 1483 if (cross) 1484 { 1485 LOG(4,("INIT: switching analog outputs to be cross-connected\n")); 1486 1487 /* enable head 2 on connector 1 */ 1488 /* (b8 = select CRTC (head) for output, 1489 * b4 = ??? (confirmed not to be a FP switch), 1490 * b0 = enable CRT) */ 1491 DACW(OUTPUT, 0x00000101); 1492 /* enable head 1 on connector 2 */ 1493 DAC2W(OUTPUT, 0x00000001); 1494 } 1495 else 1496 { 1497 LOG(4,("INIT: switching analog outputs to be straight-through\n")); 1498 1499 /* enable head 1 on connector 1 */ 1500 DACW(OUTPUT, 0x00000001); 1501 /* enable head 2 on connector 2 */ 1502 DAC2W(OUTPUT, 0x00000101); 1503 } 1504 } 1505 else 1506 { 1507 LOG(4,("INIT: NV11 analog outputs are hardwired to be straight-through\n")); 1508 } 1509 return B_OK; 1510 } 1511 else 1512 { 1513 return B_ERROR; 1514 } 1515 } 1516 1517 /* this routine switches CRTC/DAC set use. We need this because it's unknown howto 1518 * switch digital panels to/from a specific CRTC/DAC set. */ 1519 status_t nv_general_head_select(bool cross) 1520 { 1521 /* make sure this call is warranted */ 1522 if (si->ps.secondary_head) 1523 { 1524 /* invert CRTC/DAC use to do switching */ 1525 if (cross) 1526 { 1527 LOG(4,("INIT: switching CRTC/DAC use to be cross-connected\n")); 1528 si->crtc_switch_mode = !si->ps.crtc2_prim; 1529 } 1530 else 1531 { 1532 LOG(4,("INIT: switching CRTC/DAC use to be straight-through\n")); 1533 si->crtc_switch_mode = si->ps.crtc2_prim; 1534 } 1535 /* update CRTC and DAC functions access */ 1536 setup_virtualized_heads(si->crtc_switch_mode); 1537 1538 return B_OK; 1539 } 1540 else 1541 { 1542 return B_ERROR; 1543 } 1544 } 1545 1546 static void unlock_card(void) 1547 { 1548 /* power-up all nvidia hardware function blocks */ 1549 /* bit 28: OVERLAY ENGINE (BES), 1550 * bit 25: CRTC2, (> NV04A) 1551 * bit 24: CRTC1, 1552 * bit 20: framebuffer, 1553 * bit 16: PPMI, 1554 * bit 12: PGRAPH, 1555 * bit 8: PFIFO, 1556 * bit 4: PMEDIA, 1557 * bit 0: TVOUT. (> NV04A) */ 1558 NV_REG32(NV32_PWRUPCTRL) = 0x13111111; 1559 1560 /* select colormode CRTC registers base adresses */ 1561 NV_REG8(NV8_MISCW) = 0xcb; 1562 1563 /* enable access to primary head */ 1564 set_crtc_owner(0); 1565 /* unlock head's registers for R/W access */ 1566 CRTCW(LOCK, 0x57); 1567 CRTCW(VSYNCE ,(CRTCR(VSYNCE) & 0x7f)); 1568 if (si->ps.secondary_head) 1569 { 1570 /* enable access to secondary head */ 1571 set_crtc_owner(1); 1572 /* unlock head's registers for R/W access */ 1573 CRTC2W(LOCK, 0x57); 1574 CRTC2W(VSYNCE ,(CRTCR(VSYNCE) & 0x7f)); 1575 } 1576 } 1577 1578 /* basic change of card state from VGA to enhanced mode: 1579 * Should work from VGA BIOS POST init state. */ 1580 static status_t nv_general_bios_to_powergraphics() 1581 { 1582 /* let acc engine make power off/power on cycle to start 'fresh' */ 1583 NV_REG32(NV32_PWRUPCTRL) = 0x13110011; 1584 snooze(1000); 1585 NV_REG32(NV32_PWRUPCTRL) = 0x13111111; 1586 1587 unlock_card(); 1588 1589 /* turn off both displays and the hardcursors (also disables transfers) */ 1590 head1_dpms(false, false, false, true); 1591 head1_cursor_hide(); 1592 if (si->ps.secondary_head) 1593 { 1594 head2_dpms(false, false, false, true); 1595 head2_cursor_hide(); 1596 } 1597 1598 if (si->ps.secondary_head) 1599 { 1600 /* switch overlay engine and TV encoder to CRTC1 */ 1601 /* bit 17: GPU FP port #1 (confirmed NV25, NV28, confirmed not on NV34), 1602 * bit 16: GPU FP port #2 (confirmed NV25, NV28, NV34), 1603 * bit 12: overlay engine (all cards), 1604 * bit 9: TVout chip #2 (confirmed on NV18, NV25, NV28), 1605 * bit 8: TVout chip #1 (all cards), 1606 * bit 4: both I2C busses (all cards) */ 1607 NV_REG32(NV32_2FUNCSEL) &= ~0x00001100; 1608 NV_REG32(NV32_FUNCSEL) |= 0x00001100; 1609 } 1610 si->overlay.crtc = false; 1611 1612 /* enable 'enhanced' mode on primary head: */ 1613 /* enable access to primary head */ 1614 set_crtc_owner(0); 1615 /* note: 'BUFFER' is a non-standard register in behaviour(!) on most 1616 * NV11's like the GeForce2 MX200, while the MX400 and non-NV11 cards 1617 * behave normally. 1618 * Also readback is not nessesarily what was written before! 1619 * 1620 * Double-write action needed on those strange NV11 cards: */ 1621 /* RESET: don't doublebuffer CRTC access: set programmed values immediately... */ 1622 CRTCW(BUFFER, 0xff); 1623 /* ... and use fine pitched CRTC granularity on > NV4 cards (b2 = 0) */ 1624 /* note: this has no effect on possible bandwidth issues. */ 1625 CRTCW(BUFFER, 0xfb); 1626 /* select VGA mode (old VGA register) */ 1627 CRTCW(MODECTL, 0xc3); 1628 /* select graphics mode (old VGA register) */ 1629 SEQW(MEMMODE, 0x0e); 1630 /* select 8 dots character clocks (old VGA register) */ 1631 SEQW(CLKMODE, 0x21); 1632 /* select VGA mode (old VGA register) */ 1633 GRPHW(MODE, 0x00); 1634 /* select graphics mode (old VGA register) */ 1635 GRPHW(MISC, 0x01); 1636 /* select graphics mode (old VGA register) */ 1637 ATBW(MODECTL, 0x01); 1638 /* enable 'enhanced mode', enable Vsync & Hsync, 1639 * set DAC palette to 8-bit width, disable large screen */ 1640 CRTCW(REPAINT1, 0x04); 1641 1642 /* enable 'enhanced' mode on secondary head: */ 1643 if (si->ps.secondary_head) 1644 { 1645 /* enable access to secondary head */ 1646 set_crtc_owner(1); 1647 /* select colormode CRTC2 registers base adresses */ 1648 NV_REG8(NV8_MISCW) = 0xcb; 1649 /* note: 'BUFFER' is a non-standard register in behaviour(!) on most 1650 * NV11's like the GeForce2 MX200, while the MX400 and non-NV11 cards 1651 * behave normally. 1652 * Also readback is not nessesarily what was written before! 1653 * 1654 * Double-write action needed on those strange NV11 cards: */ 1655 /* RESET: don't doublebuffer CRTC2 access: set programmed values immediately... */ 1656 CRTC2W(BUFFER, 0xff); 1657 /* ... and use fine pitched CRTC granularity on > NV4 cards (b2 = 0) */ 1658 /* note: this has no effect on possible bandwidth issues. */ 1659 CRTC2W(BUFFER, 0xfb); 1660 /* select VGA mode (old VGA register) */ 1661 CRTC2W(MODECTL, 0xc3); 1662 /* select graphics mode (old VGA register) */ 1663 SEQW(MEMMODE, 0x0e); 1664 /* select 8 dots character clocks (old VGA register) */ 1665 SEQW(CLKMODE, 0x21); 1666 /* select VGA mode (old VGA register) */ 1667 GRPHW(MODE, 0x00); 1668 /* select graphics mode (old VGA register) */ 1669 GRPHW(MISC, 0x01); 1670 /* select graphics mode (old VGA register) */ 1671 ATB2W(MODECTL, 0x01); 1672 /* enable 'enhanced mode', enable Vsync & Hsync, 1673 * set DAC palette to 8-bit width, disable large screen */ 1674 CRTC2W(REPAINT1, 0x04); 1675 } 1676 1677 /* enable palettes */ 1678 DACW(GENCTRL, 0x00100100); 1679 if (si->ps.secondary_head) DAC2W(GENCTRL, 0x00100100); 1680 1681 /* enable programmable PLLs */ 1682 /* (confirmed PLLSEL to be a write-only register on NV04 and NV11!) */ 1683 if (si->ps.secondary_head) 1684 DACW(PLLSEL, 0x30000f00); 1685 else 1686 DACW(PLLSEL, 0x10000700); 1687 1688 /* turn on DAC and make sure detection testsignal routing is disabled 1689 * (b16 = disable DAC, 1690 * b12 = enable testsignal output */ 1691 //fixme note: b20 ('DACTM_TEST') when set apparantly blocks a DAC's video output 1692 //(confirmed NV43), while it's timing remains operational (black screen). 1693 //It feels like in some screen configurations it can move the output to the other 1694 //output connector as well... 1695 DACW(TSTCTRL, (DACR(TSTCTRL) & 0xfffeefff)); 1696 /* turn on DAC2 if it exists 1697 * (NOTE: testsignal function block resides in DAC1 only (!)) */ 1698 if (si->ps.secondary_head) DAC2W(TSTCTRL, (DAC2R(TSTCTRL) & 0xfffeefff)); 1699 1700 /* NV40 and NV45 need a 'tweak' to make sure the CRTC FIFO's/shiftregisters get 1701 * their data in time (otherwise momentarily ghost images of windows or such 1702 * may appear on heavy acceleration engine use for instance, especially in 32-bit 1703 * colordepth) */ 1704 if ((si->ps.card_type == NV40) || (si->ps.card_type == NV45)) 1705 { 1706 /* clear b15: some framebuffer config item (unknown) */ 1707 NV_REG32(NV32_PFB_CLS_PAGE2) &= 0xffff7fff; 1708 } 1709 1710 /* tweak card GPU-core and RAM speeds if requested (hoping we'll survive)... */ 1711 if (si->settings.gpu_clk) 1712 { 1713 LOG(2,("INIT: tweaking GPU clock!\n")); 1714 1715 set_pll(NV32_COREPLL, si->settings.gpu_clk); 1716 snooze(1000); 1717 } 1718 if (si->settings.ram_clk) 1719 { 1720 LOG(2,("INIT: tweaking cardRAM clock!\n")); 1721 1722 set_pll(NV32_MEMPLL, si->settings.ram_clk); 1723 snooze(1000); 1724 } 1725 1726 /* setup AGP: 1727 * Note: 1728 * This may only be done when no transfers are in progress on the bus, so now 1729 * is probably a good time.. */ 1730 nv_agp_setup(true); 1731 1732 return B_OK; 1733 } 1734 1735 /* Check if mode virtual_size adheres to the cards _maximum_ contraints, and modify 1736 * virtual_size to the nearest valid maximum for the mode on the card if not so. 1737 * Also: check if virtual_width adheres to the cards granularity constraints, and 1738 * create mode slopspace if not so. 1739 * We use acc or crtc granularity constraints based on the 'worst case' scenario. 1740 * 1741 * Mode slopspace is reflected in fbc->bytes_per_row BTW. */ 1742 status_t nv_general_validate_pic_size (display_mode *target, uint32 *bytes_per_row, bool *acc_mode) 1743 { 1744 uint32 video_pitch; 1745 uint32 acc_mask, crtc_mask; 1746 uint32 max_crtc_width, max_acc_width; 1747 uint8 depth = 8; 1748 1749 /* determine pixel multiple based on acceleration engine constraints */ 1750 /* note: 1751 * because of the seemingly 'random' variations in these constraints we take 1752 * a reasonable 'lowest common denominator' instead of always true constraints. */ 1753 switch (si->ps.card_arch) 1754 { 1755 case NV04A: 1756 /* confirmed for: 1757 * TNT1 (NV04), TNT2 (NV05), TNT2-M64 (NV05M64), GeForce2 MX400 (NV11), 1758 * GeForce4 MX440 (NV18), GeForceFX 5200 (NV34) in PIO acc mode; 1759 * confirmed for: 1760 * TNT1 (NV04), TNT2 (NV05), TNT2-M64 (NV05M64), GeForce4 Ti4200 (NV28), 1761 * GeForceFX 5200 (NV34) in DMA acc mode. */ 1762 switch (target->space) 1763 { 1764 case B_CMAP8: acc_mask = 0x0f; depth = 8; break; 1765 case B_RGB15: acc_mask = 0x07; depth = 16; break; 1766 case B_RGB16: acc_mask = 0x07; depth = 16; break; 1767 case B_RGB24: acc_mask = 0x0f; depth = 24; break; 1768 case B_RGB32: acc_mask = 0x03; depth = 32; break; 1769 default: 1770 LOG(8,("INIT: unknown color space: 0x%08x\n", target->space)); 1771 return B_ERROR; 1772 } 1773 break; 1774 default: 1775 /* confirmed for: 1776 * GeForce4 Ti4200 (NV28), GeForceFX 5600 (NV31) in PIO acc mode; 1777 * confirmed for: 1778 * GeForce2 MX400 (NV11), GeForce4 MX440 (NV18), GeForcePCX 5750 (NV36), 1779 * GeForcePCX 6600 GT (NV43) in DMA acc mode. */ 1780 switch (target->space) 1781 { 1782 case B_CMAP8: acc_mask = 0x3f; depth = 8; break; 1783 case B_RGB15: acc_mask = 0x1f; depth = 16; break; 1784 case B_RGB16: acc_mask = 0x1f; depth = 16; break; 1785 case B_RGB24: acc_mask = 0x3f; depth = 24; break; 1786 case B_RGB32: acc_mask = 0x0f; depth = 32; break; 1787 default: 1788 LOG(8,("INIT: unknown color space: 0x%08x\n", target->space)); 1789 return B_ERROR; 1790 } 1791 break; 1792 } 1793 1794 /* determine pixel multiple based on CRTC memory pitch constraints: 1795 * -> all NV cards have same granularity constraints on CRTC1 and CRTC2, 1796 * provided that the CRTC1 and CRTC2 BUFFER register b2 = 0; 1797 * 1798 * (Note: Don't mix this up with CRTC timing contraints! Those are 1799 * multiples of 8 for horizontal, 1 for vertical timing.) */ 1800 switch (si->ps.card_type) 1801 { 1802 default: 1803 // case NV04: 1804 /* confirmed for: 1805 * TNT1 always; 1806 * TNT2, TNT2-M64, GeForce2 MX400, GeForce4 MX440, GeForce4 Ti4200, 1807 * GeForceFX 5200: if the CRTC1 (and CRTC2) BUFFER register b2 = 0 */ 1808 /* NOTE: 1809 * Unfortunately older cards have a hardware fault that prevents use. 1810 * We need doubled granularity on those to prevent the single top line 1811 * from shifting to the left! 1812 * This is confirmed for TNT2, GeForce2 MX200, GeForce2 MX400. 1813 * Confirmed OK are: 1814 * GeForce4 MX440, GeForce4 Ti4200, GeForceFX 5200. */ 1815 switch (target->space) 1816 { 1817 case B_CMAP8: crtc_mask = 0x0f; break; /* 0x07 */ 1818 case B_RGB15: crtc_mask = 0x07; break; /* 0x03 */ 1819 case B_RGB16: crtc_mask = 0x07; break; /* 0x03 */ 1820 case B_RGB24: crtc_mask = 0x0f; break; /* 0x07 */ 1821 case B_RGB32: crtc_mask = 0x03; break; /* 0x01 */ 1822 default: 1823 LOG(8,("INIT: unknown color space: 0x%08x\n", target->space)); 1824 return B_ERROR; 1825 } 1826 break; 1827 // default: 1828 /* confirmed for: 1829 * TNT2, TNT2-M64, GeForce2 MX400, GeForce4 MX440, GeForce4 Ti4200, 1830 * GeForceFX 5200: if the CRTC1 (and CRTC2) BUFFER register b2 = 1 */ 1831 /* switch (target->space) 1832 { 1833 case B_CMAP8: crtc_mask = 0x1f; break; 1834 case B_RGB15: crtc_mask = 0x0f; break; 1835 case B_RGB16: crtc_mask = 0x0f; break; 1836 case B_RGB24: crtc_mask = 0x1f; break; 1837 case B_RGB32: crtc_mask = 0x07; break; 1838 default: 1839 LOG(8,("INIT: unknown color space: 0x%08x\n", target->space)); 1840 return B_ERROR; 1841 } 1842 break; 1843 */ } 1844 1845 /* set virtual_width limit for accelerated modes */ 1846 /* note: 1847 * because of the seemingly 'random' variations in these constraints we take 1848 * a reasonable 'lowest common denominator' instead of always true constraints. */ 1849 switch (si->ps.card_arch) 1850 { 1851 case NV04A: 1852 /* confirmed for: 1853 * TNT1 (NV04), TNT2 (NV05), TNT2-M64 (NV05M64) in both PIO and DMA acc mode. */ 1854 switch(target->space) 1855 { 1856 case B_CMAP8: max_acc_width = 8176; break; 1857 case B_RGB15: max_acc_width = 4088; break; 1858 case B_RGB16: max_acc_width = 4088; break; 1859 case B_RGB24: max_acc_width = 2720; break; 1860 case B_RGB32: max_acc_width = 2044; break; 1861 default: 1862 LOG(8,("INIT: unknown color space: 0x%08x\n", target->space)); 1863 return B_ERROR; 1864 } 1865 break; 1866 default: 1867 /* confirmed for: 1868 * GeForce4 Ti4200 (NV28), GeForceFX 5600 (NV31) in PIO acc mode; 1869 * GeForce2 MX400 (NV11), GeForce4 MX440 (NV18), GeForceFX 5200 (NV34) can do 1870 * 16368/8184/8184/5456/4092, so a bit better in PIO acc mode; 1871 * confirmed for: 1872 * GeForce2 MX400 (NV11), GeForce4 MX440 (NV18), GeForcePCX 5750 (NV36), 1873 * GeForcePCX 6600 GT (NV43) in DMA acc mode; 1874 * GeForce4 Ti4200 (NV28), GeForceFX 5200 (NV34) can do 1875 * 16368/8184/8184/5456/4092, so a bit better in DMA acc mode. */ 1876 switch(target->space) 1877 { 1878 case B_CMAP8: max_acc_width = 16320; break; 1879 case B_RGB15: max_acc_width = 8160; break; 1880 case B_RGB16: max_acc_width = 8160; break; 1881 case B_RGB24: max_acc_width = 5440; break; 1882 case B_RGB32: max_acc_width = 4080; break; 1883 default: 1884 LOG(8,("INIT: unknown color space: 0x%08x\n", target->space)); 1885 return B_ERROR; 1886 } 1887 break; 1888 } 1889 1890 /* set virtual_width limit for unaccelerated modes */ 1891 switch (si->ps.card_type) 1892 { 1893 default: 1894 // case NV04: 1895 /* confirmed for: 1896 * TNT1 always; 1897 * TNT2, TNT2-M64, GeForce2 MX400, GeForce4 MX440, GeForce4 Ti4200, 1898 * GeForceFX 5200: if the CRTC1 (and CRTC2) BUFFER register b2 = 0 */ 1899 /* NOTE: 1900 * Unfortunately older cards have a hardware fault that prevents use. 1901 * We need doubled granularity on those to prevent the single top line 1902 * from shifting to the left! 1903 * This is confirmed for TNT2, GeForce2 MX200, GeForce2 MX400. 1904 * Confirmed OK are: 1905 * GeForce4 MX440, GeForce4 Ti4200, GeForceFX 5200. */ 1906 switch(target->space) 1907 { 1908 case B_CMAP8: max_crtc_width = 16368; break; /* 16376 */ 1909 case B_RGB15: max_crtc_width = 8184; break; /* 8188 */ 1910 case B_RGB16: max_crtc_width = 8184; break; /* 8188 */ 1911 case B_RGB24: max_crtc_width = 5456; break; /* 5456 */ 1912 case B_RGB32: max_crtc_width = 4092; break; /* 4094 */ 1913 default: 1914 LOG(8,("INIT: unknown color space: 0x%08x\n", target->space)); 1915 return B_ERROR; 1916 } 1917 break; 1918 // default: 1919 /* confirmed for: 1920 * TNT2, TNT2-M64, GeForce2 MX400, GeForce4 MX440, GeForce4 Ti4200, 1921 * GeForceFX 5200: if the CRTC1 (and CRTC2) BUFFER register b2 = 1 */ 1922 /* switch(target->space) 1923 { 1924 case B_CMAP8: max_crtc_width = 16352; break; 1925 case B_RGB15: max_crtc_width = 8176; break; 1926 case B_RGB16: max_crtc_width = 8176; break; 1927 case B_RGB24: max_crtc_width = 5440; break; 1928 case B_RGB32: max_crtc_width = 4088; break; 1929 default: 1930 LOG(8,("INIT: unknown color space: 0x%08x\n", target->space)); 1931 return B_ERROR; 1932 } 1933 break; 1934 */ } 1935 1936 /* check for acc capability, and adjust mode to adhere to hardware constraints */ 1937 if (max_acc_width <= max_crtc_width) 1938 { 1939 /* check if we can setup this mode with acceleration */ 1940 *acc_mode = true; 1941 /* virtual_width */ 1942 if (target->virtual_width > max_acc_width) *acc_mode = false; 1943 /* virtual_height */ 1944 /* (NV cards can even do more than this(?)... 1945 * but 4096 is confirmed on all cards at max. accelerated width.) */ 1946 if (target->virtual_height > 4096) *acc_mode = false; 1947 1948 /* now check virtual_size based on CRTC constraints */ 1949 if (target->virtual_width > max_crtc_width) target->virtual_width = max_crtc_width; 1950 /* virtual_height: The only constraint here is the cards memory size which is 1951 * checked later on in ProposeMode: virtual_height is adjusted then if needed. 1952 * 'Limiting here' to the variable size that's at least available (uint16). */ 1953 if (target->virtual_height > 65535) target->virtual_height = 65535; 1954 1955 /* OK, now we know that virtual_width is valid, and it's needing no slopspace if 1956 * it was confined above, so we can finally calculate safely if we need slopspace 1957 * for this mode... */ 1958 if (*acc_mode) 1959 { 1960 /* the mode needs to adhere to the largest granularity imposed... */ 1961 if (acc_mask < crtc_mask) 1962 video_pitch = ((target->virtual_width + crtc_mask) & ~crtc_mask); 1963 else 1964 video_pitch = ((target->virtual_width + acc_mask) & ~acc_mask); 1965 } 1966 else /* unaccelerated mode */ 1967 video_pitch = ((target->virtual_width + crtc_mask) & ~crtc_mask); 1968 } 1969 else /* max_acc_width > max_crtc_width */ 1970 { 1971 /* check if we can setup this mode with acceleration */ 1972 *acc_mode = true; 1973 /* (we already know virtual_width will be no problem) */ 1974 /* virtual_height */ 1975 /* (NV cards can even do more than this(?)... 1976 * but 4096 is confirmed on all cards at max. accelerated width.) */ 1977 if (target->virtual_height > 4096) *acc_mode = false; 1978 1979 /* now check virtual_size based on CRTC constraints */ 1980 if (*acc_mode) 1981 { 1982 /* note that max_crtc_width already adheres to crtc_mask */ 1983 if (target->virtual_width > (max_crtc_width & ~acc_mask)) 1984 target->virtual_width = (max_crtc_width & ~acc_mask); 1985 } 1986 else /* unaccelerated mode */ 1987 { 1988 if (target->virtual_width > max_crtc_width) 1989 target->virtual_width = max_crtc_width; 1990 } 1991 /* virtual_height: The only constraint here is the cards memory size which is 1992 * checked later on in ProposeMode: virtual_height is adjusted then if needed. 1993 * 'Limiting here' to the variable size that's at least available (uint16). */ 1994 if (target->virtual_height > 65535) target->virtual_height = 65535; 1995 1996 /* OK, now we know that virtual_width is valid, and it's needing no slopspace if 1997 * it was confined above, so we can finally calculate safely if we need slopspace 1998 * for this mode... */ 1999 if (*acc_mode) 2000 { 2001 /* the mode needs to adhere to the largest granularity imposed... */ 2002 if (acc_mask < crtc_mask) 2003 video_pitch = ((target->virtual_width + crtc_mask) & ~crtc_mask); 2004 else 2005 video_pitch = ((target->virtual_width + acc_mask) & ~acc_mask); 2006 } 2007 else /* unaccelerated mode */ 2008 video_pitch = ((target->virtual_width + crtc_mask) & ~crtc_mask); 2009 } 2010 2011 LOG(2,("INIT: memory pitch will be set to %d pixels for colorspace 0x%08x\n", 2012 video_pitch, target->space)); 2013 if (target->virtual_width != video_pitch) 2014 LOG(2,("INIT: effective mode slopspace is %d pixels\n", 2015 (video_pitch - target->virtual_width))); 2016 2017 /* now calculate bytes_per_row for this mode */ 2018 *bytes_per_row = video_pitch * (depth >> 3); 2019 2020 return B_OK; 2021 } 2022