1 /* Authors: 2 Mark Watson 12/1999, 3 Apsed, 4 Rudolf Cornelissen 10/2002-1/2016 5 tst.. 6 */ 7 8 #define MODULE_BIT 0x00008000 9 10 #include "nv_std.h" 11 12 static status_t test_ram(void); 13 static status_t nvxx_general_powerup (void); 14 static void unlock_card(void); 15 static status_t nv_general_bios_to_powergraphics(void); 16 17 static void nv_dump_configuration_space (void) 18 { 19 #define DUMP_CFG(reg, type) if (si->ps.card_type >= type) do { \ 20 uint32 value = CFGR(reg); \ 21 MSG(("configuration_space 0x%02x %20s 0x%08x\n", \ 22 NVCFG_##reg, #reg, value)); \ 23 } while (0) 24 DUMP_CFG (DEVID, 0); 25 DUMP_CFG (DEVCTRL, 0); 26 DUMP_CFG (CLASS, 0); 27 DUMP_CFG (HEADER, 0); 28 DUMP_CFG (BASE1REGS,0); 29 DUMP_CFG (BASE2FB, 0); 30 DUMP_CFG (BASE3, 0); 31 DUMP_CFG (BASE4, 0); 32 DUMP_CFG (BASE5, 0); 33 DUMP_CFG (BASE6, 0); 34 DUMP_CFG (BASE7, 0); 35 DUMP_CFG (SUBSYSID1,0); 36 DUMP_CFG (ROMBASE, 0); 37 DUMP_CFG (CAPPTR, 0); 38 DUMP_CFG (CFG_1, 0); 39 DUMP_CFG (INTERRUPT,0); 40 DUMP_CFG (SUBSYSID2,0); 41 DUMP_CFG (AGPREF, 0); 42 DUMP_CFG (AGPSTAT, 0); 43 DUMP_CFG (AGPCMD, 0); 44 DUMP_CFG (ROMSHADOW,0); 45 DUMP_CFG (VGA, 0); 46 DUMP_CFG (SCHRATCH, 0); 47 DUMP_CFG (CFG_10, 0); 48 DUMP_CFG (CFG_11, 0); 49 DUMP_CFG (CFG_12, 0); 50 DUMP_CFG (CFG_13, 0); 51 DUMP_CFG (CFG_14, 0); 52 DUMP_CFG (CFG_15, 0); 53 DUMP_CFG (CFG_16, 0); 54 DUMP_CFG (PCIEREF, 0); 55 DUMP_CFG (PCIEDCAP, 0); 56 DUMP_CFG (PCIEDCTST,0); 57 DUMP_CFG (PCIELCAP, 0); 58 DUMP_CFG (PCIELCTST,0); 59 DUMP_CFG (CFG_22, 0); 60 DUMP_CFG (CFG_23, 0); 61 DUMP_CFG (CFG_24, 0); 62 DUMP_CFG (CFG_25, 0); 63 DUMP_CFG (CFG_26, 0); 64 DUMP_CFG (CFG_27, 0); 65 DUMP_CFG (CFG_28, 0); 66 DUMP_CFG (CFG_29, 0); 67 DUMP_CFG (CFG_30, 0); 68 DUMP_CFG (CFG_31, 0); 69 DUMP_CFG (CFG_32, 0); 70 DUMP_CFG (CFG_33, 0); 71 DUMP_CFG (CFG_34, 0); 72 DUMP_CFG (CFG_35, 0); 73 DUMP_CFG (CFG_36, 0); 74 DUMP_CFG (CFG_37, 0); 75 DUMP_CFG (CFG_38, 0); 76 DUMP_CFG (CFG_39, 0); 77 DUMP_CFG (CFG_40, 0); 78 DUMP_CFG (CFG_41, 0); 79 DUMP_CFG (CFG_42, 0); 80 DUMP_CFG (CFG_43, 0); 81 DUMP_CFG (CFG_44, 0); 82 DUMP_CFG (CFG_45, 0); 83 DUMP_CFG (CFG_46, 0); 84 DUMP_CFG (CFG_47, 0); 85 DUMP_CFG (CFG_48, 0); 86 DUMP_CFG (CFG_49, 0); 87 DUMP_CFG (CFG_50, 0); 88 #undef DUMP_CFG 89 } 90 91 status_t nv_general_powerup() 92 { 93 status_t status; 94 95 LOG(1,("POWERUP: Haiku nVidia Accelerant 1.16 running.\n")); 96 97 /* log VBLANK INT usability status */ 98 if (si->ps.int_assigned) 99 LOG(4,("POWERUP: Usable INT assigned to HW; Vblank semaphore enabled\n")); 100 else 101 LOG(4,("POWERUP: No (usable) INT assigned to HW; Vblank semaphore disabled\n")); 102 103 /* preset no laptop */ 104 si->ps.laptop = false; 105 106 /* WARNING: 107 * _adi.name_ and _adi.chipset_ can contain 31 readable characters max.!!! */ 108 109 /* detect card type and power it up */ 110 switch(CFGR(DEVID)) 111 { 112 /* Vendor Nvidia */ 113 case 0x002010de: /* Nvidia TNT1 */ 114 si->ps.card_type = NV04; 115 si->ps.card_arch = NV04A; 116 sprintf(si->adi.name, "Nvidia TNT1"); 117 sprintf(si->adi.chipset, "NV04"); 118 status = nvxx_general_powerup(); 119 break; 120 case 0x002810de: /* Nvidia TNT2 (pro) */ 121 case 0x002910de: /* Nvidia TNT2 Ultra */ 122 case 0x002a10de: /* Nvidia TNT2 */ 123 case 0x002b10de: /* Nvidia TNT2 */ 124 si->ps.card_type = NV05; 125 si->ps.card_arch = NV04A; 126 sprintf(si->adi.name, "Nvidia TNT2"); 127 sprintf(si->adi.chipset, "NV05"); 128 status = nvxx_general_powerup(); 129 break; 130 case 0x002c10de: /* Nvidia Vanta (Lt) */ 131 si->ps.card_type = NV05; 132 si->ps.card_arch = NV04A; 133 sprintf(si->adi.name, "Nvidia Vanta (Lt)"); 134 sprintf(si->adi.chipset, "NV05"); 135 status = nvxx_general_powerup(); 136 break; 137 case 0x002d10de: /* Nvidia TNT2-M64 (Pro) */ 138 si->ps.card_type = NV05M64; 139 si->ps.card_arch = NV04A; 140 sprintf(si->adi.name, "Nvidia TNT2-M64 (Pro)"); 141 sprintf(si->adi.chipset, "NV05 model 64"); 142 status = nvxx_general_powerup(); 143 break; 144 case 0x002e10de: /* Nvidia NV06 Vanta */ 145 case 0x002f10de: /* Nvidia NV06 Vanta */ 146 si->ps.card_type = NV06; 147 si->ps.card_arch = NV04A; 148 sprintf(si->adi.name, "Nvidia Vanta"); 149 sprintf(si->adi.chipset, "NV06"); 150 status = nvxx_general_powerup(); 151 break; 152 case 0x004010de: /* Nvidia Geforce FX 6800 Ultra */ 153 case 0x004110de: /* Nvidia Geforce FX 6800 */ 154 case 0x004210de: /* Nvidia Geforce FX 6800LE */ 155 si->ps.card_type = NV40; 156 si->ps.card_arch = NV40A; 157 sprintf(si->adi.name, "Nvidia Geforce FX 6800"); 158 sprintf(si->adi.chipset, "NV40"); 159 status = nvxx_general_powerup(); 160 break; 161 case 0x004310de: /* Nvidia Geforce 6800 XE */ 162 si->ps.card_type = NV40; 163 si->ps.card_arch = NV40A; 164 sprintf(si->adi.name, "Nvidia Geforce 6800 XE"); 165 sprintf(si->adi.chipset, "NV40"); 166 status = nvxx_general_powerup(); 167 break; 168 case 0x004510de: /* Nvidia Geforce FX 6800 GT */ 169 case 0x004610de: /* Nvidia Geforce FX 6800 GT */ 170 case 0x004710de: /* Nvidia Geforce FX 6800 GS */ 171 case 0x004810de: /* Nvidia Geforce FX 6800 XT */ 172 si->ps.card_type = NV40; 173 si->ps.card_arch = NV40A; 174 sprintf(si->adi.name, "Nvidia Geforce FX 6800"); 175 sprintf(si->adi.chipset, "NV40"); 176 status = nvxx_general_powerup(); 177 break; 178 case 0x004910de: /* Nvidia unknown FX */ 179 si->ps.card_type = NV40; 180 si->ps.card_arch = NV40A; 181 sprintf(si->adi.name, "Nvidia unknown FX"); 182 sprintf(si->adi.chipset, "NV40"); 183 status = nvxx_general_powerup(); 184 break; 185 case 0x004d10de: /* Nvidia Quadro FX 4400 */ 186 case 0x004e10de: /* Nvidia Quadro FX 4000 */ 187 si->ps.card_type = NV40; 188 si->ps.card_arch = NV40A; 189 sprintf(si->adi.name, "Nvidia Quadro FX 4000/4400"); 190 sprintf(si->adi.chipset, "NV40"); 191 status = nvxx_general_powerup(); 192 break; 193 case 0x009110de: /* Nvidia Geforce 7800 GTX PCIe */ 194 case 0x009210de: /* Nvidia Geforce 7800 GT PCIe */ 195 si->ps.card_type = G70; 196 si->ps.card_arch = NV40A; 197 sprintf(si->adi.name, "Nvidia Geforce 7800 GT PCIe"); 198 sprintf(si->adi.chipset, "G70"); 199 status = nvxx_general_powerup(); 200 break; 201 case 0x009810de: /* Nvidia Geforce 7800 Go PCIe */ 202 case 0x009910de: /* Nvidia Geforce 7800 GTX Go PCIe */ 203 si->ps.card_type = G70; 204 si->ps.card_arch = NV40A; 205 si->ps.laptop = true; 206 sprintf(si->adi.name, "Nvidia Geforce 7800 GTX Go PCIe"); 207 sprintf(si->adi.chipset, "G70"); 208 status = nvxx_general_powerup(); 209 break; 210 case 0x009d10de: /* Nvidia Quadro FX 4500 */ 211 si->ps.card_type = G70; 212 si->ps.card_arch = NV40A; 213 sprintf(si->adi.name, "Nvidia Quadro FX 4500"); 214 sprintf(si->adi.chipset, "G70"); 215 status = nvxx_general_powerup(); 216 break; 217 case 0x00a010de: /* Nvidia Aladdin TNT2 */ 218 si->ps.card_type = NV05; 219 si->ps.card_arch = NV04A; 220 sprintf(si->adi.name, "Nvidia Aladdin TNT2"); 221 sprintf(si->adi.chipset, "NV05"); 222 status = nvxx_general_powerup(); 223 break; 224 case 0x00c010de: /* Nvidia Geforce 6800 GS */ 225 si->ps.card_type = NV41; 226 si->ps.card_arch = NV40A; 227 sprintf(si->adi.name, "Nvidia Geforce 6800 GS"); 228 sprintf(si->adi.chipset, "NV41"); 229 status = nvxx_general_powerup(); 230 break; 231 case 0x00c110de: /* Nvidia Geforce FX 6800 */ 232 case 0x00c210de: /* Nvidia Geforce FX 6800LE */ 233 case 0x00c310de: /* Nvidia Geforce FX 6800 XT */ 234 si->ps.card_type = NV41; 235 si->ps.card_arch = NV40A; 236 sprintf(si->adi.name, "Nvidia Geforce FX 6800"); 237 sprintf(si->adi.chipset, "NV41"); 238 status = nvxx_general_powerup(); 239 break; 240 case 0x00c810de: /* Nvidia Geforce FX 6800 Go */ 241 case 0x00c910de: /* Nvidia Geforce FX 6800 Ultra Go */ 242 si->ps.card_type = NV41; 243 si->ps.card_arch = NV40A; 244 si->ps.laptop = true; 245 sprintf(si->adi.name, "Nvidia Geforce FX 6800 Go"); 246 sprintf(si->adi.chipset, "NV41"); 247 status = nvxx_general_powerup(); 248 break; 249 case 0x00cc10de: /* Nvidia Quadro FX 1400 Go */ 250 si->ps.card_type = NV41; 251 si->ps.card_arch = NV40A; 252 si->ps.laptop = true; 253 sprintf(si->adi.name, "Nvidia Quadro FX 1400 Go"); 254 sprintf(si->adi.chipset, "NV41"); 255 status = nvxx_general_powerup(); 256 break; 257 case 0x00cd10de: /* Nvidia Quadro FX 3450/4000 SDI */ 258 si->ps.card_type = NV41; 259 si->ps.card_arch = NV40A; 260 sprintf(si->adi.name, "Nvidia Quadro FX 3450/4000 SDI"); 261 sprintf(si->adi.chipset, "NV41"); 262 status = nvxx_general_powerup(); 263 break; 264 case 0x00ce10de: /* Nvidia Quadro FX 1400 */ 265 si->ps.card_type = NV41; 266 si->ps.card_arch = NV40A; 267 sprintf(si->adi.name, "Nvidia Quadro FX 1400"); 268 sprintf(si->adi.chipset, "NV41"); 269 status = nvxx_general_powerup(); 270 break; 271 case 0x00f010de: /* Nvidia Geforce FX 6800 (Ultra) AGP(?) */ 272 si->ps.card_type = NV40; 273 si->ps.card_arch = NV40A; 274 sprintf(si->adi.name, "Nvidia Geforce FX 6800 AGP(?)"); 275 sprintf(si->adi.chipset, "NV40(?)"); 276 status = nvxx_general_powerup(); 277 break; 278 case 0x00f110de: /* Nvidia Geforce FX 6600 GT AGP */ 279 case 0x00f210de: /* Nvidia Geforce FX 6600 AGP */ 280 si->ps.card_type = NV43; 281 si->ps.card_arch = NV40A; 282 sprintf(si->adi.name, "Nvidia Geforce FX 6600 (GT) AGP"); 283 sprintf(si->adi.chipset, "NV43"); 284 status = nvxx_general_powerup(); 285 break; 286 case 0x00f310de: /* Nvidia Geforce 6200 */ 287 si->ps.card_type = NV44; 288 si->ps.card_arch = NV40A; 289 sprintf(si->adi.name, "Nvidia Geforce 6200"); 290 sprintf(si->adi.chipset, "NV44"); 291 status = nvxx_general_powerup(); 292 break; 293 case 0x00f410de: /* Nvidia Geforce 6600 LE */ 294 si->ps.card_type = NV43; 295 si->ps.card_arch = NV40A; 296 sprintf(si->adi.name, "Nvidia Geforce 6600 LE"); 297 sprintf(si->adi.chipset, "NV43"); 298 status = nvxx_general_powerup(); 299 break; 300 case 0x00f510de: /* Nvidia Geforce FX 7800 GS AGP */ 301 si->ps.card_type = G70; 302 si->ps.card_arch = NV40A; 303 sprintf(si->adi.name, "Nvidia Geforce 7800 GS AGP"); 304 sprintf(si->adi.chipset, "G70"); 305 status = nvxx_general_powerup(); 306 break; 307 case 0x00f610de: /* Nvidia Geforce 6800 GS */ 308 si->ps.card_type = NV43; 309 si->ps.card_arch = NV40A; 310 sprintf(si->adi.name, "Nvidia Geforce 6800 GS"); 311 sprintf(si->adi.chipset, "NV43"); 312 status = nvxx_general_powerup(); 313 break; 314 case 0x00f810de: /* Nvidia Quadro FX 3400/4400 PCIe */ 315 si->ps.card_type = NV45; 316 si->ps.card_arch = NV40A; 317 sprintf(si->adi.name, "Nvidia Quadro FX 3400 PCIe"); 318 sprintf(si->adi.chipset, "NV45"); 319 status = nvxx_general_powerup(); 320 break; 321 case 0x00f910de: /* Nvidia Geforce PCX 6800 PCIe */ 322 si->ps.card_type = NV45; 323 si->ps.card_arch = NV40A; 324 sprintf(si->adi.name, "Nvidia Geforce PCX 6800 PCIe"); 325 sprintf(si->adi.chipset, "NV45"); 326 status = nvxx_general_powerup(); 327 break; 328 case 0x00fa10de: /* Nvidia Geforce PCX 5750 PCIe */ 329 si->ps.card_type = NV36; 330 si->ps.card_arch = NV30A; 331 sprintf(si->adi.name, "Nvidia Geforce PCX 5750 PCIe"); 332 sprintf(si->adi.chipset, "NV36"); 333 status = nvxx_general_powerup(); 334 break; 335 case 0x00fb10de: /* Nvidia Geforce PCX 5900 PCIe */ 336 si->ps.card_type = NV35; 337 si->ps.card_arch = NV30A; 338 sprintf(si->adi.name, "Nvidia Geforce PCX 5900 PCIe"); 339 sprintf(si->adi.chipset, "NV35(?)"); 340 status = nvxx_general_powerup(); 341 break; 342 case 0x00fc10de: /* Nvidia Geforce PCX 5300 PCIe */ 343 si->ps.card_type = NV34; 344 si->ps.card_arch = NV30A; 345 sprintf(si->adi.name, "Nvidia Geforce PCX 5300 PCIe"); 346 sprintf(si->adi.chipset, "NV34"); 347 status = nvxx_general_powerup(); 348 break; 349 case 0x00fd10de: /* Nvidia Quadro PCX PCIe */ 350 si->ps.card_type = NV45; 351 si->ps.card_arch = NV40A; 352 sprintf(si->adi.name, "Nvidia Quadro PCX PCIe"); 353 sprintf(si->adi.chipset, "NV45"); 354 status = nvxx_general_powerup(); 355 break; 356 case 0x00fe10de: /* Nvidia Quadro FX 1300 PCIe(?) */ 357 si->ps.card_type = NV36; 358 si->ps.card_arch = NV30A; 359 sprintf(si->adi.name, "Nvidia Quadro FX 1300 PCIe(?)"); 360 sprintf(si->adi.chipset, "NV36(?)"); 361 status = nvxx_general_powerup(); 362 break; 363 case 0x00ff10de: /* Nvidia Geforce PCX 4300 PCIe */ 364 si->ps.card_type = NV18; 365 si->ps.card_arch = NV10A; 366 sprintf(si->adi.name, "Nvidia Geforce PCX 4300 PCIe"); 367 sprintf(si->adi.chipset, "NV18"); 368 status = nvxx_general_powerup(); 369 break; 370 case 0x010010de: /* Nvidia Geforce256 SDR */ 371 case 0x010110de: /* Nvidia Geforce256 DDR */ 372 case 0x010210de: /* Nvidia Geforce256 Ultra */ 373 si->ps.card_type = NV10; 374 si->ps.card_arch = NV10A; 375 sprintf(si->adi.name, "Nvidia Geforce256"); 376 sprintf(si->adi.chipset, "NV10"); 377 status = nvxx_general_powerup(); 378 break; 379 case 0x010310de: /* Nvidia Quadro */ 380 si->ps.card_type = NV10; 381 si->ps.card_arch = NV10A; 382 sprintf(si->adi.name, "Nvidia Quadro"); 383 sprintf(si->adi.chipset, "NV10"); 384 status = nvxx_general_powerup(); 385 break; 386 case 0x011010de: /* Nvidia Geforce2 MX/MX400 */ 387 case 0x011110de: /* Nvidia Geforce2 MX100/MX200 DDR */ 388 si->ps.card_type = NV11; 389 si->ps.card_arch = NV10A; 390 sprintf(si->adi.name, "Nvidia Geforce2 MX"); 391 sprintf(si->adi.chipset, "NV11"); 392 status = nvxx_general_powerup(); 393 break; 394 case 0x011210de: /* Nvidia Geforce2 Go */ 395 si->ps.card_type = NV11; 396 si->ps.card_arch = NV10A; 397 si->ps.laptop = true; 398 sprintf(si->adi.name, "Nvidia Geforce2 Go"); 399 sprintf(si->adi.chipset, "NV11"); 400 status = nvxx_general_powerup(); 401 break; 402 case 0x011310de: /* Nvidia Quadro2 MXR/EX/Go */ 403 si->ps.card_type = NV11; 404 si->ps.card_arch = NV10A; 405 sprintf(si->adi.name, "Nvidia Quadro2 MXR/EX/Go"); 406 sprintf(si->adi.chipset, "NV11"); 407 status = nvxx_general_powerup(); 408 break; 409 case 0x014010de: /* Nvidia Geforce FX 6600 GT */ 410 case 0x014110de: /* Nvidia Geforce FX 6600 */ 411 case 0x014210de: /* Nvidia Geforce FX 6600LE */ 412 si->ps.card_type = NV43; 413 si->ps.card_arch = NV40A; 414 sprintf(si->adi.name, "Nvidia Geforce FX 6600"); 415 sprintf(si->adi.chipset, "NV43"); 416 status = nvxx_general_powerup(); 417 break; 418 case 0x014310de: /* Nvidia Geforce 6600 VE */ 419 si->ps.card_type = NV43; 420 si->ps.card_arch = NV40A; 421 sprintf(si->adi.name, "Nvidia Geforce 6600 VE"); 422 sprintf(si->adi.chipset, "NV43"); 423 status = nvxx_general_powerup(); 424 break; 425 case 0x014410de: /* Nvidia Geforce FX 6600 Go */ 426 si->ps.card_type = NV43; 427 si->ps.card_arch = NV40A; 428 si->ps.laptop = true; 429 sprintf(si->adi.name, "Nvidia Geforce FX 6600 Go"); 430 sprintf(si->adi.chipset, "NV43"); 431 status = nvxx_general_powerup(); 432 break; 433 case 0x014510de: /* Nvidia Geforce FX 6610 XL */ 434 si->ps.card_type = NV43; 435 si->ps.card_arch = NV40A; 436 sprintf(si->adi.name, "Nvidia Geforce FX 6610 XL"); 437 sprintf(si->adi.chipset, "NV43"); 438 status = nvxx_general_powerup(); 439 break; 440 case 0x014710de: /* Nvidia Geforce FX 6700 XL */ 441 si->ps.card_type = NV43; 442 si->ps.card_arch = NV40A; 443 sprintf(si->adi.name, "Nvidia Geforce FX 6700 XL"); 444 sprintf(si->adi.chipset, "NV43"); 445 status = nvxx_general_powerup(); 446 break; 447 case 0x014610de: /* Nvidia Geforce FX 6600 TE Go / 6200 TE Go */ 448 case 0x014810de: /* Nvidia Geforce FX 6600 Go */ 449 case 0x014910de: /* Nvidia Geforce FX 6600 GT Go */ 450 si->ps.card_type = NV43; 451 si->ps.card_arch = NV40A; 452 si->ps.laptop = true; 453 sprintf(si->adi.name, "Nvidia Geforce FX 6600Go/6200Go"); 454 sprintf(si->adi.chipset, "NV43"); 455 status = nvxx_general_powerup(); 456 break; 457 case 0x014b10de: /* Nvidia unknown FX */ 458 case 0x014c10de: /* Nvidia Quadro FX 540 MXM */ 459 case 0x014d10de: /* Nvidia unknown FX */ 460 si->ps.card_type = NV43; 461 si->ps.card_arch = NV40A; 462 sprintf(si->adi.name, "Nvidia Quadro FX"); 463 sprintf(si->adi.chipset, "NV43"); 464 status = nvxx_general_powerup(); 465 break; 466 case 0x014e10de: /* Nvidia Quadro FX 540 */ 467 si->ps.card_type = NV43; 468 si->ps.card_arch = NV40A; 469 sprintf(si->adi.name, "Nvidia Quadro FX 540"); 470 sprintf(si->adi.chipset, "NV43"); 471 status = nvxx_general_powerup(); 472 break; 473 case 0x014f10de: /* Nvidia Geforce 6200 PCIe (128Mb) */ 474 si->ps.card_type = NV44; 475 si->ps.card_arch = NV40A; 476 sprintf(si->adi.name, "Nvidia Geforce 6200 PCIe 128Mb"); 477 sprintf(si->adi.chipset, "NV44"); 478 status = nvxx_general_powerup(); 479 break; 480 case 0x015010de: /* Nvidia Geforce2 GTS/Pro */ 481 case 0x015110de: /* Nvidia Geforce2 Ti DDR */ 482 case 0x015210de: /* Nvidia Geforce2 Ultra */ 483 si->ps.card_type = NV15; 484 si->ps.card_arch = NV10A; 485 sprintf(si->adi.name, "Nvidia Geforce2"); 486 sprintf(si->adi.chipset, "NV15"); 487 status = nvxx_general_powerup(); 488 break; 489 case 0x015310de: /* Nvidia Quadro2 Pro */ 490 si->ps.card_type = NV15; 491 si->ps.card_arch = NV10A; 492 sprintf(si->adi.name, "Nvidia Quadro2 Pro"); 493 sprintf(si->adi.chipset, "NV15"); 494 status = nvxx_general_powerup(); 495 break; 496 case 0x016010de: /* Nvidia Geforce 6500 Go */ 497 si->ps.card_type = NV44; 498 si->ps.card_arch = NV40A; 499 si->ps.laptop = true; 500 sprintf(si->adi.name, "Nvidia Geforce 6500 Go"); 501 sprintf(si->adi.chipset, "NV44"); 502 status = nvxx_general_powerup(); 503 break; 504 case 0x016110de: /* Nvidia Geforce 6200 TurboCache */ 505 si->ps.card_type = NV44; 506 si->ps.card_arch = NV40A; 507 sprintf(si->adi.name, "Nvidia Geforce 6200 TC"); 508 sprintf(si->adi.chipset, "NV44"); 509 status = nvxx_general_powerup(); 510 break; 511 case 0x016210de: /* Nvidia Geforce 6200SE TurboCache */ 512 si->ps.card_type = NV44; 513 si->ps.card_arch = NV40A; 514 sprintf(si->adi.name, "Nvidia Geforce 6200SE TC"); 515 sprintf(si->adi.chipset, "NV44"); 516 status = nvxx_general_powerup(); 517 break; 518 case 0x016310de: /* Nvidia Geforce 6200LE */ 519 si->ps.card_type = NV44; 520 si->ps.card_arch = NV40A; 521 sprintf(si->adi.name, "Nvidia Geforce 6200LE"); 522 sprintf(si->adi.chipset, "NV44"); 523 status = nvxx_general_powerup(); 524 break; 525 case 0x016410de: /* Nvidia Geforce FX 6200 Go */ 526 si->ps.card_type = NV44; 527 si->ps.card_arch = NV40A; 528 si->ps.laptop = true; 529 sprintf(si->adi.name, "Nvidia Geforce FX 6200 Go"); 530 sprintf(si->adi.chipset, "NV44"); 531 status = nvxx_general_powerup(); 532 break; 533 case 0x016510de: /* Nvidia Quadro FX NVS 285 */ 534 si->ps.card_type = NV44; 535 si->ps.card_arch = NV40A; 536 sprintf(si->adi.name, "Nvidia Quadro FX NVS 285"); 537 sprintf(si->adi.chipset, "NV44"); 538 status = nvxx_general_powerup(); 539 break; 540 case 0x016610de: /* Nvidia Geforce 6400 Go */ 541 si->ps.card_type = NV44; 542 si->ps.card_arch = NV40A; 543 si->ps.laptop = true; 544 sprintf(si->adi.name, "Nvidia Geforce 6400 Go"); 545 sprintf(si->adi.chipset, "NV44"); 546 status = nvxx_general_powerup(); 547 break; 548 case 0x016710de: /* Nvidia Geforce 6200 Go */ 549 si->ps.card_type = NV44; 550 si->ps.card_arch = NV40A; 551 si->ps.laptop = true; 552 sprintf(si->adi.name, "Nvidia Geforce 6200 Go"); 553 sprintf(si->adi.chipset, "NV44"); 554 status = nvxx_general_powerup(); 555 break; 556 case 0x016810de: /* Nvidia Geforce 6400 Go */ 557 si->ps.card_type = NV44; 558 si->ps.card_arch = NV40A; 559 si->ps.laptop = true; 560 sprintf(si->adi.name, "Nvidia Geforce 6400 Go"); 561 sprintf(si->adi.chipset, "NV44"); 562 status = nvxx_general_powerup(); 563 break; 564 case 0x016910de: /* Nvidia Geforce 6250 Go */ 565 si->ps.card_type = NV44; 566 si->ps.card_arch = NV40A; 567 si->ps.laptop = true; 568 sprintf(si->adi.name, "Nvidia Geforce 6250 Go"); 569 sprintf(si->adi.chipset, "NV44"); 570 status = nvxx_general_powerup(); 571 break; 572 case 0x016a10de: /* Nvidia 7100 GS */ 573 si->ps.card_type = NV44; 574 si->ps.card_arch = NV40A; 575 sprintf(si->adi.name, "Nvidia Geforce 7100 GS"); 576 sprintf(si->adi.chipset, "NV44"); 577 status = nvxx_general_powerup(); 578 break; 579 case 0x016b10de: /* Nvidia unknown FX Go */ 580 case 0x016c10de: /* Nvidia unknown FX Go */ 581 case 0x016d10de: /* Nvidia unknown FX Go */ 582 si->ps.card_type = NV44; 583 si->ps.card_arch = NV40A; 584 si->ps.laptop = true; 585 sprintf(si->adi.name, "Nvidia unknown FX Go"); 586 sprintf(si->adi.chipset, "NV44"); 587 status = nvxx_general_powerup(); 588 break; 589 case 0x016e10de: /* Nvidia unknown FX */ 590 si->ps.card_type = NV44; 591 si->ps.card_arch = NV40A; 592 sprintf(si->adi.name, "Nvidia unknown FX"); 593 sprintf(si->adi.chipset, "NV44"); 594 status = nvxx_general_powerup(); 595 break; 596 case 0x017010de: /* Nvidia Geforce4 MX 460 */ 597 case 0x017110de: /* Nvidia Geforce4 MX 440 */ 598 case 0x017210de: /* Nvidia Geforce4 MX 420 */ 599 case 0x017310de: /* Nvidia Geforce4 MX 440SE */ 600 si->ps.card_type = NV17; 601 si->ps.card_arch = NV10A; 602 sprintf(si->adi.name, "Nvidia Geforce4 MX"); 603 sprintf(si->adi.chipset, "NV17"); 604 status = nvxx_general_powerup(); 605 break; 606 case 0x017410de: /* Nvidia Geforce4 440 Go */ 607 case 0x017510de: /* Nvidia Geforce4 420 Go */ 608 case 0x017610de: /* Nvidia Geforce4 420 Go 32M */ 609 case 0x017710de: /* Nvidia Geforce4 460 Go */ 610 case 0x017910de: /* Nvidia Geforce4 440 Go 64M (on PPC Geforce4 MX) */ 611 si->ps.card_type = NV17; 612 si->ps.card_arch = NV10A; 613 si->ps.laptop = true; 614 sprintf(si->adi.name, "Nvidia Geforce4 Go"); 615 sprintf(si->adi.chipset, "NV17"); 616 status = nvxx_general_powerup(); 617 break; 618 case 0x017810de: /* Nvidia Quadro4 500 XGL/550 XGL */ 619 case 0x017a10de: /* Nvidia Quadro4 200 NVS/400 NVS */ 620 si->ps.card_type = NV17; 621 si->ps.card_arch = NV10A; 622 sprintf(si->adi.name, "Nvidia Quadro4"); 623 sprintf(si->adi.chipset, "NV17"); 624 status = nvxx_general_powerup(); 625 break; 626 case 0x017c10de: /* Nvidia Quadro4 500 GoGL */ 627 si->ps.card_type = NV17; 628 si->ps.card_arch = NV10A; 629 si->ps.laptop = true; 630 sprintf(si->adi.name, "Nvidia Quadro4 500 GoGL"); 631 sprintf(si->adi.chipset, "NV17"); 632 status = nvxx_general_powerup(); 633 break; 634 case 0x017d10de: /* Nvidia Geforce4 410 Go 16M*/ 635 si->ps.card_type = NV17; 636 si->ps.card_arch = NV10A; 637 si->ps.laptop = true; 638 sprintf(si->adi.name, "Nvidia Geforce4 410 Go"); 639 sprintf(si->adi.chipset, "NV17"); 640 status = nvxx_general_powerup(); 641 break; 642 case 0x018110de: /* Nvidia Geforce4 MX 440 AGP8X */ 643 case 0x018210de: /* Nvidia Geforce4 MX 440SE AGP8X */ 644 case 0x018310de: /* Nvidia Geforce4 MX 420 AGP8X */ 645 case 0x018510de: /* Nvidia Geforce4 MX 4000 AGP8X */ 646 si->ps.card_type = NV18; 647 si->ps.card_arch = NV10A; 648 sprintf(si->adi.name, "Nvidia Geforce4 MX AGP8X"); 649 sprintf(si->adi.chipset, "NV18"); 650 status = nvxx_general_powerup(); 651 break; 652 case 0x018610de: /* Nvidia Geforce4 448 Go */ 653 case 0x018710de: /* Nvidia Geforce4 488 Go */ 654 si->ps.card_type = NV18; 655 si->ps.card_arch = NV10A; 656 si->ps.laptop = true; 657 sprintf(si->adi.name, "Nvidia Geforce4 Go"); 658 sprintf(si->adi.chipset, "NV18"); 659 status = nvxx_general_powerup(); 660 break; 661 case 0x018810de: /* Nvidia Quadro4 580 XGL */ 662 si->ps.card_type = NV18; 663 si->ps.card_arch = NV10A; 664 sprintf(si->adi.name, "Nvidia Quadro4"); 665 sprintf(si->adi.chipset, "NV18"); 666 status = nvxx_general_powerup(); 667 break; 668 case 0x018910de: /* Nvidia Geforce4 MX AGP8X (PPC) */ 669 si->ps.card_type = NV18; 670 si->ps.card_arch = NV10A; 671 sprintf(si->adi.name, "Nvidia Geforce4 MX AGP8X"); 672 sprintf(si->adi.chipset, "NV18"); 673 status = nvxx_general_powerup(); 674 break; 675 case 0x018a10de: /* Nvidia Quadro4 280 NVS AGP8X */ 676 case 0x018b10de: /* Nvidia Quadro4 380 XGL */ 677 case 0x018c10de: /* Nvidia Quadro4 NVS 50 PCI */ 678 si->ps.card_type = NV18; 679 si->ps.card_arch = NV10A; 680 sprintf(si->adi.name, "Nvidia Quadro4"); 681 sprintf(si->adi.chipset, "NV18"); 682 status = nvxx_general_powerup(); 683 break; 684 case 0x018d10de: /* Nvidia Geforce4 448 Go */ 685 si->ps.card_type = NV18; 686 si->ps.card_arch = NV10A; 687 si->ps.laptop = true; 688 sprintf(si->adi.name, "Nvidia Geforce4 Go"); 689 sprintf(si->adi.chipset, "NV18"); 690 status = nvxx_general_powerup(); 691 break; 692 case 0x01a010de: /* Nvidia Geforce2 Integrated GPU */ 693 si->ps.card_type = NV11; 694 si->ps.card_arch = NV10A; 695 sprintf(si->adi.name, "Nvidia Geforce2 Integrated GPU"); 696 sprintf(si->adi.chipset, "CRUSH, NV11"); 697 status = nvxx_general_powerup(); 698 break; 699 case 0x01d110de: /* Nvidia Geforce 7300 LE */ 700 case 0x01d310de: /* Nvidia Geforce 7300 SE */ 701 case 0x01df10de: /* Nvidia Geforce 7300 GS */ 702 si->ps.card_type = G72; 703 si->ps.card_arch = NV40A; 704 sprintf(si->adi.name, "Nvidia Geforce 7300"); 705 sprintf(si->adi.chipset, "G72"); 706 status = nvxx_general_powerup(); 707 break; 708 case 0x01d710de: /* Nvidia Quadro NVS 110M/Geforce 7300 Go */ 709 si->ps.card_type = G72; 710 si->ps.card_arch = NV40A; 711 si->ps.laptop = true; 712 sprintf(si->adi.name, "Nvidia Quadro NVS M/GF 7300 Go"); 713 sprintf(si->adi.chipset, "G72"); 714 status = nvxx_general_powerup(); 715 break; 716 case 0x01d810de: /* Nvidia Geforce 7400 Go */ 717 si->ps.card_type = G72; 718 si->ps.card_arch = NV40A; 719 si->ps.laptop = true; 720 sprintf(si->adi.name, "Nvidia Geforce 7400 Go"); 721 sprintf(si->adi.chipset, "G72"); 722 status = nvxx_general_powerup(); 723 break; 724 case 0x01da10de: /* Nvidia Quadro NVS 110M */ 725 si->ps.card_type = G72; 726 si->ps.card_arch = NV40A; 727 si->ps.laptop = true; 728 sprintf(si->adi.name, "Nvidia Quadro NVS 110M"); 729 sprintf(si->adi.chipset, "G72"); 730 status = nvxx_general_powerup(); 731 break; 732 case 0x01dd10de: /* Nvidia Geforce 7500 LE */ 733 si->ps.card_type = G72; 734 si->ps.card_arch = NV40A; 735 sprintf(si->adi.name, "Nvidia Geforce 7500 LE"); 736 sprintf(si->adi.chipset, "G72"); 737 status = nvxx_general_powerup(); 738 break; 739 case 0x01f010de: /* Nvidia Geforce4 MX Integrated GPU */ 740 si->ps.card_type = NV17; 741 si->ps.card_arch = NV10A; 742 sprintf(si->adi.name, "Nvidia Geforce4 MX Integr. GPU"); 743 sprintf(si->adi.chipset, "NFORCE2, NV17"); 744 status = nvxx_general_powerup(); 745 break; 746 case 0x020010de: /* Nvidia Geforce3 */ 747 case 0x020110de: /* Nvidia Geforce3 Ti 200 */ 748 case 0x020210de: /* Nvidia Geforce3 Ti 500 */ 749 si->ps.card_type = NV20; 750 si->ps.card_arch = NV20A; 751 sprintf(si->adi.name, "Nvidia Geforce3"); 752 sprintf(si->adi.chipset, "NV20"); 753 status = nvxx_general_powerup(); 754 break; 755 case 0x020310de: /* Nvidia Quadro DCC */ 756 si->ps.card_type = NV20; 757 si->ps.card_arch = NV20A; 758 sprintf(si->adi.name, "Nvidia Quadro DCC"); 759 sprintf(si->adi.chipset, "NV20"); 760 status = nvxx_general_powerup(); 761 break; 762 case 0x021110de: /* Nvidia Geforce FX 6800 */ 763 case 0x021210de: /* Nvidia Geforce FX 6800LE */ 764 case 0x021510de: /* Nvidia Geforce FX 6800 GT */ 765 si->ps.card_type = NV45; /* NV48 is NV45 with 512Mb */ 766 si->ps.card_arch = NV40A; 767 sprintf(si->adi.name, "Nvidia Geforce FX 6800"); 768 sprintf(si->adi.chipset, "NV48"); 769 status = nvxx_general_powerup(); 770 break; 771 case 0x021810de: /* Nvidia Geforce 6800 XT */ 772 si->ps.card_type = NV40; 773 si->ps.card_arch = NV40A; 774 sprintf(si->adi.name, "Nvidia Geforce 6800 XT"); 775 sprintf(si->adi.chipset, "NV40"); 776 status = nvxx_general_powerup(); 777 break; 778 case 0x022010de: /* Nvidia unknown FX */ 779 si->ps.card_type = NV44; 780 si->ps.card_arch = NV40A; 781 sprintf(si->adi.name, "Nvidia unknown FX"); 782 sprintf(si->adi.chipset, "NV44"); 783 status = nvxx_general_powerup(); 784 break; 785 case 0x022110de: /* Nvidia Geforce 6200 AGP (256Mb - 128bit) */ 786 si->ps.card_type = NV44; 787 si->ps.card_arch = NV40A; 788 sprintf(si->adi.name, "Nvidia Geforce 6200 AGP 256Mb"); 789 sprintf(si->adi.chipset, "NV44"); 790 status = nvxx_general_powerup(); 791 break; 792 case 0x022210de: /* Nvidia unknown FX */ 793 si->ps.card_type = NV44; 794 si->ps.card_arch = NV40A; 795 sprintf(si->adi.name, "Nvidia unknown FX"); 796 sprintf(si->adi.chipset, "NV44"); 797 status = nvxx_general_powerup(); 798 break; 799 case 0x022810de: /* Nvidia unknown FX Go */ 800 si->ps.card_type = NV44; 801 si->ps.card_arch = NV40A; 802 si->ps.laptop = true; 803 sprintf(si->adi.name, "Nvidia unknown FX Go"); 804 sprintf(si->adi.chipset, "NV44"); 805 status = nvxx_general_powerup(); 806 break; 807 case 0x024010de: /* Nvidia Geforce 6150 (NFORCE4 Integr.GPU) */ 808 si->ps.card_type = NV44; 809 si->ps.card_arch = NV40A; 810 sprintf(si->adi.name, "Nvidia Geforce 6150, C51PV"); 811 sprintf(si->adi.chipset, "NV44"); 812 status = nvxx_general_powerup(); 813 break; 814 case 0x024110de: /* Nvidia Geforce 6150 LE (NFORCE4 Integr.GPU) */ 815 si->ps.card_type = NV44; 816 si->ps.card_arch = NV40A; 817 sprintf(si->adi.name, "Nvidia Geforce 6150, C51"); 818 sprintf(si->adi.chipset, "NV44"); 819 status = nvxx_general_powerup(); 820 break; 821 case 0x024210de: /* Nvidia Geforce 6100 (NFORCE4 Integr.GPU) */ 822 si->ps.card_type = NV44; 823 si->ps.card_arch = NV40A; 824 sprintf(si->adi.name, "Nvidia Geforce 6100, C51G"); 825 sprintf(si->adi.chipset, "NV44"); 826 status = nvxx_general_powerup(); 827 break; 828 case 0x024410de: /* Nvidia Geforce 6150 Go (NFORCE4 Integr.GPU) */ 829 si->ps.card_type = NV44; 830 si->ps.card_arch = NV40A; 831 si->ps.laptop = true; 832 sprintf(si->adi.name, "Nvidia Geforce 6150 Go, C51"); 833 sprintf(si->adi.chipset, "NV44"); 834 status = nvxx_general_powerup(); 835 break; 836 case 0x024510de: /* Nvidia Quadro NVS 210S / NVIDIA Geforce 6150LE (NFORCE4 Integr.GPU) */ 837 si->ps.card_type = NV44; 838 si->ps.card_arch = NV40A; 839 sprintf(si->adi.name, "Nvidia Geforce 6150, C51"); 840 sprintf(si->adi.chipset, "NV44"); 841 status = nvxx_general_powerup(); 842 break; 843 case 0x024710de: /* Nvidia Geforce 6100 Go (NFORCE4 Integr.GPU) */ 844 si->ps.card_type = NV44; 845 si->ps.card_arch = NV40A; 846 si->ps.laptop = true; 847 sprintf(si->adi.name, "Nvidia Geforce 6100 Go, C51"); 848 sprintf(si->adi.chipset, "NV44"); 849 status = nvxx_general_powerup(); 850 break; 851 case 0x025010de: /* Nvidia Geforce4 Ti 4600 */ 852 case 0x025110de: /* Nvidia Geforce4 Ti 4400 */ 853 case 0x025210de: /* Nvidia Geforce4 Ti 4600 */ 854 case 0x025310de: /* Nvidia Geforce4 Ti 4200 */ 855 si->ps.card_type = NV25; 856 si->ps.card_arch = NV20A; 857 sprintf(si->adi.name, "Nvidia Geforce4 Ti"); 858 sprintf(si->adi.chipset, "NV25"); 859 status = nvxx_general_powerup(); 860 break; 861 case 0x025810de: /* Nvidia Quadro4 900 XGL */ 862 case 0x025910de: /* Nvidia Quadro4 750 XGL */ 863 case 0x025b10de: /* Nvidia Quadro4 700 XGL */ 864 si->ps.card_type = NV25; 865 si->ps.card_arch = NV20A; 866 sprintf(si->adi.name, "Nvidia Quadro4 XGL"); 867 sprintf(si->adi.chipset, "NV25"); 868 status = nvxx_general_powerup(); 869 break; 870 case 0x028010de: /* Nvidia Geforce4 Ti 4800 AGP8X */ 871 case 0x028110de: /* Nvidia Geforce4 Ti 4200 AGP8X */ 872 si->ps.card_type = NV28; 873 si->ps.card_arch = NV20A; 874 sprintf(si->adi.name, "Nvidia Geforce4 Ti AGP8X"); 875 sprintf(si->adi.chipset, "NV28"); 876 status = nvxx_general_powerup(); 877 break; 878 case 0x028210de: /* Nvidia Geforce4 Ti 4800SE */ 879 si->ps.card_type = NV28; 880 si->ps.card_arch = NV20A; 881 sprintf(si->adi.name, "Nvidia Geforce4 Ti 4800SE"); 882 sprintf(si->adi.chipset, "NV28"); 883 status = nvxx_general_powerup(); 884 break; 885 case 0x028610de: /* Nvidia Geforce4 4200 Go */ 886 si->ps.card_type = NV28; 887 si->ps.card_arch = NV20A; 888 si->ps.laptop = true; 889 sprintf(si->adi.name, "Nvidia Geforce4 4200 Go"); 890 sprintf(si->adi.chipset, "NV28"); 891 status = nvxx_general_powerup(); 892 break; 893 case 0x028810de: /* Nvidia Quadro4 980 XGL */ 894 case 0x028910de: /* Nvidia Quadro4 780 XGL */ 895 si->ps.card_type = NV28; 896 si->ps.card_arch = NV20A; 897 sprintf(si->adi.name, "Nvidia Quadro4 XGL"); 898 sprintf(si->adi.chipset, "NV28"); 899 status = nvxx_general_powerup(); 900 break; 901 case 0x028c10de: /* Nvidia Quadro4 700 GoGL */ 902 si->ps.card_type = NV28; 903 si->ps.card_arch = NV20A; 904 si->ps.laptop = true; 905 sprintf(si->adi.name, "Nvidia Quadro4 700 GoGL"); 906 sprintf(si->adi.chipset, "NV28"); 907 status = nvxx_general_powerup(); 908 break; 909 case 0x029010de: /* Nvidia Geforce 7900 GTX */ 910 case 0x029110de: /* Nvidia Geforce 7900 GT */ 911 case 0x029210de: /* Nvidia Geforce 7900 GS */ 912 case 0x029310de: /* Nvidia Geforce 7900 GX2 */ 913 si->ps.card_type = G71; 914 si->ps.card_arch = NV40A; 915 sprintf(si->adi.name, "Nvidia Geforce 7900"); 916 sprintf(si->adi.chipset, "G71"); 917 status = nvxx_general_powerup(); 918 break; 919 case 0x029410de: /* Nvidia Geforce 7950 GX2 */ 920 case 0x029510de: /* Nvidia Geforce 7950 GT */ 921 si->ps.card_type = G71; 922 si->ps.card_arch = NV40A; 923 sprintf(si->adi.name, "Nvidia Geforce 7950"); 924 sprintf(si->adi.chipset, "G71"); 925 status = nvxx_general_powerup(); 926 break; 927 case 0x029810de: /* Nvidia Geforce Go 7900 GS */ 928 case 0x029910de: /* Nvidia Geforce Go 7900 GTX */ 929 si->ps.card_type = G71; 930 si->ps.card_arch = NV40A; 931 si->ps.laptop = true; 932 sprintf(si->adi.name, "Nvidia Geforce Go 7900"); 933 sprintf(si->adi.chipset, "G71"); 934 status = nvxx_general_powerup(); 935 break; 936 case 0x029c10de: /* Nvidia Quadro FX 5500 */ 937 si->ps.card_type = G71; 938 si->ps.card_arch = NV40A; 939 sprintf(si->adi.name, "Nvidia Quadro FX 5500"); 940 sprintf(si->adi.chipset, "G71"); 941 status = nvxx_general_powerup(); 942 break; 943 case 0x029f10de: /* Nvidia Quadro FX 4500 X2 */ 944 si->ps.card_type = G70; 945 si->ps.card_arch = NV40A; 946 sprintf(si->adi.name, "Nvidia Quadro FX 4500 X2"); 947 sprintf(si->adi.chipset, "G70"); 948 status = nvxx_general_powerup(); 949 break; 950 case 0x02a010de: /* Nvidia Geforce3 Integrated GPU */ 951 si->ps.card_type = NV20; 952 si->ps.card_arch = NV20A; 953 sprintf(si->adi.name, "Nvidia Geforce3 Integrated GPU"); 954 sprintf(si->adi.chipset, "XBOX, NV20"); 955 status = nvxx_general_powerup(); 956 break; 957 case 0x02e010de: /* Nvidia Geforce 7600 GT */ 958 case 0x02e110de: /* Nvidia Geforce 7600 GS */ 959 si->ps.card_type = G73; 960 si->ps.card_arch = NV40A; 961 sprintf(si->adi.name, "Nvidia Geforce 7600"); 962 sprintf(si->adi.chipset, "G73"); 963 status = nvxx_general_powerup(); 964 break; 965 case 0x02e210de: /* Nvidia Geforce 7300 GT */ 966 si->ps.card_type = G73; 967 si->ps.card_arch = NV40A; 968 sprintf(si->adi.name, "Nvidia GeForce 7300 GT"); 969 sprintf(si->adi.chipset, "G73"); 970 status = nvxx_general_powerup(); 971 break; 972 case 0x030110de: /* Nvidia Geforce FX 5800 Ultra */ 973 case 0x030210de: /* Nvidia Geforce FX 5800 */ 974 si->ps.card_type = NV30; 975 si->ps.card_arch = NV30A; 976 sprintf(si->adi.name, "Nvidia Geforce FX 5800"); 977 sprintf(si->adi.chipset, "NV30"); 978 status = nvxx_general_powerup(); 979 break; 980 case 0x030810de: /* Nvidia Quadro FX 2000 */ 981 case 0x030910de: /* Nvidia Quadro FX 1000 */ 982 si->ps.card_type = NV30; 983 si->ps.card_arch = NV30A; 984 sprintf(si->adi.name, "Nvidia Quadro FX"); 985 sprintf(si->adi.chipset, "NV30"); 986 status = nvxx_general_powerup(); 987 break; 988 case 0x031110de: /* Nvidia Geforce FX 5600 Ultra */ 989 case 0x031210de: /* Nvidia Geforce FX 5600 */ 990 si->ps.card_type = NV31; 991 si->ps.card_arch = NV30A; 992 sprintf(si->adi.name, "Nvidia Geforce FX 5600"); 993 sprintf(si->adi.chipset, "NV31"); 994 status = nvxx_general_powerup(); 995 break; 996 case 0x031310de: /* Nvidia unknown FX */ 997 si->ps.card_type = NV31; 998 si->ps.card_arch = NV30A; 999 sprintf(si->adi.name, "Nvidia unknown FX"); 1000 sprintf(si->adi.chipset, "NV31"); 1001 status = nvxx_general_powerup(); 1002 break; 1003 case 0x031410de: /* Nvidia Geforce FX 5600XT */ 1004 si->ps.card_type = NV31; 1005 si->ps.card_arch = NV30A; 1006 sprintf(si->adi.name, "Nvidia Geforce FX 5600XT"); 1007 sprintf(si->adi.chipset, "NV31"); 1008 status = nvxx_general_powerup(); 1009 break; 1010 case 0x031610de: /* Nvidia unknown FX Go */ 1011 case 0x031710de: /* Nvidia unknown FX Go */ 1012 si->ps.card_type = NV31; 1013 si->ps.card_arch = NV30A; 1014 si->ps.laptop = true; 1015 sprintf(si->adi.name, "Nvidia unknown FX Go"); 1016 sprintf(si->adi.chipset, "NV31"); 1017 status = nvxx_general_powerup(); 1018 break; 1019 case 0x031a10de: /* Nvidia Geforce FX 5600 Go */ 1020 si->ps.card_type = NV31; 1021 si->ps.card_arch = NV30A; 1022 si->ps.laptop = true; 1023 sprintf(si->adi.name, "Nvidia Geforce FX 5600 Go"); 1024 sprintf(si->adi.chipset, "NV31"); 1025 status = nvxx_general_powerup(); 1026 break; 1027 case 0x031b10de: /* Nvidia Geforce FX 5650 Go */ 1028 si->ps.card_type = NV31; 1029 si->ps.card_arch = NV30A; 1030 si->ps.laptop = true; 1031 sprintf(si->adi.name, "Nvidia Geforce FX 5650 Go"); 1032 sprintf(si->adi.chipset, "NV31"); 1033 status = nvxx_general_powerup(); 1034 break; 1035 case 0x031c10de: /* Nvidia Quadro FX 700 Go */ 1036 si->ps.card_type = NV31; 1037 si->ps.card_arch = NV30A; 1038 si->ps.laptop = true; 1039 sprintf(si->adi.name, "Nvidia Quadro FX 700 Go"); 1040 sprintf(si->adi.chipset, "NV31"); 1041 status = nvxx_general_powerup(); 1042 break; 1043 case 0x031d10de: /* Nvidia unknown FX Go */ 1044 case 0x031e10de: /* Nvidia unknown FX Go */ 1045 case 0x031f10de: /* Nvidia unknown FX Go */ 1046 si->ps.card_type = NV31; 1047 si->ps.card_arch = NV30A; 1048 si->ps.laptop = true; 1049 sprintf(si->adi.name, "Nvidia unknown FX Go"); 1050 sprintf(si->adi.chipset, "NV31"); 1051 status = nvxx_general_powerup(); 1052 break; 1053 case 0x032010de: /* Nvidia Geforce FX 5200 */ 1054 case 0x032110de: /* Nvidia Geforce FX 5200 Ultra */ 1055 case 0x032210de: /* Nvidia Geforce FX 5200 */ 1056 case 0x032310de: /* Nvidia Geforce FX 5200LE */ 1057 si->ps.card_type = NV34; 1058 si->ps.card_arch = NV30A; 1059 sprintf(si->adi.name, "Nvidia Geforce FX 5200"); 1060 sprintf(si->adi.chipset, "NV34"); 1061 status = nvxx_general_powerup(); 1062 break; 1063 case 0x032410de: /* Nvidia Geforce FX 5200 Go */ 1064 si->ps.card_type = NV34; 1065 si->ps.card_arch = NV30A; 1066 si->ps.laptop = true; 1067 sprintf(si->adi.name, "Nvidia Geforce FX 5200 Go"); 1068 sprintf(si->adi.chipset, "NV34"); 1069 status = nvxx_general_powerup(); 1070 break; 1071 case 0x032510de: /* Nvidia Geforce FX 5250 Go */ 1072 si->ps.card_type = NV34; 1073 si->ps.card_arch = NV30A; 1074 si->ps.laptop = true; 1075 sprintf(si->adi.name, "Nvidia Geforce FX 5250 Go"); 1076 sprintf(si->adi.chipset, "NV34"); 1077 status = nvxx_general_powerup(); 1078 break; 1079 case 0x032610de: /* Nvidia Geforce FX 5500 */ 1080 si->ps.card_type = NV34; 1081 si->ps.card_arch = NV30A; 1082 sprintf(si->adi.name, "Nvidia Geforce FX 5500"); 1083 sprintf(si->adi.chipset, "NV34"); 1084 status = nvxx_general_powerup(); 1085 break; 1086 case 0x032710de: /* Nvidia Geforce FX 5100 */ 1087 si->ps.card_type = NV34; 1088 si->ps.card_arch = NV30A; 1089 sprintf(si->adi.name, "Nvidia Geforce FX 5100"); 1090 sprintf(si->adi.chipset, "NV34"); 1091 status = nvxx_general_powerup(); 1092 break; 1093 case 0x032810de: /* Nvidia Geforce FX 5200 Go 32M/64M */ 1094 si->ps.card_type = NV34; 1095 si->ps.card_arch = NV30A; 1096 si->ps.laptop = true; 1097 sprintf(si->adi.name, "Nvidia Geforce FX 5200 Go"); 1098 sprintf(si->adi.chipset, "NV34"); 1099 status = nvxx_general_powerup(); 1100 break; 1101 case 0x032910de: /* Nvidia Geforce FX 5200 (PPC) */ 1102 si->ps.card_type = NV34; 1103 si->ps.card_arch = NV30A; 1104 sprintf(si->adi.name, "Nvidia Geforce FX 5200"); 1105 sprintf(si->adi.chipset, "NV34"); 1106 status = nvxx_general_powerup(); 1107 break; 1108 case 0x032a10de: /* Nvidia Quadro NVS 280 PCI */ 1109 si->ps.card_type = NV34; 1110 si->ps.card_arch = NV30A; 1111 sprintf(si->adi.name, "Nvidia Quadro NVS 280 PCI"); 1112 sprintf(si->adi.chipset, "NV34"); 1113 status = nvxx_general_powerup(); 1114 break; 1115 case 0x032b10de: /* Nvidia Quadro FX 500/600 PCI */ 1116 si->ps.card_type = NV34; 1117 si->ps.card_arch = NV30A; 1118 sprintf(si->adi.name, "Nvidia Quadro FX 500/600 PCI"); 1119 sprintf(si->adi.chipset, "NV34"); 1120 status = nvxx_general_powerup(); 1121 break; 1122 case 0x032c10de: /* Nvidia Geforce FX 5300 Go */ 1123 case 0x032d10de: /* Nvidia Geforce FX 5100 Go */ 1124 si->ps.card_type = NV34; 1125 si->ps.card_arch = NV30A; 1126 si->ps.laptop = true; 1127 sprintf(si->adi.name, "Nvidia Geforce FX Go"); 1128 sprintf(si->adi.chipset, "NV34"); 1129 status = nvxx_general_powerup(); 1130 break; 1131 case 0x032e10de: /* Nvidia unknown FX Go */ 1132 case 0x032f10de: /* Nvidia unknown FX Go */ 1133 si->ps.card_type = NV34; 1134 si->ps.card_arch = NV30A; 1135 si->ps.laptop = true; 1136 sprintf(si->adi.name, "Nvidia unknown FX Go"); 1137 sprintf(si->adi.chipset, "NV34"); 1138 status = nvxx_general_powerup(); 1139 break; 1140 case 0x033010de: /* Nvidia Geforce FX 5900 Ultra */ 1141 case 0x033110de: /* Nvidia Geforce FX 5900 */ 1142 si->ps.card_type = NV35; 1143 si->ps.card_arch = NV30A; 1144 sprintf(si->adi.name, "Nvidia Geforce FX 5900"); 1145 sprintf(si->adi.chipset, "NV35"); 1146 status = nvxx_general_powerup(); 1147 break; 1148 case 0x033210de: /* Nvidia Geforce FX 5900 XT */ 1149 si->ps.card_type = NV35; 1150 si->ps.card_arch = NV30A; 1151 sprintf(si->adi.name, "Nvidia Geforce FX 5900 XT"); 1152 sprintf(si->adi.chipset, "NV35"); 1153 status = nvxx_general_powerup(); 1154 break; 1155 case 0x033310de: /* Nvidia Geforce FX 5950 Ultra */ 1156 si->ps.card_type = NV38; 1157 si->ps.card_arch = NV30A; 1158 sprintf(si->adi.name, "Nvidia Geforce FX 5950 Ultra"); 1159 sprintf(si->adi.chipset, "NV38"); 1160 status = nvxx_general_powerup(); 1161 break; 1162 case 0x033410de: /* Nvidia Geforce FX 5900 ZT */ 1163 si->ps.card_type = NV38; 1164 si->ps.card_arch = NV30A; 1165 sprintf(si->adi.name, "Nvidia Geforce FX 5900 ZT"); 1166 sprintf(si->adi.chipset, "NV38(?)"); 1167 status = nvxx_general_powerup(); 1168 break; 1169 case 0x033810de: /* Nvidia Quadro FX 3000 */ 1170 si->ps.card_type = NV35; 1171 si->ps.card_arch = NV30A; 1172 sprintf(si->adi.name, "Nvidia Quadro FX 3000"); 1173 sprintf(si->adi.chipset, "NV35"); 1174 status = nvxx_general_powerup(); 1175 break; 1176 case 0x033f10de: /* Nvidia Quadro FX 700 */ 1177 si->ps.card_type = NV35; 1178 si->ps.card_arch = NV30A; 1179 sprintf(si->adi.name, "Nvidia Quadro FX 700"); 1180 sprintf(si->adi.chipset, "NV35"); 1181 status = nvxx_general_powerup(); 1182 break; 1183 case 0x034110de: /* Nvidia Geforce FX 5700 Ultra */ 1184 case 0x034210de: /* Nvidia Geforce FX 5700 */ 1185 case 0x034310de: /* Nvidia Geforce FX 5700LE */ 1186 case 0x034410de: /* Nvidia Geforce FX 5700VE */ 1187 si->ps.card_type = NV36; 1188 si->ps.card_arch = NV30A; 1189 sprintf(si->adi.name, "Nvidia Geforce FX 5700"); 1190 sprintf(si->adi.chipset, "NV36"); 1191 status = nvxx_general_powerup(); 1192 break; 1193 case 0x034510de: /* Nvidia unknown FX */ 1194 si->ps.card_type = NV36; 1195 si->ps.card_arch = NV30A; 1196 sprintf(si->adi.name, "Nvidia unknown FX"); 1197 sprintf(si->adi.chipset, "NV36"); 1198 status = nvxx_general_powerup(); 1199 break; 1200 case 0x034710de: /* Nvidia Geforce FX 5700 Go */ 1201 case 0x034810de: /* Nvidia Geforce FX 5700 Go */ 1202 si->ps.card_type = NV36; 1203 si->ps.card_arch = NV30A; 1204 si->ps.laptop = true; 1205 sprintf(si->adi.name, "Nvidia Geforce FX 5700 Go"); 1206 sprintf(si->adi.chipset, "NV36"); 1207 status = nvxx_general_powerup(); 1208 break; 1209 case 0x034910de: /* Nvidia unknown FX Go */ 1210 case 0x034b10de: /* Nvidia unknown FX Go */ 1211 si->ps.card_type = NV36; 1212 si->ps.card_arch = NV30A; 1213 si->ps.laptop = true; 1214 sprintf(si->adi.name, "Nvidia unknown FX Go"); 1215 sprintf(si->adi.chipset, "NV36"); 1216 status = nvxx_general_powerup(); 1217 break; 1218 case 0x034c10de: /* Nvidia Quadro FX 1000 Go */ 1219 si->ps.card_type = NV36; 1220 si->ps.card_arch = NV30A; 1221 si->ps.laptop = true; 1222 sprintf(si->adi.name, "Nvidia Quadro FX 1000 Go"); 1223 sprintf(si->adi.chipset, "NV36"); 1224 status = nvxx_general_powerup(); 1225 break; 1226 case 0x034e10de: /* Nvidia Quadro FX 1100 */ 1227 si->ps.card_type = NV36; 1228 si->ps.card_arch = NV30A; 1229 sprintf(si->adi.name, "Nvidia Quadro FX 1100"); 1230 sprintf(si->adi.chipset, "NV36"); 1231 status = nvxx_general_powerup(); 1232 break; 1233 case 0x034f10de: /* Nvidia unknown FX */ 1234 si->ps.card_type = NV36; 1235 si->ps.card_arch = NV30A; 1236 sprintf(si->adi.name, "Nvidia unknown FX"); 1237 sprintf(si->adi.chipset, "NV36(?)"); 1238 status = nvxx_general_powerup(); 1239 break; 1240 case 0x039110de: /* Nvidia Geforce 7600 GT */ 1241 si->ps.card_type = G73; 1242 si->ps.card_arch = NV40A; 1243 sprintf(si->adi.name, "Nvidia Geforce 7600 GT"); 1244 sprintf(si->adi.chipset, "G73"); 1245 status = nvxx_general_powerup(); 1246 break; 1247 case 0x039210de: /* Nvidia Geforce 7600 GS */ 1248 si->ps.card_type = G73; 1249 si->ps.card_arch = NV40A; 1250 sprintf(si->adi.name, "Nvidia Geforce 7600 GS"); 1251 sprintf(si->adi.chipset, "G73"); 1252 status = nvxx_general_powerup(); 1253 break; 1254 case 0x039310de: /* Nvidia Geforce 7300 GT */ 1255 si->ps.card_type = G73; 1256 si->ps.card_arch = NV40A; 1257 sprintf(si->adi.name, "Nvidia Geforce 7300 GT"); 1258 sprintf(si->adi.chipset, "G73"); 1259 status = nvxx_general_powerup(); 1260 break; 1261 case 0x039410de: /* Nvidia Geforce 7600 LE */ 1262 si->ps.card_type = G70; 1263 si->ps.card_arch = NV40A; 1264 sprintf(si->adi.name, "Nvidia Geforce 7600 LE"); 1265 sprintf(si->adi.chipset, "G70"); 1266 status = nvxx_general_powerup(); 1267 break; 1268 case 0x039810de: /* Nvidia Geforce 7600 GO */ 1269 si->ps.card_type = G73; 1270 si->ps.card_arch = NV40A; 1271 si->ps.laptop = true; 1272 sprintf(si->adi.name, "Nvidia Geforce 7600 GO"); 1273 sprintf(si->adi.chipset, "G73"); 1274 status = nvxx_general_powerup(); 1275 break; 1276 case 0x03d010de: /* Nvidia Geforce 6100 nForce 430 */ 1277 case 0x03d110de: /* Nvidia Geforce 6100 nForce 405 */ 1278 case 0x03d210de: /* Nvidia Geforce 6100 nForce 400 */ 1279 case 0x03d510de: /* Nvidia Geforce 6100 nForce 420 */ 1280 si->ps.card_type = NV44; 1281 si->ps.card_arch = NV40A; 1282 sprintf(si->adi.name, "Nvidia Geforce 6100 nForce, C61"); 1283 sprintf(si->adi.chipset, "NV44"); 1284 status = nvxx_general_powerup(); 1285 break; 1286 case 0x03d610de: /* Nvidia Geforce 7025 nForce 630a */ 1287 si->ps.card_type = NV44; 1288 si->ps.card_arch = NV40A; 1289 sprintf(si->adi.name, "Nvidia Geforce 7025 nForce 630a"); 1290 sprintf(si->adi.chipset, "NV44"); 1291 status = nvxx_general_powerup(); 1292 break; 1293 #if 0 1294 case 0x06e410de: /* Nvidia Geforce 9200M G98M */ 1295 si->ps.card_type = G70; 1296 si->ps.card_arch = NV40A; 1297 sprintf(si->adi.name, "Nvidia Geforce 8400 GS"); 1298 sprintf(si->adi.chipset, "G98"); 1299 status = nvxx_general_powerup(); 1300 break; 1301 case 0x06e810de: /* Nvidia Geforce 9200M G98M */ 1302 si->ps.card_type = G70; 1303 si->ps.card_arch = NV40A; 1304 sprintf(si->adi.name, "Nvidia Geforce 9200M"); 1305 sprintf(si->adi.chipset, "G98"); 1306 status = nvxx_general_powerup(); 1307 break; 1308 #endif 1309 case 0x07e110de: /* Nvidia Geforce 7100 nForce 630i */ 1310 si->ps.card_type = NV44; 1311 si->ps.card_arch = NV40A; 1312 sprintf(si->adi.name, "Nvidia Geforce 7100 nForce 630i"); 1313 sprintf(si->adi.chipset, "NV44"); 1314 status = nvxx_general_powerup(); 1315 break; 1316 /* Vendor Elsa GmbH */ 1317 case 0x0c601048: /* Elsa Gladiac Geforce2 MX */ 1318 si->ps.card_type = NV11; 1319 si->ps.card_arch = NV10A; 1320 sprintf(si->adi.name, "Elsa Gladiac Geforce2 MX"); 1321 sprintf(si->adi.chipset, "NV11"); 1322 status = nvxx_general_powerup(); 1323 break; 1324 /* Vendor Nvidia STB/SGS-Thompson */ 1325 case 0x002012d2: /* Nvidia STB/SGS-Thompson TNT1 */ 1326 si->ps.card_type = NV04; 1327 si->ps.card_arch = NV04A; 1328 sprintf(si->adi.name, "Nvidia STB/SGS-Thompson TNT1"); 1329 sprintf(si->adi.chipset, "NV04"); 1330 status = nvxx_general_powerup(); 1331 break; 1332 case 0x002812d2: /* Nvidia STB/SGS-Thompson TNT2 (pro) */ 1333 case 0x002912d2: /* Nvidia STB/SGS-Thompson TNT2 Ultra */ 1334 case 0x002a12d2: /* Nvidia STB/SGS-Thompson TNT2 */ 1335 case 0x002b12d2: /* Nvidia STB/SGS-Thompson TNT2 */ 1336 si->ps.card_type = NV05; 1337 si->ps.card_arch = NV04A; 1338 sprintf(si->adi.name, "Nvidia STB/SGS-Thompson TNT2"); 1339 sprintf(si->adi.chipset, "NV05"); 1340 status = nvxx_general_powerup(); 1341 break; 1342 case 0x002c12d2: /* Nvidia STB/SGS-Thompson Vanta (Lt) */ 1343 si->ps.card_type = NV05; 1344 si->ps.card_arch = NV04A; 1345 sprintf(si->adi.name, "Nvidia STB/SGS-Thompson Vanta"); 1346 sprintf(si->adi.chipset, "NV05"); 1347 status = nvxx_general_powerup(); 1348 break; 1349 case 0x002d12d2: /* Nvidia STB/SGS-Thompson TNT2-M64 (Pro) */ 1350 si->ps.card_type = NV05M64; 1351 si->ps.card_arch = NV04A; 1352 sprintf(si->adi.name, "Nvidia STB/SGS-Thompson TNT2M64"); 1353 sprintf(si->adi.chipset, "NV05 model 64"); 1354 status = nvxx_general_powerup(); 1355 break; 1356 case 0x002e12d2: /* Nvidia STB/SGS-Thompson NV06 Vanta */ 1357 case 0x002f12d2: /* Nvidia STB/SGS-Thompson NV06 Vanta */ 1358 si->ps.card_type = NV06; 1359 si->ps.card_arch = NV04A; 1360 sprintf(si->adi.name, "Nvidia STB/SGS-Thompson Vanta"); 1361 sprintf(si->adi.chipset, "NV06"); 1362 status = nvxx_general_powerup(); 1363 break; 1364 case 0x00a012d2: /* Nvidia STB/SGS-Thompson Aladdin TNT2 */ 1365 si->ps.card_type = NV05; 1366 si->ps.card_arch = NV04A; 1367 sprintf(si->adi.name, "Nvidia STB/SGS-Thompson TNT2"); 1368 sprintf(si->adi.chipset, "NV05"); 1369 status = nvxx_general_powerup(); 1370 break; 1371 /* Vendor Varisys Limited */ 1372 case 0x35031888: /* Varisys Geforce4 MX440 */ 1373 si->ps.card_type = NV17; 1374 si->ps.card_arch = NV10A; 1375 sprintf(si->adi.name, "Varisys Geforce4 MX440"); 1376 sprintf(si->adi.chipset, "NV17"); 1377 status = nvxx_general_powerup(); 1378 break; 1379 case 0x35051888: /* Varisys Geforce4 Ti 4200 */ 1380 si->ps.card_type = NV25; 1381 si->ps.card_arch = NV20A; 1382 sprintf(si->adi.name, "Varisys Geforce4 Ti 4200"); 1383 sprintf(si->adi.chipset, "NV25"); 1384 status = nvxx_general_powerup(); 1385 break; 1386 default: 1387 LOG(8,("POWERUP: Failed to detect valid card 0x%08x\n",CFGR(DEVID))); 1388 return B_ERROR; 1389 } 1390 1391 return status; 1392 } 1393 1394 static status_t test_ram() 1395 { 1396 uint32 value, offset; 1397 status_t result = B_OK; 1398 1399 /* make sure we don't corrupt the hardware cursor by using fbc.frame_buffer. */ 1400 if (si->fbc.frame_buffer == NULL) 1401 { 1402 LOG(8,("INIT: test_ram detected NULL pointer.\n")); 1403 return B_ERROR; 1404 } 1405 1406 for (offset = 0, value = 0x55aa55aa; offset < 256; offset++) 1407 { 1408 /* write testpattern to cardRAM */ 1409 ((uint32 *)si->fbc.frame_buffer)[offset] = value; 1410 /* toggle testpattern */ 1411 value = 0xffffffff - value; 1412 } 1413 1414 for (offset = 0, value = 0x55aa55aa; offset < 256; offset++) 1415 { 1416 /* readback and verify testpattern from cardRAM */ 1417 if (((uint32 *)si->fbc.frame_buffer)[offset] != value) result = B_ERROR; 1418 /* toggle testpattern */ 1419 value = 0xffffffff - value; 1420 } 1421 return result; 1422 } 1423 1424 /* NOTE: 1425 * This routine *has* to be done *after* SetDispplayMode has been executed, 1426 * or test results will not be representative! 1427 * (CAS latency is dependant on NV setup on some (DRAM) boards) */ 1428 status_t nv_set_cas_latency() 1429 { 1430 status_t result = B_ERROR; 1431 uint8 latency = 0; 1432 1433 /* check current RAM access to see if we need to change anything */ 1434 if (test_ram() == B_OK) 1435 { 1436 LOG(4,("INIT: RAM access OK.\n")); 1437 return B_OK; 1438 } 1439 1440 /* check if we read PINS at starttime so we have valid registersettings at our disposal */ 1441 if (si->ps.pins_status != B_OK) 1442 { 1443 LOG(4,("INIT: RAM access errors; not fixable: PINS was not read from cardBIOS.\n")); 1444 return B_ERROR; 1445 } 1446 1447 /* OK. We might have a problem, try to fix it now.. */ 1448 LOG(4,("INIT: RAM access errors; tuning CAS latency if prudent...\n")); 1449 1450 switch(si->ps.card_type) 1451 { 1452 default: 1453 LOG(4,("INIT: RAM CAS tuning not implemented for this card, aborting.\n")); 1454 return B_OK; 1455 break; 1456 } 1457 if (result == B_OK) 1458 LOG(4,("INIT: RAM access OK. CAS latency set to %d cycles.\n", latency)); 1459 else 1460 LOG(4,("INIT: RAM access not fixable. CAS latency set to %d cycles.\n", latency)); 1461 1462 return result; 1463 } 1464 1465 void setup_virtualized_heads(bool cross) 1466 { 1467 if (cross) 1468 { 1469 head1_interrupt_enable = (crtc_interrupt_enable) nv_crtc2_interrupt_enable; 1470 head1_update_fifo = (crtc_update_fifo) nv_crtc2_update_fifo; 1471 head1_validate_timing = (crtc_validate_timing) nv_crtc2_validate_timing; 1472 head1_set_timing = (crtc_set_timing) nv_crtc2_set_timing; 1473 head1_depth = (crtc_depth) nv_crtc2_depth; 1474 head1_dpms = (crtc_dpms) nv_crtc2_dpms; 1475 head1_set_display_pitch = (crtc_set_display_pitch) nv_crtc2_set_display_pitch; 1476 head1_set_display_start = (crtc_set_display_start) nv_crtc2_set_display_start; 1477 head1_cursor_init = (crtc_cursor_init) nv_crtc2_cursor_init; 1478 head1_cursor_show = (crtc_cursor_show) nv_crtc2_cursor_show; 1479 head1_cursor_hide = (crtc_cursor_hide) nv_crtc2_cursor_hide; 1480 head1_cursor_define = (crtc_cursor_define) nv_crtc2_cursor_define; 1481 head1_cursor_position = (crtc_cursor_position) nv_crtc2_cursor_position; 1482 head1_stop_tvout = (crtc_stop_tvout) nv_crtc2_stop_tvout; 1483 head1_start_tvout = (crtc_start_tvout) nv_crtc2_start_tvout; 1484 1485 head1_mode = (dac_mode) nv_dac2_mode; 1486 head1_palette = (dac_palette) nv_dac2_palette; 1487 head1_set_pix_pll = (dac_set_pix_pll) nv_dac2_set_pix_pll; 1488 head1_pix_pll_find = (dac_pix_pll_find) nv_dac2_pix_pll_find; 1489 1490 head2_interrupt_enable = (crtc_interrupt_enable) nv_crtc_interrupt_enable; 1491 head2_update_fifo = (crtc_update_fifo) nv_crtc_update_fifo; 1492 head2_validate_timing = (crtc_validate_timing) nv_crtc_validate_timing; 1493 head2_set_timing = (crtc_set_timing) nv_crtc_set_timing; 1494 head2_depth = (crtc_depth) nv_crtc_depth; 1495 head2_dpms = (crtc_dpms) nv_crtc_dpms; 1496 head2_set_display_pitch = (crtc_set_display_pitch) nv_crtc_set_display_pitch; 1497 head2_set_display_start = (crtc_set_display_start) nv_crtc_set_display_start; 1498 head2_cursor_init = (crtc_cursor_init) nv_crtc_cursor_init; 1499 head2_cursor_show = (crtc_cursor_show) nv_crtc_cursor_show; 1500 head2_cursor_hide = (crtc_cursor_hide) nv_crtc_cursor_hide; 1501 head2_cursor_define = (crtc_cursor_define) nv_crtc_cursor_define; 1502 head2_cursor_position = (crtc_cursor_position) nv_crtc_cursor_position; 1503 head2_stop_tvout = (crtc_stop_tvout) nv_crtc_stop_tvout; 1504 head2_start_tvout = (crtc_start_tvout) nv_crtc_start_tvout; 1505 1506 head2_mode = (dac_mode) nv_dac_mode; 1507 head2_palette = (dac_palette) nv_dac_palette; 1508 head2_set_pix_pll = (dac_set_pix_pll) nv_dac_set_pix_pll; 1509 head2_pix_pll_find = (dac_pix_pll_find) nv_dac_pix_pll_find; 1510 } 1511 else 1512 { 1513 head1_interrupt_enable = (crtc_interrupt_enable) nv_crtc_interrupt_enable; 1514 head1_update_fifo = (crtc_update_fifo) nv_crtc_update_fifo; 1515 head1_validate_timing = (crtc_validate_timing) nv_crtc_validate_timing; 1516 head1_set_timing = (crtc_set_timing) nv_crtc_set_timing; 1517 head1_depth = (crtc_depth) nv_crtc_depth; 1518 head1_dpms = (crtc_dpms) nv_crtc_dpms; 1519 head1_set_display_pitch = (crtc_set_display_pitch) nv_crtc_set_display_pitch; 1520 head1_set_display_start = (crtc_set_display_start) nv_crtc_set_display_start; 1521 head1_cursor_init = (crtc_cursor_init) nv_crtc_cursor_init; 1522 head1_cursor_show = (crtc_cursor_show) nv_crtc_cursor_show; 1523 head1_cursor_hide = (crtc_cursor_hide) nv_crtc_cursor_hide; 1524 head1_cursor_define = (crtc_cursor_define) nv_crtc_cursor_define; 1525 head1_cursor_position = (crtc_cursor_position) nv_crtc_cursor_position; 1526 head1_stop_tvout = (crtc_stop_tvout) nv_crtc_stop_tvout; 1527 head1_start_tvout = (crtc_start_tvout) nv_crtc_start_tvout; 1528 1529 head1_mode = (dac_mode) nv_dac_mode; 1530 head1_palette = (dac_palette) nv_dac_palette; 1531 head1_set_pix_pll = (dac_set_pix_pll) nv_dac_set_pix_pll; 1532 head1_pix_pll_find = (dac_pix_pll_find) nv_dac_pix_pll_find; 1533 1534 head2_interrupt_enable = (crtc_interrupt_enable) nv_crtc2_interrupt_enable; 1535 head2_update_fifo = (crtc_update_fifo) nv_crtc2_update_fifo; 1536 head2_validate_timing = (crtc_validate_timing) nv_crtc2_validate_timing; 1537 head2_set_timing = (crtc_set_timing) nv_crtc2_set_timing; 1538 head2_depth = (crtc_depth) nv_crtc2_depth; 1539 head2_dpms = (crtc_dpms) nv_crtc2_dpms; 1540 head2_set_display_pitch = (crtc_set_display_pitch) nv_crtc2_set_display_pitch; 1541 head2_set_display_start = (crtc_set_display_start) nv_crtc2_set_display_start; 1542 head2_cursor_init = (crtc_cursor_init) nv_crtc2_cursor_init; 1543 head2_cursor_show = (crtc_cursor_show) nv_crtc2_cursor_show; 1544 head2_cursor_hide = (crtc_cursor_hide) nv_crtc2_cursor_hide; 1545 head2_cursor_define = (crtc_cursor_define) nv_crtc2_cursor_define; 1546 head2_cursor_position = (crtc_cursor_position) nv_crtc2_cursor_position; 1547 head2_stop_tvout = (crtc_stop_tvout) nv_crtc2_stop_tvout; 1548 head2_start_tvout = (crtc_start_tvout) nv_crtc2_start_tvout; 1549 1550 head2_mode = (dac_mode) nv_dac2_mode; 1551 head2_palette = (dac_palette) nv_dac2_palette; 1552 head2_set_pix_pll = (dac_set_pix_pll) nv_dac2_set_pix_pll; 1553 head2_pix_pll_find = (dac_pix_pll_find) nv_dac2_pix_pll_find; 1554 } 1555 } 1556 1557 void set_crtc_owner(bool head) 1558 { 1559 if (si->ps.secondary_head) 1560 { 1561 if (!head) 1562 { 1563 /* note: 'OWNER' is a non-standard register in behaviour(!) on NV11's, 1564 * while non-NV11 cards behave normally. 1565 * 1566 * Double-write action needed on those strange NV11 cards: */ 1567 /* RESET: needed on NV11 */ 1568 CRTCW(OWNER, 0xff); 1569 /* enable access to CRTC1, SEQ1, GRPH1, ATB1, ??? */ 1570 CRTCW(OWNER, 0x00); 1571 } 1572 else 1573 { 1574 /* note: 'OWNER' is a non-standard register in behaviour(!) on NV11's, 1575 * while non-NV11 cards behave normally. 1576 * 1577 * Double-write action needed on those strange NV11 cards: */ 1578 /* RESET: needed on NV11 */ 1579 CRTC2W(OWNER, 0xff); 1580 /* enable access to CRTC2, SEQ2, GRPH2, ATB2, ??? */ 1581 CRTC2W(OWNER, 0x03); 1582 } 1583 } 1584 } 1585 1586 static status_t nvxx_general_powerup() 1587 { 1588 LOG(4, ("INIT: NV powerup\n")); 1589 LOG(4,("POWERUP: Detected %s (%s)\n", si->adi.name, si->adi.chipset)); 1590 1591 /* setup cardspecs */ 1592 /* note: 1593 * this MUST be done before the driver attempts a card coldstart */ 1594 set_specs(); 1595 1596 /* only process BIOS for finetuning specs and coldstarting card if requested 1597 * by the user; 1598 * note: 1599 * this in fact frees the driver from relying on the BIOS to be executed 1600 * at system power-up POST time. */ 1601 if (!si->settings.usebios) 1602 { 1603 /* Make sure we are running in PCI (not AGP) mode: 1604 * This is a requirement for safely coldstarting cards! 1605 * (some cards reset their AGP PLL during startup which makes acceleration 1606 * engine DMA fail later on. A reboot is needed to overcome that.) 1607 * Note: 1608 * This may only be done when no transfers are in progress on the bus, so now 1609 * is probably a good time.. */ 1610 nv_agp_setup(false); 1611 1612 LOG(2, ("INIT: Attempting card coldstart!\n")); 1613 /* update the cardspecs in the shared_info PINS struct according to reported 1614 * specs as much as is possible; 1615 * this also coldstarts the card if possible (executes BIOS CMD script(s)) */ 1616 parse_pins(); 1617 } 1618 else 1619 { 1620 LOG(2, ("INIT: Skipping card coldstart!\n")); 1621 } 1622 1623 unlock_card(); 1624 1625 /* get RAM size, detect TV encoder and do fake panel startup (panel init code 1626 * is still missing). */ 1627 fake_panel_start(); 1628 1629 /* log the final card specifications */ 1630 dump_pins(); 1631 1632 /* dump config space as it is after a possible coldstart attempt */ 1633 if (si->settings.logmask & 0x80000000) nv_dump_configuration_space(); 1634 1635 /* setup CRTC and DAC functions access: determined in fake_panel_start */ 1636 setup_virtualized_heads(si->ps.crtc2_prim); 1637 1638 /* do powerup needed from pre-inited card state as done by system POST cardBIOS 1639 * execution or driver coldstart above */ 1640 return nv_general_bios_to_powergraphics(); 1641 } 1642 1643 /* this routine switches the CRTC/DAC sets to 'connectors', but only for analog 1644 * outputs. We need this to make sure the analog 'switch' is set in the same way the 1645 * digital 'switch' is set by the BIOS or we might not be able to use dualhead. */ 1646 status_t nv_general_output_select(bool cross) 1647 { 1648 /* make sure this call is warranted */ 1649 if (si->ps.secondary_head) 1650 { 1651 /* NV11 cards can't switch heads (confirmed) */ 1652 if (si->ps.card_type != NV11) 1653 { 1654 if (cross) 1655 { 1656 LOG(4,("INIT: switching analog outputs to be cross-connected\n")); 1657 1658 /* enable head 2 on connector 1 */ 1659 /* (b8 = select CRTC (head) for output, 1660 * b4 = ??? (confirmed not to be a FP switch), 1661 * b0 = enable CRT) */ 1662 DACW(OUTPUT, 0x00000101); 1663 /* enable head 1 on connector 2 */ 1664 DAC2W(OUTPUT, 0x00000001); 1665 } 1666 else 1667 { 1668 LOG(4,("INIT: switching analog outputs to be straight-through\n")); 1669 1670 /* enable head 1 on connector 1 */ 1671 DACW(OUTPUT, 0x00000001); 1672 /* enable head 2 on connector 2 */ 1673 DAC2W(OUTPUT, 0x00000101); 1674 } 1675 } 1676 else 1677 { 1678 LOG(4,("INIT: NV11 analog outputs are hardwired to be straight-through\n")); 1679 } 1680 return B_OK; 1681 } 1682 else 1683 { 1684 return B_ERROR; 1685 } 1686 } 1687 1688 /* this routine switches CRTC/DAC set use. We need this because it's unknown howto 1689 * switch digital panels to/from a specific CRTC/DAC set. */ 1690 status_t nv_general_head_select(bool cross) 1691 { 1692 /* make sure this call is warranted */ 1693 if (si->ps.secondary_head) 1694 { 1695 /* invert CRTC/DAC use to do switching */ 1696 if (cross) 1697 { 1698 LOG(4,("INIT: switching CRTC/DAC use to be cross-connected\n")); 1699 si->crtc_switch_mode = !si->ps.crtc2_prim; 1700 } 1701 else 1702 { 1703 LOG(4,("INIT: switching CRTC/DAC use to be straight-through\n")); 1704 si->crtc_switch_mode = si->ps.crtc2_prim; 1705 } 1706 /* update CRTC and DAC functions access */ 1707 setup_virtualized_heads(si->crtc_switch_mode); 1708 1709 return B_OK; 1710 } 1711 else 1712 { 1713 return B_ERROR; 1714 } 1715 } 1716 1717 static void unlock_card(void) 1718 { 1719 /* make sure to power-up all nvidia hardware function blocks */ 1720 /* bit 28: OVERLAY ENGINE (BES), 1721 * bit 25: CRTC2, (> NV04A) 1722 * bit 24: CRTC1, 1723 * bit 20: framebuffer, 1724 * bit 16: PPMI, 1725 * bit 13: some part of at least the G72 acceleration engine, 1726 * bit 12: PGRAPH, 1727 * bit 8: PFIFO, 1728 * bit 4: PMEDIA, 1729 * bit 0: TVOUT. (> NV04A) */ 1730 NV_REG32(NV32_PWRUPCTRL) = 0xffffffff; 1731 1732 /* select colormode CRTC registers base adresses */ 1733 NV_REG8(NV8_MISCW) = 0xcb; 1734 1735 /* enable access to primary head */ 1736 set_crtc_owner(0); 1737 /* unlock head's registers for R/W access */ 1738 CRTCW(LOCK, 0x57); 1739 CRTCW(VSYNCE ,(CRTCR(VSYNCE) & 0x7f)); 1740 if (si->ps.secondary_head) 1741 { 1742 /* enable access to secondary head */ 1743 set_crtc_owner(1); 1744 /* unlock head's registers for R/W access */ 1745 CRTC2W(LOCK, 0x57); 1746 CRTC2W(VSYNCE ,(CRTCR(VSYNCE) & 0x7f)); 1747 } 1748 } 1749 1750 /* basic change of card state from VGA to enhanced mode: 1751 * Should work from VGA BIOS POST init state. */ 1752 static status_t nv_general_bios_to_powergraphics() 1753 { 1754 /* let acc engine make power off/power on cycle to start 'fresh' */ 1755 NV_REG32(NV32_PWRUPCTRL) = 0xffff00ff; 1756 snooze(1000); 1757 NV_REG32(NV32_PWRUPCTRL) = 0xffffffff; 1758 1759 unlock_card(); 1760 1761 /* turn off both displays and the hardcursors (also disables transfers) */ 1762 head1_dpms(false, false, false, true); 1763 head1_cursor_hide(); 1764 if (si->ps.secondary_head) 1765 { 1766 head2_dpms(false, false, false, true); 1767 head2_cursor_hide(); 1768 } 1769 1770 if (si->ps.secondary_head) 1771 { 1772 /* switch overlay engine and TV encoder to CRTC1 */ 1773 /* bit 17: GPU FP port #1 (confirmed NV25, NV28, confirmed not on NV34), 1774 * bit 16: GPU FP port #2 (confirmed NV25, NV28, NV34), 1775 * bit 12: overlay engine (all cards), 1776 * bit 9: TVout chip #2 (confirmed on NV18, NV25, NV28), 1777 * bit 8: TVout chip #1 (all cards), 1778 * bit 4: both I2C busses (all cards) */ 1779 NV_REG32(NV32_2FUNCSEL) &= ~0x00001100; 1780 NV_REG32(NV32_FUNCSEL) |= 0x00001100; 1781 } 1782 si->overlay.crtc = false; 1783 1784 /* enable 'enhanced' mode on primary head: */ 1785 /* enable access to primary head */ 1786 set_crtc_owner(0); 1787 /* note: 'BUFFER' is a non-standard register in behaviour(!) on most 1788 * NV11's like the Geforce2 MX200, while the MX400 and non-NV11 cards 1789 * behave normally. 1790 * Also readback is not nessesarily what was written before! 1791 * 1792 * Double-write action needed on those strange NV11 cards: */ 1793 /* RESET: don't doublebuffer CRTC access: set programmed values immediately... */ 1794 CRTCW(BUFFER, 0xff); 1795 /* ... and use fine pitched CRTC granularity on > NV4 cards (b2 = 0) */ 1796 /* note: this has no effect on possible bandwidth issues. */ 1797 CRTCW(BUFFER, 0xfb); 1798 /* select VGA mode (old VGA register) */ 1799 CRTCW(MODECTL, 0xc3); 1800 /* select graphics mode (old VGA register) */ 1801 SEQW(MEMMODE, 0x0e); 1802 /* select 8 dots character clocks (old VGA register) */ 1803 SEQW(CLKMODE, 0x21); 1804 /* select VGA mode (old VGA register) */ 1805 GRPHW(MODE, 0x00); 1806 /* select graphics mode (old VGA register) */ 1807 GRPHW(MISC, 0x01); 1808 /* select graphics mode (old VGA register) */ 1809 ATBW(MODECTL, 0x01); 1810 /* enable 'enhanced mode', enable Vsync & Hsync, 1811 * set DAC palette to 8-bit width, disable large screen */ 1812 CRTCW(REPAINT1, 0x04); 1813 1814 /* enable 'enhanced' mode on secondary head: */ 1815 if (si->ps.secondary_head) 1816 { 1817 /* enable access to secondary head */ 1818 set_crtc_owner(1); 1819 /* select colormode CRTC2 registers base adresses */ 1820 NV_REG8(NV8_MISCW) = 0xcb; 1821 /* note: 'BUFFER' is a non-standard register in behaviour(!) on most 1822 * NV11's like the Geforce2 MX200, while the MX400 and non-NV11 cards 1823 * behave normally. 1824 * Also readback is not nessesarily what was written before! 1825 * 1826 * Double-write action needed on those strange NV11 cards: */ 1827 /* RESET: don't doublebuffer CRTC2 access: set programmed values immediately... */ 1828 CRTC2W(BUFFER, 0xff); 1829 /* ... and use fine pitched CRTC granularity on > NV4 cards (b2 = 0) */ 1830 /* note: this has no effect on possible bandwidth issues. */ 1831 CRTC2W(BUFFER, 0xfb); 1832 /* select VGA mode (old VGA register) */ 1833 CRTC2W(MODECTL, 0xc3); 1834 /* select graphics mode (old VGA register) */ 1835 SEQW(MEMMODE, 0x0e); 1836 /* select 8 dots character clocks (old VGA register) */ 1837 SEQW(CLKMODE, 0x21); 1838 /* select VGA mode (old VGA register) */ 1839 GRPHW(MODE, 0x00); 1840 /* select graphics mode (old VGA register) */ 1841 GRPHW(MISC, 0x01); 1842 /* select graphics mode (old VGA register) */ 1843 ATB2W(MODECTL, 0x01); 1844 /* enable 'enhanced mode', enable Vsync & Hsync, 1845 * set DAC palette to 8-bit width, disable large screen */ 1846 CRTC2W(REPAINT1, 0x04); 1847 } 1848 1849 /* enable palettes */ 1850 DACW(GENCTRL, 0x00100100); 1851 if (si->ps.secondary_head) DAC2W(GENCTRL, 0x00100100); 1852 1853 /* turn on DAC and make sure detection testsignal routing is disabled 1854 * (b16 = disable DAC, 1855 * b12 = enable testsignal output */ 1856 //fixme note: b20 ('DACTM_TEST') when set apparantly blocks a DAC's video output 1857 //(confirmed NV43), while it's timing remains operational (black screen). 1858 //It feels like in some screen configurations it can move the output to the other 1859 //output connector as well... 1860 DACW(TSTCTRL, (DACR(TSTCTRL) & 0xfffeefff)); 1861 /* b20 enables DAC video output on some newer cards 1862 * (confirmed video to be almost black if zero on Geforce 7300, id 0x01d1 (G72)) */ 1863 if ((si->ps.card_type == NV44) || (si->ps.card_type >= G70)) 1864 DACW(TSTCTRL, (DACR(TSTCTRL) | 0x00100000)); 1865 1866 /* turn on DAC2 if it exists 1867 * (NOTE: testsignal function block resides in DAC1 only (!)) */ 1868 if (si->ps.secondary_head) { 1869 DAC2W(TSTCTRL, (DAC2R(TSTCTRL) & 0xfffeefff)); 1870 /* b20 might enable DAC video output on some newer cards 1871 * (not confirmed yet) */ 1872 if ((si->ps.card_type == NV44) || (si->ps.card_type >= G70)) 1873 DAC2W(TSTCTRL, (DAC2R(TSTCTRL) | 0x00100000)); 1874 } 1875 1876 /* NV40 and NV45 need a 'tweak' to make sure the CRTC FIFO's/shiftregisters get 1877 * their data in time (otherwise momentarily ghost images of windows or such 1878 * may appear on heavy acceleration engine use for instance, especially in 32-bit 1879 * colordepth) */ 1880 if ((si->ps.card_type == NV40) || (si->ps.card_type == NV45)) 1881 { 1882 /* clear b15: some framebuffer config item (unknown) */ 1883 NV_REG32(NV32_PFB_CLS_PAGE2) &= 0xffff7fff; 1884 } 1885 1886 /* enable dithering for internal laptop panels only (those have only 18bit colordepth sometimes) 1887 * note: 1888 * dithering is only supported on digitally connected flatpanels. */ 1889 //fixme: how about DAC2?? (still implement and test..) 1890 if (si->ps.laptop && (si->ps.monitors & CRTC1_TMDS)) nv_dac_dither(true); 1891 1892 /* tweak card GPU-core and RAM speeds if requested (hoping we'll survive)... */ 1893 if (si->settings.gpu_clk) 1894 { 1895 LOG(2,("INIT: tweaking GPU clock!\n")); 1896 1897 set_pll(NV32_COREPLL, si->settings.gpu_clk); 1898 snooze(1000); 1899 } 1900 if (si->settings.ram_clk) 1901 { 1902 LOG(2,("INIT: tweaking cardRAM clock!\n")); 1903 1904 set_pll(NV32_MEMPLL, si->settings.ram_clk); 1905 snooze(1000); 1906 } 1907 1908 /* setup AGP: 1909 * Note: 1910 * This may only be done when no transfers are in progress on the bus, so now 1911 * is probably a good time.. */ 1912 nv_agp_setup(true); 1913 1914 return B_OK; 1915 } 1916 1917 /* Check if mode virtual_size adheres to the cards _maximum_ contraints, and modify 1918 * virtual_size to the nearest valid maximum for the mode on the card if not so. 1919 * Also: check if virtual_width adheres to the cards granularity constraints, and 1920 * create mode slopspace if not so. 1921 * We use acc or crtc granularity constraints based on the 'worst case' scenario. 1922 * 1923 * Mode slopspace is reflected in fbc->bytes_per_row BTW. */ 1924 status_t nv_general_validate_pic_size (display_mode *target, uint32 *bytes_per_row, bool *acc_mode) 1925 { 1926 uint32 video_pitch; 1927 uint32 acc_mask, crtc_mask; 1928 uint32 max_crtc_width, max_acc_width; 1929 uint8 depth = 8; 1930 1931 /* determine pixel multiple based on acceleration engine constraints */ 1932 /* note: 1933 * because of the seemingly 'random' variations in these constraints we take 1934 * a reasonable 'lowest common denominator' instead of always true constraints. */ 1935 switch (si->ps.card_arch) 1936 { 1937 case NV04A: 1938 /* confirmed for: 1939 * TNT1 (NV04), TNT2 (NV05), TNT2-M64 (NV05M64), Geforce2 MX400 (NV11), 1940 * Geforce4 MX440 (NV18), GeforceFX 5200 (NV34) in PIO acc mode; 1941 * confirmed for: 1942 * TNT1 (NV04), TNT2 (NV05), TNT2-M64 (NV05M64), Geforce4 Ti4200 (NV28), 1943 * GeforceFX 5200 (NV34) in DMA acc mode. */ 1944 switch (target->space) 1945 { 1946 case B_CMAP8: acc_mask = 0x0f; depth = 8; break; 1947 case B_RGB15: acc_mask = 0x07; depth = 16; break; 1948 case B_RGB16: acc_mask = 0x07; depth = 16; break; 1949 case B_RGB24: acc_mask = 0x0f; depth = 24; break; 1950 case B_RGB32: acc_mask = 0x03; depth = 32; break; 1951 default: 1952 LOG(8,("INIT: unknown color space: 0x%08x\n", target->space)); 1953 return B_ERROR; 1954 } 1955 break; 1956 default: 1957 /* confirmed for: 1958 * Geforce4 Ti4200 (NV28), GeforceFX 5600 (NV31) in PIO acc mode; 1959 * confirmed for: 1960 * Geforce2 MX400 (NV11), Geforce4 MX440 (NV18), GeforcePCX 5750 (NV36), 1961 * GeforcePCX 6600 GT (NV43) in DMA acc mode. */ 1962 switch (target->space) 1963 { 1964 case B_CMAP8: acc_mask = 0x3f; depth = 8; break; 1965 case B_RGB15: acc_mask = 0x1f; depth = 16; break; 1966 case B_RGB16: acc_mask = 0x1f; depth = 16; break; 1967 case B_RGB24: acc_mask = 0x3f; depth = 24; break; 1968 case B_RGB32: acc_mask = 0x0f; depth = 32; break; 1969 default: 1970 LOG(8,("INIT: unknown color space: 0x%08x\n", target->space)); 1971 return B_ERROR; 1972 } 1973 break; 1974 } 1975 1976 /* determine pixel multiple based on CRTC memory pitch constraints: 1977 * -> all NV cards have same granularity constraints on CRTC1 and CRTC2, 1978 * provided that the CRTC1 and CRTC2 BUFFER register b2 = 0; 1979 * 1980 * (Note: Don't mix this up with CRTC timing contraints! Those are 1981 * multiples of 8 for horizontal, 1 for vertical timing.) */ 1982 switch (si->ps.card_type) 1983 { 1984 default: 1985 // case NV04: 1986 /* confirmed for: 1987 * TNT1 always; 1988 * TNT2, TNT2-M64, Geforce2 MX400, Geforce4 MX440, Geforce4 Ti4200, 1989 * GeforceFX 5200: if the CRTC1 (and CRTC2) BUFFER register b2 = 0 */ 1990 /* NOTE: 1991 * Unfortunately older cards have a hardware fault that prevents use. 1992 * We need doubled granularity on those to prevent the single top line 1993 * from shifting to the left! 1994 * This is confirmed for TNT2, Geforce2 MX200, Geforce2 MX400. 1995 * Confirmed OK are: 1996 * Geforce4 MX440, Geforce4 Ti4200, GeforceFX 5200. */ 1997 switch (target->space) 1998 { 1999 case B_CMAP8: crtc_mask = 0x0f; break; /* 0x07 */ 2000 case B_RGB15: crtc_mask = 0x07; break; /* 0x03 */ 2001 case B_RGB16: crtc_mask = 0x07; break; /* 0x03 */ 2002 case B_RGB24: crtc_mask = 0x0f; break; /* 0x07 */ 2003 case B_RGB32: crtc_mask = 0x03; break; /* 0x01 */ 2004 default: 2005 LOG(8,("INIT: unknown color space: 0x%08x\n", target->space)); 2006 return B_ERROR; 2007 } 2008 break; 2009 // default: 2010 /* confirmed for: 2011 * TNT2, TNT2-M64, Geforce2 MX400, Geforce4 MX440, Geforce4 Ti4200, 2012 * GeforceFX 5200: if the CRTC1 (and CRTC2) BUFFER register b2 = 1 */ 2013 /* switch (target->space) 2014 { 2015 case B_CMAP8: crtc_mask = 0x1f; break; 2016 case B_RGB15: crtc_mask = 0x0f; break; 2017 case B_RGB16: crtc_mask = 0x0f; break; 2018 case B_RGB24: crtc_mask = 0x1f; break; 2019 case B_RGB32: crtc_mask = 0x07; break; 2020 default: 2021 LOG(8,("INIT: unknown color space: 0x%08x\n", target->space)); 2022 return B_ERROR; 2023 } 2024 break; 2025 */ } 2026 2027 /* set virtual_width limit for accelerated modes */ 2028 /* note: 2029 * because of the seemingly 'random' variations in these constraints we take 2030 * a reasonable 'lowest common denominator' instead of always true constraints. */ 2031 switch (si->ps.card_arch) 2032 { 2033 case NV04A: 2034 /* confirmed for: 2035 * TNT1 (NV04), TNT2 (NV05), TNT2-M64 (NV05M64) in both PIO and DMA acc mode. */ 2036 switch(target->space) 2037 { 2038 case B_CMAP8: max_acc_width = 8176; break; 2039 case B_RGB15: max_acc_width = 4088; break; 2040 case B_RGB16: max_acc_width = 4088; break; 2041 case B_RGB24: max_acc_width = 2720; break; 2042 case B_RGB32: max_acc_width = 2044; break; 2043 default: 2044 LOG(8,("INIT: unknown color space: 0x%08x\n", target->space)); 2045 return B_ERROR; 2046 } 2047 break; 2048 default: 2049 /* confirmed for: 2050 * Geforce4 Ti4200 (NV28), GeforceFX 5600 (NV31) in PIO acc mode; 2051 * Geforce2 MX400 (NV11), Geforce4 MX440 (NV18), GeforceFX 5200 (NV34) can do 2052 * 16368/8184/8184/5456/4092, so a bit better in PIO acc mode; 2053 * confirmed for: 2054 * Geforce2 MX400 (NV11), Geforce4 MX440 (NV18), GeforcePCX 5750 (NV36), 2055 * GeforcePCX 6600 GT (NV43) in DMA acc mode; 2056 * Geforce4 Ti4200 (NV28), GeforceFX 5200 (NV34) can do 2057 * 16368/8184/8184/5456/4092, so a bit better in DMA acc mode. */ 2058 switch(target->space) 2059 { 2060 case B_CMAP8: max_acc_width = 16320; break; 2061 case B_RGB15: max_acc_width = 8160; break; 2062 case B_RGB16: max_acc_width = 8160; break; 2063 case B_RGB24: max_acc_width = 5440; break; 2064 case B_RGB32: max_acc_width = 4080; break; 2065 default: 2066 LOG(8,("INIT: unknown color space: 0x%08x\n", target->space)); 2067 return B_ERROR; 2068 } 2069 break; 2070 } 2071 2072 /* set virtual_width limit for unaccelerated modes */ 2073 switch (si->ps.card_type) 2074 { 2075 default: 2076 // case NV04: 2077 /* confirmed for: 2078 * TNT1 always; 2079 * TNT2, TNT2-M64, Geforce2 MX400, Geforce4 MX440, Geforce4 Ti4200, 2080 * GeforceFX 5200: if the CRTC1 (and CRTC2) BUFFER register b2 = 0 */ 2081 /* NOTE: 2082 * Unfortunately older cards have a hardware fault that prevents use. 2083 * We need doubled granularity on those to prevent the single top line 2084 * from shifting to the left! 2085 * This is confirmed for TNT2, Geforce2 MX200, Geforce2 MX400. 2086 * Confirmed OK are: 2087 * Geforce4 MX440, Geforce4 Ti4200, GeforceFX 5200. */ 2088 switch(target->space) 2089 { 2090 case B_CMAP8: max_crtc_width = 16368; break; /* 16376 */ 2091 case B_RGB15: max_crtc_width = 8184; break; /* 8188 */ 2092 case B_RGB16: max_crtc_width = 8184; break; /* 8188 */ 2093 case B_RGB24: max_crtc_width = 5456; break; /* 5456 */ 2094 case B_RGB32: max_crtc_width = 4092; break; /* 4094 */ 2095 default: 2096 LOG(8,("INIT: unknown color space: 0x%08x\n", target->space)); 2097 return B_ERROR; 2098 } 2099 break; 2100 // default: 2101 /* confirmed for: 2102 * TNT2, TNT2-M64, Geforce2 MX400, Geforce4 MX440, Geforce4 Ti4200, 2103 * GeforceFX 5200: if the CRTC1 (and CRTC2) BUFFER register b2 = 1 */ 2104 /* switch(target->space) 2105 { 2106 case B_CMAP8: max_crtc_width = 16352; break; 2107 case B_RGB15: max_crtc_width = 8176; break; 2108 case B_RGB16: max_crtc_width = 8176; break; 2109 case B_RGB24: max_crtc_width = 5440; break; 2110 case B_RGB32: max_crtc_width = 4088; break; 2111 default: 2112 LOG(8,("INIT: unknown color space: 0x%08x\n", target->space)); 2113 return B_ERROR; 2114 } 2115 break; 2116 */ } 2117 2118 /* check for acc capability, and adjust mode to adhere to hardware constraints */ 2119 if (max_acc_width <= max_crtc_width) 2120 { 2121 /* check if we can setup this mode with acceleration */ 2122 *acc_mode = true; 2123 /* virtual_width */ 2124 if (target->virtual_width > max_acc_width) *acc_mode = false; 2125 /* virtual_height */ 2126 /* (NV cards can even do more than this(?)... 2127 * but 4096 is confirmed on all cards at max. accelerated width.) */ 2128 if (target->virtual_height > 4096) *acc_mode = false; 2129 2130 /* now check virtual_size based on CRTC constraints */ 2131 if (target->virtual_width > max_crtc_width) target->virtual_width = max_crtc_width; 2132 /* virtual_height: The only constraint here is the cards memory size which is 2133 * checked later on in ProposeMode: virtual_height is adjusted then if needed. 2134 * 'Limiting here' to the variable size that's at least available (uint16). */ 2135 if (target->virtual_height > 65535) target->virtual_height = 65535; 2136 2137 /* OK, now we know that virtual_width is valid, and it's needing no slopspace if 2138 * it was confined above, so we can finally calculate safely if we need slopspace 2139 * for this mode... */ 2140 if (*acc_mode) 2141 { 2142 /* the mode needs to adhere to the largest granularity imposed... */ 2143 if (acc_mask < crtc_mask) 2144 video_pitch = ((target->virtual_width + crtc_mask) & ~crtc_mask); 2145 else 2146 video_pitch = ((target->virtual_width + acc_mask) & ~acc_mask); 2147 } 2148 else /* unaccelerated mode */ 2149 video_pitch = ((target->virtual_width + crtc_mask) & ~crtc_mask); 2150 } 2151 else /* max_acc_width > max_crtc_width */ 2152 { 2153 /* check if we can setup this mode with acceleration */ 2154 *acc_mode = true; 2155 /* (we already know virtual_width will be no problem) */ 2156 /* virtual_height */ 2157 /* (NV cards can even do more than this(?)... 2158 * but 4096 is confirmed on all cards at max. accelerated width.) */ 2159 if (target->virtual_height > 4096) *acc_mode = false; 2160 2161 /* now check virtual_size based on CRTC constraints */ 2162 if (*acc_mode) 2163 { 2164 /* note that max_crtc_width already adheres to crtc_mask */ 2165 if (target->virtual_width > (max_crtc_width & ~acc_mask)) 2166 target->virtual_width = (max_crtc_width & ~acc_mask); 2167 } 2168 else /* unaccelerated mode */ 2169 { 2170 if (target->virtual_width > max_crtc_width) 2171 target->virtual_width = max_crtc_width; 2172 } 2173 /* virtual_height: The only constraint here is the cards memory size which is 2174 * checked later on in ProposeMode: virtual_height is adjusted then if needed. 2175 * 'Limiting here' to the variable size that's at least available (uint16). */ 2176 if (target->virtual_height > 65535) target->virtual_height = 65535; 2177 2178 /* OK, now we know that virtual_width is valid, and it's needing no slopspace if 2179 * it was confined above, so we can finally calculate safely if we need slopspace 2180 * for this mode... */ 2181 if (*acc_mode) 2182 { 2183 /* the mode needs to adhere to the largest granularity imposed... */ 2184 if (acc_mask < crtc_mask) 2185 video_pitch = ((target->virtual_width + crtc_mask) & ~crtc_mask); 2186 else 2187 video_pitch = ((target->virtual_width + acc_mask) & ~acc_mask); 2188 } 2189 else /* unaccelerated mode */ 2190 video_pitch = ((target->virtual_width + crtc_mask) & ~crtc_mask); 2191 } 2192 2193 LOG(2,("INIT: memory pitch will be set to %d pixels for colorspace 0x%08x\n", 2194 video_pitch, target->space)); 2195 if (target->virtual_width != video_pitch) 2196 LOG(2,("INIT: effective mode slopspace is %d pixels\n", 2197 (video_pitch - target->virtual_width))); 2198 2199 /* now calculate bytes_per_row for this mode */ 2200 *bytes_per_row = video_pitch * (depth >> 3); 2201 2202 return B_OK; 2203 } 2204