1 /* Authors: 2 Mark Watson 12/1999, 3 Apsed, 4 Rudolf Cornelissen 10/2002-4/2006 5 */ 6 7 #define MODULE_BIT 0x00008000 8 9 #include "nv_std.h" 10 11 static status_t test_ram(void); 12 static status_t nvxx_general_powerup (void); 13 static void unlock_card(void); 14 static status_t nv_general_bios_to_powergraphics(void); 15 16 static void nv_dump_configuration_space (void) 17 { 18 #define DUMP_CFG(reg, type) if (si->ps.card_type >= type) do { \ 19 uint32 value = CFGR(reg); \ 20 MSG(("configuration_space 0x%02x %20s 0x%08x\n", \ 21 NVCFG_##reg, #reg, value)); \ 22 } while (0) 23 DUMP_CFG (DEVID, 0); 24 DUMP_CFG (DEVCTRL, 0); 25 DUMP_CFG (CLASS, 0); 26 DUMP_CFG (HEADER, 0); 27 DUMP_CFG (BASE1REGS,0); 28 DUMP_CFG (BASE2FB, 0); 29 DUMP_CFG (BASE3, 0); 30 DUMP_CFG (BASE4, 0); 31 DUMP_CFG (BASE5, 0); 32 DUMP_CFG (BASE6, 0); 33 DUMP_CFG (BASE7, 0); 34 DUMP_CFG (SUBSYSID1,0); 35 DUMP_CFG (ROMBASE, 0); 36 DUMP_CFG (CAPPTR, 0); 37 DUMP_CFG (CFG_1, 0); 38 DUMP_CFG (INTERRUPT,0); 39 DUMP_CFG (SUBSYSID2,0); 40 DUMP_CFG (AGPREF, 0); 41 DUMP_CFG (AGPSTAT, 0); 42 DUMP_CFG (AGPCMD, 0); 43 DUMP_CFG (ROMSHADOW,0); 44 DUMP_CFG (VGA, 0); 45 DUMP_CFG (SCHRATCH, 0); 46 DUMP_CFG (CFG_10, 0); 47 DUMP_CFG (CFG_11, 0); 48 DUMP_CFG (CFG_12, 0); 49 DUMP_CFG (CFG_13, 0); 50 DUMP_CFG (CFG_14, 0); 51 DUMP_CFG (CFG_15, 0); 52 DUMP_CFG (CFG_16, 0); 53 DUMP_CFG (PCIEREF, 0); 54 DUMP_CFG (PCIEDCAP, 0); 55 DUMP_CFG (PCIEDCTST,0); 56 DUMP_CFG (PCIELCAP, 0); 57 DUMP_CFG (PCIELCTST,0); 58 DUMP_CFG (CFG_22, 0); 59 DUMP_CFG (CFG_23, 0); 60 DUMP_CFG (CFG_24, 0); 61 DUMP_CFG (CFG_25, 0); 62 DUMP_CFG (CFG_26, 0); 63 DUMP_CFG (CFG_27, 0); 64 DUMP_CFG (CFG_28, 0); 65 DUMP_CFG (CFG_29, 0); 66 DUMP_CFG (CFG_30, 0); 67 DUMP_CFG (CFG_31, 0); 68 DUMP_CFG (CFG_32, 0); 69 DUMP_CFG (CFG_33, 0); 70 DUMP_CFG (CFG_34, 0); 71 DUMP_CFG (CFG_35, 0); 72 DUMP_CFG (CFG_36, 0); 73 DUMP_CFG (CFG_37, 0); 74 DUMP_CFG (CFG_38, 0); 75 DUMP_CFG (CFG_39, 0); 76 DUMP_CFG (CFG_40, 0); 77 DUMP_CFG (CFG_41, 0); 78 DUMP_CFG (CFG_42, 0); 79 DUMP_CFG (CFG_43, 0); 80 DUMP_CFG (CFG_44, 0); 81 DUMP_CFG (CFG_45, 0); 82 DUMP_CFG (CFG_46, 0); 83 DUMP_CFG (CFG_47, 0); 84 DUMP_CFG (CFG_48, 0); 85 DUMP_CFG (CFG_49, 0); 86 DUMP_CFG (CFG_50, 0); 87 #undef DUMP_CFG 88 } 89 90 status_t nv_general_powerup() 91 { 92 status_t status; 93 94 LOG(1,("POWERUP: Haiku nVidia Accelerant 0.81 running.\n")); 95 96 /* log VBLANK INT usability status */ 97 if (si->ps.int_assigned) 98 LOG(4,("POWERUP: Usable INT assigned to HW; Vblank semaphore enabled\n")); 99 else 100 LOG(4,("POWERUP: No (usable) INT assigned to HW; Vblank semaphore disabled\n")); 101 102 /* preset no laptop */ 103 si->ps.laptop = false; 104 105 /* WARNING: 106 * _adi.name_ and _adi.chipset_ can contain 31 readable characters max.!!! */ 107 108 /* detect card type and power it up */ 109 switch(CFGR(DEVID)) 110 { 111 /* Vendor Nvidia */ 112 case 0x002010de: /* Nvidia TNT1 */ 113 si->ps.card_type = NV04; 114 si->ps.card_arch = NV04A; 115 sprintf(si->adi.name, "Nvidia TNT1"); 116 sprintf(si->adi.chipset, "NV04"); 117 status = nvxx_general_powerup(); 118 break; 119 case 0x002810de: /* Nvidia TNT2 (pro) */ 120 case 0x002910de: /* Nvidia TNT2 Ultra */ 121 case 0x002a10de: /* Nvidia TNT2 */ 122 case 0x002b10de: /* Nvidia TNT2 */ 123 si->ps.card_type = NV05; 124 si->ps.card_arch = NV04A; 125 sprintf(si->adi.name, "Nvidia TNT2"); 126 sprintf(si->adi.chipset, "NV05"); 127 status = nvxx_general_powerup(); 128 break; 129 case 0x002c10de: /* Nvidia Vanta (Lt) */ 130 si->ps.card_type = NV05; 131 si->ps.card_arch = NV04A; 132 sprintf(si->adi.name, "Nvidia Vanta (Lt)"); 133 sprintf(si->adi.chipset, "NV05"); 134 status = nvxx_general_powerup(); 135 break; 136 case 0x002d10de: /* Nvidia TNT2-M64 (Pro) */ 137 si->ps.card_type = NV05M64; 138 si->ps.card_arch = NV04A; 139 sprintf(si->adi.name, "Nvidia TNT2-M64 (Pro)"); 140 sprintf(si->adi.chipset, "NV05 model 64"); 141 status = nvxx_general_powerup(); 142 break; 143 case 0x002e10de: /* Nvidia NV06 Vanta */ 144 case 0x002f10de: /* Nvidia NV06 Vanta */ 145 si->ps.card_type = NV06; 146 si->ps.card_arch = NV04A; 147 sprintf(si->adi.name, "Nvidia Vanta"); 148 sprintf(si->adi.chipset, "NV06"); 149 status = nvxx_general_powerup(); 150 break; 151 case 0x004010de: /* Nvidia GeForce FX 6800 Ultra */ 152 case 0x004110de: /* Nvidia GeForce FX 6800 */ 153 case 0x004210de: /* Nvidia GeForce FX 6800LE */ 154 si->ps.card_type = NV40; 155 si->ps.card_arch = NV40A; 156 sprintf(si->adi.name, "Nvidia GeForce FX 6800"); 157 sprintf(si->adi.chipset, "NV40"); 158 status = nvxx_general_powerup(); 159 break; 160 case 0x004310de: /* Nvidia unknown FX */ 161 si->ps.card_type = NV40; 162 si->ps.card_arch = NV40A; 163 sprintf(si->adi.name, "Nvidia unknown FX"); 164 sprintf(si->adi.chipset, "NV40"); 165 status = nvxx_general_powerup(); 166 break; 167 case 0x004510de: /* Nvidia GeForce FX 6800 GT */ 168 case 0x004610de: /* Nvidia GeForce FX 6800 GT */ 169 case 0x004810de: /* Nvidia GeForce FX 6800 XT */ 170 si->ps.card_type = NV40; 171 si->ps.card_arch = NV40A; 172 sprintf(si->adi.name, "Nvidia GeForce FX 6800"); 173 sprintf(si->adi.chipset, "NV40"); 174 status = nvxx_general_powerup(); 175 break; 176 case 0x004910de: /* Nvidia unknown FX */ 177 si->ps.card_type = NV40; 178 si->ps.card_arch = NV40A; 179 sprintf(si->adi.name, "Nvidia unknown FX"); 180 sprintf(si->adi.chipset, "NV40"); 181 status = nvxx_general_powerup(); 182 break; 183 case 0x004d10de: /* Nvidia Quadro FX 4400 */ 184 case 0x004e10de: /* Nvidia Quadro FX 4000 */ 185 si->ps.card_type = NV40; 186 si->ps.card_arch = NV40A; 187 sprintf(si->adi.name, "Nvidia Quadro FX 4000/4400"); 188 sprintf(si->adi.chipset, "NV40"); 189 status = nvxx_general_powerup(); 190 break; 191 case 0x009110de: /* Nvidia GeForce 7800 GTX PCIe */ 192 case 0x009210de: /* Nvidia Geforce 7800 GT PCIe */ 193 si->ps.card_type = G70; 194 si->ps.card_arch = NV40A; 195 sprintf(si->adi.name, "Nvidia Geforce 7800 GT PCIe"); 196 sprintf(si->adi.chipset, "G70"); 197 status = nvxx_general_powerup(); 198 break; 199 case 0x009810de: /* Nvidia Geforce 7800 Go PCIe */ 200 case 0x009910de: /* Nvidia Geforce 7800 GTX Go PCIe */ 201 si->ps.card_type = G70; 202 si->ps.card_arch = NV40A; 203 si->ps.laptop = true; 204 sprintf(si->adi.name, "Nvidia Geforce 7800 GTX Go PCIe"); 205 sprintf(si->adi.chipset, "G70"); 206 status = nvxx_general_powerup(); 207 break; 208 case 0x009d10de: /* Nvidia Quadro FX 4500 */ 209 si->ps.card_type = G70; 210 si->ps.card_arch = NV40A; 211 sprintf(si->adi.name, "Nvidia Quadro FX 4500"); 212 sprintf(si->adi.chipset, "G70"); 213 status = nvxx_general_powerup(); 214 break; 215 case 0x00a010de: /* Nvidia Aladdin TNT2 */ 216 si->ps.card_type = NV05; 217 si->ps.card_arch = NV04A; 218 sprintf(si->adi.name, "Nvidia Aladdin TNT2"); 219 sprintf(si->adi.chipset, "NV05"); 220 status = nvxx_general_powerup(); 221 break; 222 case 0x00c010de: /* Nvidia unknown FX */ 223 si->ps.card_type = NV41; 224 si->ps.card_arch = NV40A; 225 sprintf(si->adi.name, "Nvidia unknown FX"); 226 sprintf(si->adi.chipset, "NV41"); 227 status = nvxx_general_powerup(); 228 break; 229 case 0x00c110de: /* Nvidia GeForce FX 6800 */ 230 case 0x00c210de: /* Nvidia GeForce FX 6800LE */ 231 case 0x00c310de: /* Nvidia GeForce FX 6800 XT */ 232 si->ps.card_type = NV41; 233 si->ps.card_arch = NV40A; 234 sprintf(si->adi.name, "Nvidia GeForce FX 6800"); 235 sprintf(si->adi.chipset, "NV41"); 236 status = nvxx_general_powerup(); 237 break; 238 case 0x00c810de: /* Nvidia GeForce FX 6800 Go */ 239 case 0x00c910de: /* Nvidia GeForce FX 6800 Ultra Go */ 240 si->ps.card_type = NV41; 241 si->ps.card_arch = NV40A; 242 si->ps.laptop = true; 243 sprintf(si->adi.name, "Nvidia GeForce FX 6800 Go"); 244 sprintf(si->adi.chipset, "NV41"); 245 status = nvxx_general_powerup(); 246 break; 247 case 0x00cc10de: /* Nvidia Quadro FX 1400 Go */ 248 si->ps.card_type = NV41; 249 si->ps.card_arch = NV40A; 250 si->ps.laptop = true; 251 sprintf(si->adi.name, "Nvidia Quadro FX 1400 Go"); 252 sprintf(si->adi.chipset, "NV41"); 253 status = nvxx_general_powerup(); 254 break; 255 case 0x00cd10de: /* Nvidia Quadro FX 3450/4000 SDI */ 256 si->ps.card_type = NV41; 257 si->ps.card_arch = NV40A; 258 sprintf(si->adi.name, "Nvidia Quadro FX 3450/4000 SDI"); 259 sprintf(si->adi.chipset, "NV41"); 260 status = nvxx_general_powerup(); 261 break; 262 case 0x00ce10de: /* Nvidia Quadro FX 1400 */ 263 si->ps.card_type = NV41; 264 si->ps.card_arch = NV40A; 265 sprintf(si->adi.name, "Nvidia Quadro FX 1400"); 266 sprintf(si->adi.chipset, "NV41"); 267 status = nvxx_general_powerup(); 268 break; 269 case 0x00f010de: /* Nvidia GeForce FX 6800 (Ultra) AGP(?) */ 270 si->ps.card_type = NV40; 271 si->ps.card_arch = NV40A; 272 sprintf(si->adi.name, "Nvidia GeForce FX 6800 AGP(?)"); 273 sprintf(si->adi.chipset, "NV40(?)"); 274 status = nvxx_general_powerup(); 275 break; 276 case 0x00f110de: /* Nvidia GeForce FX 6600 GT AGP */ 277 case 0x00f210de: /* Nvidia GeForce FX 6600 AGP */ 278 si->ps.card_type = NV43; 279 si->ps.card_arch = NV40A; 280 sprintf(si->adi.name, "Nvidia GeForce FX 6600 (GT) AGP"); 281 sprintf(si->adi.chipset, "NV43"); 282 status = nvxx_general_powerup(); 283 break; 284 case 0x00f310de: /* Nvidia GeForce 6200 */ 285 si->ps.card_type = NV44; 286 si->ps.card_arch = NV40A; 287 sprintf(si->adi.name, "Nvidia GeForce 6200"); 288 sprintf(si->adi.chipset, "NV44"); 289 status = nvxx_general_powerup(); 290 break; 291 case 0x00f510de: /* Nvidia GeForce FX 7800 GS AGP */ 292 si->ps.card_type = G70; 293 si->ps.card_arch = NV40A; 294 sprintf(si->adi.name, "Nvidia GeForce 7800 GS AGP"); 295 sprintf(si->adi.chipset, "G70"); 296 status = nvxx_general_powerup(); 297 break; 298 case 0x00f810de: /* Nvidia Quadro FX 3400/4400 PCIe */ 299 si->ps.card_type = NV45; 300 si->ps.card_arch = NV40A; 301 sprintf(si->adi.name, "Nvidia Quadro FX 3400 PCIe"); 302 sprintf(si->adi.chipset, "NV45"); 303 status = nvxx_general_powerup(); 304 break; 305 case 0x00f910de: /* Nvidia GeForce PCX 6800 PCIe */ 306 si->ps.card_type = NV45; 307 si->ps.card_arch = NV40A; 308 sprintf(si->adi.name, "Nvidia GeForce PCX 6800 PCIe"); 309 sprintf(si->adi.chipset, "NV45"); 310 status = nvxx_general_powerup(); 311 break; 312 case 0x00fa10de: /* Nvidia GeForce PCX 5750 PCIe */ 313 si->ps.card_type = NV36; 314 si->ps.card_arch = NV30A; 315 sprintf(si->adi.name, "Nvidia GeForce PCX 5750 PCIe"); 316 sprintf(si->adi.chipset, "NV36"); 317 status = nvxx_general_powerup(); 318 break; 319 case 0x00fb10de: /* Nvidia GeForce PCX 5900 PCIe */ 320 si->ps.card_type = NV35; 321 si->ps.card_arch = NV30A; 322 sprintf(si->adi.name, "Nvidia GeForce PCX 5900 PCIe"); 323 sprintf(si->adi.chipset, "NV35(?)"); 324 status = nvxx_general_powerup(); 325 break; 326 case 0x00fc10de: /* Nvidia GeForce PCX 5300 PCIe */ 327 si->ps.card_type = NV34; 328 si->ps.card_arch = NV30A; 329 sprintf(si->adi.name, "Nvidia GeForce PCX 5300 PCIe"); 330 sprintf(si->adi.chipset, "NV34"); 331 status = nvxx_general_powerup(); 332 break; 333 case 0x00fd10de: /* Nvidia Quadro PCX PCIe */ 334 si->ps.card_type = NV45; 335 si->ps.card_arch = NV40A; 336 sprintf(si->adi.name, "Nvidia Quadro PCX PCIe"); 337 sprintf(si->adi.chipset, "NV45"); 338 status = nvxx_general_powerup(); 339 break; 340 case 0x00fe10de: /* Nvidia Quadro FX 1300 PCIe(?) */ 341 si->ps.card_type = NV36; 342 si->ps.card_arch = NV30A; 343 sprintf(si->adi.name, "Nvidia Quadro FX 1300 PCIe(?)"); 344 sprintf(si->adi.chipset, "NV36(?)"); 345 status = nvxx_general_powerup(); 346 break; 347 case 0x00ff10de: /* Nvidia GeForce PCX 4300 PCIe */ 348 si->ps.card_type = NV18; 349 si->ps.card_arch = NV10A; 350 sprintf(si->adi.name, "Nvidia GeForce PCX 4300 PCIe"); 351 sprintf(si->adi.chipset, "NV18"); 352 status = nvxx_general_powerup(); 353 break; 354 case 0x010010de: /* Nvidia GeForce256 SDR */ 355 case 0x010110de: /* Nvidia GeForce256 DDR */ 356 case 0x010210de: /* Nvidia GeForce256 Ultra */ 357 si->ps.card_type = NV10; 358 si->ps.card_arch = NV10A; 359 sprintf(si->adi.name, "Nvidia GeForce256"); 360 sprintf(si->adi.chipset, "NV10"); 361 status = nvxx_general_powerup(); 362 break; 363 case 0x010310de: /* Nvidia Quadro */ 364 si->ps.card_type = NV10; 365 si->ps.card_arch = NV10A; 366 sprintf(si->adi.name, "Nvidia Quadro"); 367 sprintf(si->adi.chipset, "NV10"); 368 status = nvxx_general_powerup(); 369 break; 370 case 0x011010de: /* Nvidia GeForce2 MX/MX400 */ 371 case 0x011110de: /* Nvidia GeForce2 MX100/MX200 DDR */ 372 si->ps.card_type = NV11; 373 si->ps.card_arch = NV10A; 374 sprintf(si->adi.name, "Nvidia GeForce2 MX"); 375 sprintf(si->adi.chipset, "NV11"); 376 status = nvxx_general_powerup(); 377 break; 378 case 0x011210de: /* Nvidia GeForce2 Go */ 379 si->ps.card_type = NV11; 380 si->ps.card_arch = NV10A; 381 si->ps.laptop = true; 382 sprintf(si->adi.name, "Nvidia GeForce2 Go"); 383 sprintf(si->adi.chipset, "NV11"); 384 status = nvxx_general_powerup(); 385 break; 386 case 0x011310de: /* Nvidia Quadro2 MXR/EX/Go */ 387 si->ps.card_type = NV11; 388 si->ps.card_arch = NV10A; 389 sprintf(si->adi.name, "Nvidia Quadro2 MXR/EX/Go"); 390 sprintf(si->adi.chipset, "NV11"); 391 status = nvxx_general_powerup(); 392 break; 393 case 0x014010de: /* Nvidia GeForce FX 6600 GT */ 394 case 0x014110de: /* Nvidia GeForce FX 6600 */ 395 case 0x014210de: /* Nvidia GeForce FX 6600LE */ 396 si->ps.card_type = NV43; 397 si->ps.card_arch = NV40A; 398 sprintf(si->adi.name, "Nvidia GeForce FX 6600"); 399 sprintf(si->adi.chipset, "NV43"); 400 status = nvxx_general_powerup(); 401 break; 402 case 0x014310de: /* Nvidia unknown FX */ 403 si->ps.card_type = NV43; 404 si->ps.card_arch = NV40A; 405 sprintf(si->adi.name, "Nvidia unknown FX"); 406 sprintf(si->adi.chipset, "NV43"); 407 status = nvxx_general_powerup(); 408 break; 409 case 0x014410de: /* Nvidia GeForce FX 6600 Go */ 410 si->ps.card_type = NV43; 411 si->ps.card_arch = NV40A; 412 si->ps.laptop = true; 413 sprintf(si->adi.name, "Nvidia GeForce FX 6600 Go"); 414 sprintf(si->adi.chipset, "NV43"); 415 status = nvxx_general_powerup(); 416 break; 417 case 0x014510de: /* Nvidia GeForce FX 6610 XL */ 418 si->ps.card_type = NV43; 419 si->ps.card_arch = NV40A; 420 sprintf(si->adi.name, "Nvidia GeForce FX 6610 XL"); 421 sprintf(si->adi.chipset, "NV43"); 422 status = nvxx_general_powerup(); 423 break; 424 case 0x014710de: /* Nvidia GeForce FX 6700 XL */ 425 si->ps.card_type = NV43; 426 si->ps.card_arch = NV40A; 427 sprintf(si->adi.name, "Nvidia GeForce FX 6700 XL"); 428 sprintf(si->adi.chipset, "NV43"); 429 status = nvxx_general_powerup(); 430 break; 431 case 0x014610de: /* Nvidia GeForce FX 6600 TE Go / 6200 TE Go */ 432 case 0x014810de: /* Nvidia GeForce FX 6600 Go */ 433 case 0x014910de: /* Nvidia GeForce FX 6600 GT Go */ 434 si->ps.card_type = NV43; 435 si->ps.card_arch = NV40A; 436 si->ps.laptop = true; 437 sprintf(si->adi.name, "Nvidia GeForce FX 6600Go/6200Go"); 438 sprintf(si->adi.chipset, "NV43"); 439 status = nvxx_general_powerup(); 440 break; 441 case 0x014b10de: /* Nvidia unknown FX */ 442 case 0x014c10de: /* Nvidia unknown FX */ 443 case 0x014d10de: /* Nvidia unknown FX */ 444 si->ps.card_type = NV43; 445 si->ps.card_arch = NV40A; 446 sprintf(si->adi.name, "Nvidia unknown FX"); 447 sprintf(si->adi.chipset, "NV43"); 448 status = nvxx_general_powerup(); 449 break; 450 case 0x014e10de: /* Nvidia Quadro FX 540 */ 451 si->ps.card_type = NV43; 452 si->ps.card_arch = NV40A; 453 sprintf(si->adi.name, "Nvidia Quadro FX 540"); 454 sprintf(si->adi.chipset, "NV43"); 455 status = nvxx_general_powerup(); 456 break; 457 case 0x014f10de: /* Nvidia GeForce 6200 PCIe (128Mb) */ 458 si->ps.card_type = NV44; 459 si->ps.card_arch = NV40A; 460 sprintf(si->adi.name, "Nvidia GeForce 6200 PCIe 128Mb"); 461 sprintf(si->adi.chipset, "NV44"); 462 status = nvxx_general_powerup(); 463 break; 464 case 0x015010de: /* Nvidia GeForce2 GTS/Pro */ 465 case 0x015110de: /* Nvidia GeForce2 Ti DDR */ 466 case 0x015210de: /* Nvidia GeForce2 Ultra */ 467 si->ps.card_type = NV15; 468 si->ps.card_arch = NV10A; 469 sprintf(si->adi.name, "Nvidia GeForce2"); 470 sprintf(si->adi.chipset, "NV15"); 471 status = nvxx_general_powerup(); 472 break; 473 case 0x015310de: /* Nvidia Quadro2 Pro */ 474 si->ps.card_type = NV15; 475 si->ps.card_arch = NV10A; 476 sprintf(si->adi.name, "Nvidia Quadro2 Pro"); 477 sprintf(si->adi.chipset, "NV15"); 478 status = nvxx_general_powerup(); 479 break; 480 case 0x016010de: /* Nvidia GeForce 6500 Go */ 481 si->ps.card_type = NV44; 482 si->ps.card_arch = NV40A; 483 si->ps.laptop = true; 484 sprintf(si->adi.name, "Nvidia GeForce 6500 Go"); 485 sprintf(si->adi.chipset, "NV44"); 486 status = nvxx_general_powerup(); 487 break; 488 case 0x016110de: /* Nvidia GeForce 6200 TurboCache */ 489 si->ps.card_type = NV44; 490 si->ps.card_arch = NV40A; 491 sprintf(si->adi.name, "Nvidia GeForce 6200 TC"); 492 sprintf(si->adi.chipset, "NV44"); 493 status = nvxx_general_powerup(); 494 break; 495 case 0x016210de: /* Nvidia GeForce 6200SE TurboCache */ 496 si->ps.card_type = NV44; 497 si->ps.card_arch = NV40A; 498 sprintf(si->adi.name, "Nvidia GeForce 6200SE TC"); 499 sprintf(si->adi.chipset, "NV44"); 500 status = nvxx_general_powerup(); 501 break; 502 case 0x016310de: /* Nvidia GeForce 6200LE */ 503 si->ps.card_type = NV44; 504 si->ps.card_arch = NV40A; 505 sprintf(si->adi.name, "Nvidia GeForce 6200LE"); 506 sprintf(si->adi.chipset, "NV44"); 507 status = nvxx_general_powerup(); 508 break; 509 case 0x016410de: /* Nvidia GeForce FX 6200 Go */ 510 si->ps.card_type = NV44; 511 si->ps.card_arch = NV40A; 512 si->ps.laptop = true; 513 sprintf(si->adi.name, "Nvidia GeForce FX 6200 Go"); 514 sprintf(si->adi.chipset, "NV44"); 515 status = nvxx_general_powerup(); 516 break; 517 case 0x016510de: /* Nvidia Quadro FX NVS 285 */ 518 si->ps.card_type = NV44; 519 si->ps.card_arch = NV40A; 520 sprintf(si->adi.name, "Nvidia Quadro FX NVS 285"); 521 sprintf(si->adi.chipset, "NV44"); 522 status = nvxx_general_powerup(); 523 break; 524 case 0x016610de: /* Nvidia GeForce 6400 Go */ 525 si->ps.card_type = NV44; 526 si->ps.card_arch = NV40A; 527 si->ps.laptop = true; 528 sprintf(si->adi.name, "Nvidia GeForce 6400 Go"); 529 sprintf(si->adi.chipset, "NV44"); 530 status = nvxx_general_powerup(); 531 break; 532 case 0x016710de: /* Nvidia GeForce 6200 Go */ 533 si->ps.card_type = NV44; 534 si->ps.card_arch = NV40A; 535 si->ps.laptop = true; 536 sprintf(si->adi.name, "Nvidia GeForce 6200 Go"); 537 sprintf(si->adi.chipset, "NV44"); 538 status = nvxx_general_powerup(); 539 break; 540 case 0x016810de: /* Nvidia GeForce 6400 Go */ 541 si->ps.card_type = NV44; 542 si->ps.card_arch = NV40A; 543 si->ps.laptop = true; 544 sprintf(si->adi.name, "Nvidia GeForce 6400 Go"); 545 sprintf(si->adi.chipset, "NV44"); 546 status = nvxx_general_powerup(); 547 break; 548 case 0x016910de: /* Nvidia GeForce 6250 Go */ 549 si->ps.card_type = NV44; 550 si->ps.card_arch = NV40A; 551 si->ps.laptop = true; 552 sprintf(si->adi.name, "Nvidia GeForce 6250 Go"); 553 sprintf(si->adi.chipset, "NV44"); 554 status = nvxx_general_powerup(); 555 break; 556 case 0x016b10de: /* Nvidia unknown FX Go */ 557 case 0x016c10de: /* Nvidia unknown FX Go */ 558 case 0x016d10de: /* Nvidia unknown FX Go */ 559 si->ps.card_type = NV44; 560 si->ps.card_arch = NV40A; 561 si->ps.laptop = true; 562 sprintf(si->adi.name, "Nvidia unknown FX Go"); 563 sprintf(si->adi.chipset, "NV44"); 564 status = nvxx_general_powerup(); 565 break; 566 case 0x016e10de: /* Nvidia unknown FX */ 567 si->ps.card_type = NV44; 568 si->ps.card_arch = NV40A; 569 sprintf(si->adi.name, "Nvidia unknown FX"); 570 sprintf(si->adi.chipset, "NV44"); 571 status = nvxx_general_powerup(); 572 break; 573 case 0x017010de: /* Nvidia GeForce4 MX 460 */ 574 case 0x017110de: /* Nvidia GeForce4 MX 440 */ 575 case 0x017210de: /* Nvidia GeForce4 MX 420 */ 576 case 0x017310de: /* Nvidia GeForce4 MX 440SE */ 577 si->ps.card_type = NV17; 578 si->ps.card_arch = NV10A; 579 sprintf(si->adi.name, "Nvidia GeForce4 MX"); 580 sprintf(si->adi.chipset, "NV17"); 581 status = nvxx_general_powerup(); 582 break; 583 case 0x017410de: /* Nvidia GeForce4 440 Go */ 584 case 0x017510de: /* Nvidia GeForce4 420 Go */ 585 case 0x017610de: /* Nvidia GeForce4 420 Go 32M */ 586 case 0x017710de: /* Nvidia GeForce4 460 Go */ 587 case 0x017910de: /* Nvidia GeForce4 440 Go 64M (on PPC GeForce4 MX) */ 588 si->ps.card_type = NV17; 589 si->ps.card_arch = NV10A; 590 si->ps.laptop = true; 591 sprintf(si->adi.name, "Nvidia GeForce4 Go"); 592 sprintf(si->adi.chipset, "NV17"); 593 status = nvxx_general_powerup(); 594 break; 595 case 0x017810de: /* Nvidia Quadro4 500 XGL/550 XGL */ 596 case 0x017a10de: /* Nvidia Quadro4 200 NVS/400 NVS */ 597 si->ps.card_type = NV17; 598 si->ps.card_arch = NV10A; 599 sprintf(si->adi.name, "Nvidia Quadro4"); 600 sprintf(si->adi.chipset, "NV17"); 601 status = nvxx_general_powerup(); 602 break; 603 case 0x017c10de: /* Nvidia Quadro4 500 GoGL */ 604 si->ps.card_type = NV17; 605 si->ps.card_arch = NV10A; 606 si->ps.laptop = true; 607 sprintf(si->adi.name, "Nvidia Quadro4 500 GoGL"); 608 sprintf(si->adi.chipset, "NV17"); 609 status = nvxx_general_powerup(); 610 break; 611 case 0x017d10de: /* Nvidia GeForce4 410 Go 16M*/ 612 si->ps.card_type = NV17; 613 si->ps.card_arch = NV10A; 614 si->ps.laptop = true; 615 sprintf(si->adi.name, "Nvidia GeForce4 410 Go"); 616 sprintf(si->adi.chipset, "NV17"); 617 status = nvxx_general_powerup(); 618 break; 619 case 0x018110de: /* Nvidia GeForce4 MX 440 AGP8X */ 620 case 0x018210de: /* Nvidia GeForce4 MX 440SE AGP8X */ 621 case 0x018310de: /* Nvidia GeForce4 MX 420 AGP8X */ 622 case 0x018510de: /* Nvidia GeForce4 MX 4000 AGP8X */ 623 si->ps.card_type = NV18; 624 si->ps.card_arch = NV10A; 625 sprintf(si->adi.name, "Nvidia GeForce4 MX AGP8X"); 626 sprintf(si->adi.chipset, "NV18"); 627 status = nvxx_general_powerup(); 628 break; 629 case 0x018610de: /* Nvidia GeForce4 448 Go */ 630 case 0x018710de: /* Nvidia GeForce4 488 Go */ 631 si->ps.card_type = NV18; 632 si->ps.card_arch = NV10A; 633 si->ps.laptop = true; 634 sprintf(si->adi.name, "Nvidia GeForce4 Go"); 635 sprintf(si->adi.chipset, "NV18"); 636 status = nvxx_general_powerup(); 637 break; 638 case 0x018810de: /* Nvidia Quadro4 580 XGL */ 639 si->ps.card_type = NV18; 640 si->ps.card_arch = NV10A; 641 sprintf(si->adi.name, "Nvidia Quadro4"); 642 sprintf(si->adi.chipset, "NV18"); 643 status = nvxx_general_powerup(); 644 break; 645 case 0x018910de: /* Nvidia GeForce4 MX AGP8X (PPC) */ 646 si->ps.card_type = NV18; 647 si->ps.card_arch = NV10A; 648 sprintf(si->adi.name, "Nvidia GeForce4 MX AGP8X"); 649 sprintf(si->adi.chipset, "NV18"); 650 status = nvxx_general_powerup(); 651 break; 652 case 0x018a10de: /* Nvidia Quadro4 280 NVS AGP8X */ 653 case 0x018b10de: /* Nvidia Quadro4 380 XGL */ 654 case 0x018c10de: /* Nvidia Quadro4 NVS 50 PCI */ 655 si->ps.card_type = NV18; 656 si->ps.card_arch = NV10A; 657 sprintf(si->adi.name, "Nvidia Quadro4"); 658 sprintf(si->adi.chipset, "NV18"); 659 status = nvxx_general_powerup(); 660 break; 661 case 0x018d10de: /* Nvidia GeForce4 448 Go */ 662 si->ps.card_type = NV18; 663 si->ps.card_arch = NV10A; 664 si->ps.laptop = true; 665 sprintf(si->adi.name, "Nvidia GeForce4 Go"); 666 sprintf(si->adi.chipset, "NV18"); 667 status = nvxx_general_powerup(); 668 break; 669 case 0x01a010de: /* Nvidia GeForce2 Integrated GPU */ 670 si->ps.card_type = NV11; 671 si->ps.card_arch = NV10A; 672 sprintf(si->adi.name, "Nvidia GeForce2 Integrated GPU"); 673 sprintf(si->adi.chipset, "CRUSH, NV11"); 674 status = nvxx_general_powerup(); 675 break; 676 case 0x01d110de: /* Nvidia GeForce 7300 LE */ 677 case 0x01df10de: /* Nvidia GeForce 7300 GS */ 678 si->ps.card_type = G72; 679 si->ps.card_arch = NV40A; 680 sprintf(si->adi.name, "Nvidia GeForce 7300"); 681 sprintf(si->adi.chipset, "G72"); 682 status = nvxx_general_powerup(); 683 break; 684 case 0x01f010de: /* Nvidia GeForce4 MX Integrated GPU */ 685 si->ps.card_type = NV17; 686 si->ps.card_arch = NV10A; 687 sprintf(si->adi.name, "Nvidia GeForce4 MX Integr. GPU"); 688 sprintf(si->adi.chipset, "NFORCE2, NV17"); 689 status = nvxx_general_powerup(); 690 break; 691 case 0x020010de: /* Nvidia GeForce3 */ 692 case 0x020110de: /* Nvidia GeForce3 Ti 200 */ 693 case 0x020210de: /* Nvidia GeForce3 Ti 500 */ 694 si->ps.card_type = NV20; 695 si->ps.card_arch = NV20A; 696 sprintf(si->adi.name, "Nvidia GeForce3"); 697 sprintf(si->adi.chipset, "NV20"); 698 status = nvxx_general_powerup(); 699 break; 700 case 0x020310de: /* Nvidia Quadro DCC */ 701 si->ps.card_type = NV20; 702 si->ps.card_arch = NV20A; 703 sprintf(si->adi.name, "Nvidia Quadro DCC"); 704 sprintf(si->adi.chipset, "NV20"); 705 status = nvxx_general_powerup(); 706 break; 707 case 0x021110de: /* Nvidia GeForce FX 6800 */ 708 case 0x021210de: /* Nvidia GeForce FX 6800LE */ 709 case 0x021510de: /* Nvidia GeForce FX 6800 GT */ 710 si->ps.card_type = NV45; /* NV48 is NV45 with 512Mb */ 711 si->ps.card_arch = NV40A; 712 sprintf(si->adi.name, "Nvidia GeForce FX 6800"); 713 sprintf(si->adi.chipset, "NV48"); 714 status = nvxx_general_powerup(); 715 break; 716 case 0x022010de: /* Nvidia unknown FX */ 717 si->ps.card_type = NV44; 718 si->ps.card_arch = NV40A; 719 sprintf(si->adi.name, "Nvidia unknown FX"); 720 sprintf(si->adi.chipset, "NV44"); 721 status = nvxx_general_powerup(); 722 break; 723 case 0x022110de: /* Nvidia GeForce 6200 AGP (256Mb - 128bit) */ 724 si->ps.card_type = NV44; 725 si->ps.card_arch = NV40A; 726 sprintf(si->adi.name, "Nvidia GeForce 6200 AGP 256Mb"); 727 sprintf(si->adi.chipset, "NV44"); 728 status = nvxx_general_powerup(); 729 break; 730 case 0x022210de: /* Nvidia unknown FX */ 731 si->ps.card_type = NV44; 732 si->ps.card_arch = NV40A; 733 sprintf(si->adi.name, "Nvidia unknown FX"); 734 sprintf(si->adi.chipset, "NV44"); 735 status = nvxx_general_powerup(); 736 break; 737 case 0x022810de: /* Nvidia unknown FX Go */ 738 si->ps.card_type = NV44; 739 si->ps.card_arch = NV40A; 740 si->ps.laptop = true; 741 sprintf(si->adi.name, "Nvidia unknown FX Go"); 742 sprintf(si->adi.chipset, "NV44"); 743 status = nvxx_general_powerup(); 744 break; 745 case 0x024010de: /* Nvidia GeForce 6150 (NFORCE4 Integr.GPU) */ 746 case 0x024110de: /* Nvidia GeForce 6150 LE (NFORCE4 Integr.GPU) */ 747 si->ps.card_type = NV44; 748 si->ps.card_arch = NV40A; 749 sprintf(si->adi.name, "Nvidia GeForce 6150"); 750 sprintf(si->adi.chipset, "NV44"); 751 status = nvxx_general_powerup(); 752 break; 753 case 0x024210de: /* Nvidia GeForce 6100 (NFORCE4 Integr.GPU) */ 754 si->ps.card_type = NV44; 755 si->ps.card_arch = NV40A; 756 sprintf(si->adi.name, "Nvidia GeForce 6100"); 757 sprintf(si->adi.chipset, "NV44"); 758 status = nvxx_general_powerup(); 759 break; 760 case 0x025010de: /* Nvidia GeForce4 Ti 4600 */ 761 case 0x025110de: /* Nvidia GeForce4 Ti 4400 */ 762 case 0x025210de: /* Nvidia GeForce4 Ti 4600 */ 763 case 0x025310de: /* Nvidia GeForce4 Ti 4200 */ 764 si->ps.card_type = NV25; 765 si->ps.card_arch = NV20A; 766 sprintf(si->adi.name, "Nvidia GeForce4 Ti"); 767 sprintf(si->adi.chipset, "NV25"); 768 status = nvxx_general_powerup(); 769 break; 770 case 0x025810de: /* Nvidia Quadro4 900 XGL */ 771 case 0x025910de: /* Nvidia Quadro4 750 XGL */ 772 case 0x025b10de: /* Nvidia Quadro4 700 XGL */ 773 si->ps.card_type = NV25; 774 si->ps.card_arch = NV20A; 775 sprintf(si->adi.name, "Nvidia Quadro4 XGL"); 776 sprintf(si->adi.chipset, "NV25"); 777 status = nvxx_general_powerup(); 778 break; 779 case 0x028010de: /* Nvidia GeForce4 Ti 4800 AGP8X */ 780 case 0x028110de: /* Nvidia GeForce4 Ti 4200 AGP8X */ 781 si->ps.card_type = NV28; 782 si->ps.card_arch = NV20A; 783 sprintf(si->adi.name, "Nvidia GeForce4 Ti AGP8X"); 784 sprintf(si->adi.chipset, "NV28"); 785 status = nvxx_general_powerup(); 786 break; 787 case 0x028210de: /* Nvidia GeForce4 Ti 4800SE */ 788 si->ps.card_type = NV28; 789 si->ps.card_arch = NV20A; 790 sprintf(si->adi.name, "Nvidia GeForce4 Ti 4800SE"); 791 sprintf(si->adi.chipset, "NV28"); 792 status = nvxx_general_powerup(); 793 break; 794 case 0x028610de: /* Nvidia GeForce4 4200 Go */ 795 si->ps.card_type = NV28; 796 si->ps.card_arch = NV20A; 797 si->ps.laptop = true; 798 sprintf(si->adi.name, "Nvidia GeForce4 4200 Go"); 799 sprintf(si->adi.chipset, "NV28"); 800 status = nvxx_general_powerup(); 801 break; 802 case 0x028810de: /* Nvidia Quadro4 980 XGL */ 803 case 0x028910de: /* Nvidia Quadro4 780 XGL */ 804 si->ps.card_type = NV28; 805 si->ps.card_arch = NV20A; 806 sprintf(si->adi.name, "Nvidia Quadro4 XGL"); 807 sprintf(si->adi.chipset, "NV28"); 808 status = nvxx_general_powerup(); 809 break; 810 case 0x028c10de: /* Nvidia Quadro4 700 GoGL */ 811 si->ps.card_type = NV28; 812 si->ps.card_arch = NV20A; 813 si->ps.laptop = true; 814 sprintf(si->adi.name, "Nvidia Quadro4 700 GoGL"); 815 sprintf(si->adi.chipset, "NV28"); 816 status = nvxx_general_powerup(); 817 break; 818 case 0x029010de: /* Nvidia GeForce 7900 GTX */ 819 case 0x029110de: /* Nvidia GeForce 7900 GT */ 820 si->ps.card_type = G71; 821 si->ps.card_arch = NV40A; 822 sprintf(si->adi.name, "Nvidia GeForce 7900 GT(X)"); 823 sprintf(si->adi.chipset, "G71"); 824 status = nvxx_general_powerup(); 825 break; 826 case 0x02a010de: /* Nvidia GeForce3 Integrated GPU */ 827 si->ps.card_type = NV20; 828 si->ps.card_arch = NV20A; 829 sprintf(si->adi.name, "Nvidia GeForce3 Integrated GPU"); 830 sprintf(si->adi.chipset, "XBOX, NV20"); 831 status = nvxx_general_powerup(); 832 break; 833 case 0x030110de: /* Nvidia GeForce FX 5800 Ultra */ 834 case 0x030210de: /* Nvidia GeForce FX 5800 */ 835 si->ps.card_type = NV30; 836 si->ps.card_arch = NV30A; 837 sprintf(si->adi.name, "Nvidia GeForce FX 5800"); 838 sprintf(si->adi.chipset, "NV30"); 839 status = nvxx_general_powerup(); 840 break; 841 case 0x030810de: /* Nvidia Quadro FX 2000 */ 842 case 0x030910de: /* Nvidia Quadro FX 1000 */ 843 si->ps.card_type = NV30; 844 si->ps.card_arch = NV30A; 845 sprintf(si->adi.name, "Nvidia Quadro FX"); 846 sprintf(si->adi.chipset, "NV30"); 847 status = nvxx_general_powerup(); 848 break; 849 case 0x031110de: /* Nvidia GeForce FX 5600 Ultra */ 850 case 0x031210de: /* Nvidia GeForce FX 5600 */ 851 si->ps.card_type = NV31; 852 si->ps.card_arch = NV30A; 853 sprintf(si->adi.name, "Nvidia GeForce FX 5600"); 854 sprintf(si->adi.chipset, "NV31"); 855 status = nvxx_general_powerup(); 856 break; 857 case 0x031310de: /* Nvidia unknown FX */ 858 si->ps.card_type = NV31; 859 si->ps.card_arch = NV30A; 860 sprintf(si->adi.name, "Nvidia unknown FX"); 861 sprintf(si->adi.chipset, "NV31"); 862 status = nvxx_general_powerup(); 863 break; 864 case 0x031410de: /* Nvidia GeForce FX 5600XT */ 865 si->ps.card_type = NV31; 866 si->ps.card_arch = NV30A; 867 sprintf(si->adi.name, "Nvidia GeForce FX 5600XT"); 868 sprintf(si->adi.chipset, "NV31"); 869 status = nvxx_general_powerup(); 870 break; 871 case 0x031610de: /* Nvidia unknown FX Go */ 872 case 0x031710de: /* Nvidia unknown FX Go */ 873 si->ps.card_type = NV31; 874 si->ps.card_arch = NV30A; 875 si->ps.laptop = true; 876 sprintf(si->adi.name, "Nvidia unknown FX Go"); 877 sprintf(si->adi.chipset, "NV31"); 878 status = nvxx_general_powerup(); 879 break; 880 case 0x031a10de: /* Nvidia GeForce FX 5600 Go */ 881 si->ps.card_type = NV31; 882 si->ps.card_arch = NV30A; 883 si->ps.laptop = true; 884 sprintf(si->adi.name, "Nvidia GeForce FX 5600 Go"); 885 sprintf(si->adi.chipset, "NV31"); 886 status = nvxx_general_powerup(); 887 break; 888 case 0x031b10de: /* Nvidia GeForce FX 5650 Go */ 889 si->ps.card_type = NV31; 890 si->ps.card_arch = NV30A; 891 si->ps.laptop = true; 892 sprintf(si->adi.name, "Nvidia GeForce FX 5650 Go"); 893 sprintf(si->adi.chipset, "NV31"); 894 status = nvxx_general_powerup(); 895 break; 896 case 0x031c10de: /* Nvidia Quadro FX 700 Go */ 897 si->ps.card_type = NV31; 898 si->ps.card_arch = NV30A; 899 si->ps.laptop = true; 900 sprintf(si->adi.name, "Nvidia Quadro FX 700 Go"); 901 sprintf(si->adi.chipset, "NV31"); 902 status = nvxx_general_powerup(); 903 break; 904 case 0x031d10de: /* Nvidia unknown FX Go */ 905 case 0x031e10de: /* Nvidia unknown FX Go */ 906 case 0x031f10de: /* Nvidia unknown FX Go */ 907 si->ps.card_type = NV31; 908 si->ps.card_arch = NV30A; 909 si->ps.laptop = true; 910 sprintf(si->adi.name, "Nvidia unknown FX Go"); 911 sprintf(si->adi.chipset, "NV31"); 912 status = nvxx_general_powerup(); 913 break; 914 case 0x032010de: /* Nvidia GeForce FX 5200 */ 915 case 0x032110de: /* Nvidia GeForce FX 5200 Ultra */ 916 case 0x032210de: /* Nvidia GeForce FX 5200 */ 917 case 0x032310de: /* Nvidia GeForce FX 5200LE */ 918 si->ps.card_type = NV34; 919 si->ps.card_arch = NV30A; 920 sprintf(si->adi.name, "Nvidia GeForce FX 5200"); 921 sprintf(si->adi.chipset, "NV34"); 922 status = nvxx_general_powerup(); 923 break; 924 case 0x032410de: /* Nvidia GeForce FX 5200 Go */ 925 si->ps.card_type = NV34; 926 si->ps.card_arch = NV30A; 927 si->ps.laptop = true; 928 sprintf(si->adi.name, "Nvidia GeForce FX 5200 Go"); 929 sprintf(si->adi.chipset, "NV34"); 930 status = nvxx_general_powerup(); 931 break; 932 case 0x032510de: /* Nvidia GeForce FX 5250 Go */ 933 si->ps.card_type = NV34; 934 si->ps.card_arch = NV30A; 935 si->ps.laptop = true; 936 sprintf(si->adi.name, "Nvidia GeForce FX 5250 Go"); 937 sprintf(si->adi.chipset, "NV34"); 938 status = nvxx_general_powerup(); 939 break; 940 case 0x032610de: /* Nvidia GeForce FX 5500 */ 941 si->ps.card_type = NV34; 942 si->ps.card_arch = NV30A; 943 sprintf(si->adi.name, "Nvidia GeForce FX 5500"); 944 sprintf(si->adi.chipset, "NV34"); 945 status = nvxx_general_powerup(); 946 break; 947 case 0x032710de: /* Nvidia GeForce FX 5100 */ 948 si->ps.card_type = NV34; 949 si->ps.card_arch = NV30A; 950 sprintf(si->adi.name, "Nvidia GeForce FX 5100"); 951 sprintf(si->adi.chipset, "NV34"); 952 status = nvxx_general_powerup(); 953 break; 954 case 0x032810de: /* Nvidia GeForce FX 5200 Go 32M/64M */ 955 si->ps.card_type = NV34; 956 si->ps.card_arch = NV30A; 957 si->ps.laptop = true; 958 sprintf(si->adi.name, "Nvidia GeForce FX 5200 Go"); 959 sprintf(si->adi.chipset, "NV34"); 960 status = nvxx_general_powerup(); 961 break; 962 case 0x032910de: /* Nvidia GeForce FX 5200 (PPC) */ 963 si->ps.card_type = NV34; 964 si->ps.card_arch = NV30A; 965 sprintf(si->adi.name, "Nvidia GeForce FX 5200"); 966 sprintf(si->adi.chipset, "NV34"); 967 status = nvxx_general_powerup(); 968 break; 969 case 0x032a10de: /* Nvidia Quadro NVS 280 PCI */ 970 si->ps.card_type = NV34; 971 si->ps.card_arch = NV30A; 972 sprintf(si->adi.name, "Nvidia Quadro NVS 280 PCI"); 973 sprintf(si->adi.chipset, "NV34"); 974 status = nvxx_general_powerup(); 975 break; 976 case 0x032b10de: /* Nvidia Quadro FX 500/600 PCI */ 977 si->ps.card_type = NV34; 978 si->ps.card_arch = NV30A; 979 sprintf(si->adi.name, "Nvidia Quadro FX 500/600 PCI"); 980 sprintf(si->adi.chipset, "NV34"); 981 status = nvxx_general_powerup(); 982 break; 983 case 0x032c10de: /* Nvidia GeForce FX 5300 Go */ 984 case 0x032d10de: /* Nvidia GeForce FX 5100 Go */ 985 si->ps.card_type = NV34; 986 si->ps.card_arch = NV30A; 987 si->ps.laptop = true; 988 sprintf(si->adi.name, "Nvidia GeForce FX Go"); 989 sprintf(si->adi.chipset, "NV34"); 990 status = nvxx_general_powerup(); 991 break; 992 case 0x032e10de: /* Nvidia unknown FX Go */ 993 case 0x032f10de: /* Nvidia unknown FX Go */ 994 si->ps.card_type = NV34; 995 si->ps.card_arch = NV30A; 996 si->ps.laptop = true; 997 sprintf(si->adi.name, "Nvidia unknown FX Go"); 998 sprintf(si->adi.chipset, "NV34"); 999 status = nvxx_general_powerup(); 1000 break; 1001 case 0x033010de: /* Nvidia GeForce FX 5900 Ultra */ 1002 case 0x033110de: /* Nvidia GeForce FX 5900 */ 1003 si->ps.card_type = NV35; 1004 si->ps.card_arch = NV30A; 1005 sprintf(si->adi.name, "Nvidia GeForce FX 5900"); 1006 sprintf(si->adi.chipset, "NV35"); 1007 status = nvxx_general_powerup(); 1008 break; 1009 case 0x033210de: /* Nvidia GeForce FX 5900 XT */ 1010 si->ps.card_type = NV35; 1011 si->ps.card_arch = NV30A; 1012 sprintf(si->adi.name, "Nvidia GeForce FX 5900 XT"); 1013 sprintf(si->adi.chipset, "NV35"); 1014 status = nvxx_general_powerup(); 1015 break; 1016 case 0x033310de: /* Nvidia GeForce FX 5950 Ultra */ 1017 si->ps.card_type = NV38; 1018 si->ps.card_arch = NV30A; 1019 sprintf(si->adi.name, "Nvidia GeForce FX 5950 Ultra"); 1020 sprintf(si->adi.chipset, "NV38"); 1021 status = nvxx_general_powerup(); 1022 break; 1023 case 0x033410de: /* Nvidia GeForce FX 5900 ZT */ 1024 si->ps.card_type = NV38; 1025 si->ps.card_arch = NV30A; 1026 sprintf(si->adi.name, "Nvidia GeForce FX 5900 ZT"); 1027 sprintf(si->adi.chipset, "NV38(?)"); 1028 status = nvxx_general_powerup(); 1029 break; 1030 case 0x033810de: /* Nvidia Quadro FX 3000 */ 1031 si->ps.card_type = NV35; 1032 si->ps.card_arch = NV30A; 1033 sprintf(si->adi.name, "Nvidia Quadro FX 3000"); 1034 sprintf(si->adi.chipset, "NV35"); 1035 status = nvxx_general_powerup(); 1036 break; 1037 case 0x033f10de: /* Nvidia Quadro FX 700 */ 1038 si->ps.card_type = NV35; 1039 si->ps.card_arch = NV30A; 1040 sprintf(si->adi.name, "Nvidia Quadro FX 700"); 1041 sprintf(si->adi.chipset, "NV35"); 1042 status = nvxx_general_powerup(); 1043 break; 1044 case 0x034110de: /* Nvidia GeForce FX 5700 Ultra */ 1045 case 0x034210de: /* Nvidia GeForce FX 5700 */ 1046 case 0x034310de: /* Nvidia GeForce FX 5700LE */ 1047 case 0x034410de: /* Nvidia GeForce FX 5700VE */ 1048 si->ps.card_type = NV36; 1049 si->ps.card_arch = NV30A; 1050 sprintf(si->adi.name, "Nvidia GeForce FX 5700"); 1051 sprintf(si->adi.chipset, "NV36"); 1052 status = nvxx_general_powerup(); 1053 break; 1054 case 0x034510de: /* Nvidia unknown FX */ 1055 si->ps.card_type = NV36; 1056 si->ps.card_arch = NV30A; 1057 sprintf(si->adi.name, "Nvidia unknown FX"); 1058 sprintf(si->adi.chipset, "NV36"); 1059 status = nvxx_general_powerup(); 1060 break; 1061 case 0x034710de: /* Nvidia GeForce FX 5700 Go */ 1062 case 0x034810de: /* Nvidia GeForce FX 5700 Go */ 1063 si->ps.card_type = NV36; 1064 si->ps.card_arch = NV30A; 1065 si->ps.laptop = true; 1066 sprintf(si->adi.name, "Nvidia GeForce FX 5700 Go"); 1067 sprintf(si->adi.chipset, "NV36"); 1068 status = nvxx_general_powerup(); 1069 break; 1070 case 0x034910de: /* Nvidia unknown FX Go */ 1071 case 0x034b10de: /* Nvidia unknown FX Go */ 1072 si->ps.card_type = NV36; 1073 si->ps.card_arch = NV30A; 1074 si->ps.laptop = true; 1075 sprintf(si->adi.name, "Nvidia unknown FX Go"); 1076 sprintf(si->adi.chipset, "NV36"); 1077 status = nvxx_general_powerup(); 1078 break; 1079 case 0x034c10de: /* Nvidia Quadro FX 1000 Go */ 1080 si->ps.card_type = NV36; 1081 si->ps.card_arch = NV30A; 1082 si->ps.laptop = true; 1083 sprintf(si->adi.name, "Nvidia Quadro FX 1000 Go"); 1084 sprintf(si->adi.chipset, "NV36"); 1085 status = nvxx_general_powerup(); 1086 break; 1087 case 0x034e10de: /* Nvidia Quadro FX 1100 */ 1088 si->ps.card_type = NV36; 1089 si->ps.card_arch = NV30A; 1090 sprintf(si->adi.name, "Nvidia Quadro FX 1100"); 1091 sprintf(si->adi.chipset, "NV36"); 1092 status = nvxx_general_powerup(); 1093 break; 1094 case 0x034f10de: /* Nvidia unknown FX */ 1095 si->ps.card_type = NV36; 1096 si->ps.card_arch = NV30A; 1097 sprintf(si->adi.name, "Nvidia unknown FX"); 1098 sprintf(si->adi.chipset, "NV36(?)"); 1099 status = nvxx_general_powerup(); 1100 break; 1101 case 0x039110de: /* Nvidia GeForce 7600 GT */ 1102 si->ps.card_type = G73; 1103 si->ps.card_arch = NV40A; 1104 sprintf(si->adi.name, "Nvidia GeForce 7600 GT"); 1105 sprintf(si->adi.chipset, "G73"); 1106 status = nvxx_general_powerup(); 1107 break; 1108 /* Vendor Elsa GmbH */ 1109 case 0x0c601048: /* Elsa Gladiac Geforce2 MX */ 1110 si->ps.card_type = NV11; 1111 si->ps.card_arch = NV10A; 1112 sprintf(si->adi.name, "Elsa Gladiac Geforce2 MX"); 1113 sprintf(si->adi.chipset, "NV11"); 1114 status = nvxx_general_powerup(); 1115 break; 1116 /* Vendor Nvidia STB/SGS-Thompson */ 1117 case 0x002012d2: /* Nvidia STB/SGS-Thompson TNT1 */ 1118 si->ps.card_type = NV04; 1119 si->ps.card_arch = NV04A; 1120 sprintf(si->adi.name, "Nvidia STB/SGS-Thompson TNT1"); 1121 sprintf(si->adi.chipset, "NV04"); 1122 status = nvxx_general_powerup(); 1123 break; 1124 case 0x002812d2: /* Nvidia STB/SGS-Thompson TNT2 (pro) */ 1125 case 0x002912d2: /* Nvidia STB/SGS-Thompson TNT2 Ultra */ 1126 case 0x002a12d2: /* Nvidia STB/SGS-Thompson TNT2 */ 1127 case 0x002b12d2: /* Nvidia STB/SGS-Thompson TNT2 */ 1128 si->ps.card_type = NV05; 1129 si->ps.card_arch = NV04A; 1130 sprintf(si->adi.name, "Nvidia STB/SGS-Thompson TNT2"); 1131 sprintf(si->adi.chipset, "NV05"); 1132 status = nvxx_general_powerup(); 1133 break; 1134 case 0x002c12d2: /* Nvidia STB/SGS-Thompson Vanta (Lt) */ 1135 si->ps.card_type = NV05; 1136 si->ps.card_arch = NV04A; 1137 sprintf(si->adi.name, "Nvidia STB/SGS-Thompson Vanta"); 1138 sprintf(si->adi.chipset, "NV05"); 1139 status = nvxx_general_powerup(); 1140 break; 1141 case 0x002d12d2: /* Nvidia STB/SGS-Thompson TNT2-M64 (Pro) */ 1142 si->ps.card_type = NV05M64; 1143 si->ps.card_arch = NV04A; 1144 sprintf(si->adi.name, "Nvidia STB/SGS-Thompson TNT2M64"); 1145 sprintf(si->adi.chipset, "NV05 model 64"); 1146 status = nvxx_general_powerup(); 1147 break; 1148 case 0x002e12d2: /* Nvidia STB/SGS-Thompson NV06 Vanta */ 1149 case 0x002f12d2: /* Nvidia STB/SGS-Thompson NV06 Vanta */ 1150 si->ps.card_type = NV06; 1151 si->ps.card_arch = NV04A; 1152 sprintf(si->adi.name, "Nvidia STB/SGS-Thompson Vanta"); 1153 sprintf(si->adi.chipset, "NV06"); 1154 status = nvxx_general_powerup(); 1155 break; 1156 case 0x00a012d2: /* Nvidia STB/SGS-Thompson Aladdin TNT2 */ 1157 si->ps.card_type = NV05; 1158 si->ps.card_arch = NV04A; 1159 sprintf(si->adi.name, "Nvidia STB/SGS-Thompson TNT2"); 1160 sprintf(si->adi.chipset, "NV05"); 1161 status = nvxx_general_powerup(); 1162 break; 1163 /* Vendor Varisys Limited */ 1164 case 0x35031888: /* Varisys GeForce4 MX440 */ 1165 si->ps.card_type = NV17; 1166 si->ps.card_arch = NV10A; 1167 sprintf(si->adi.name, "Varisys GeForce4 MX440"); 1168 sprintf(si->adi.chipset, "NV17"); 1169 status = nvxx_general_powerup(); 1170 break; 1171 case 0x35051888: /* Varisys GeForce4 Ti 4200 */ 1172 si->ps.card_type = NV25; 1173 si->ps.card_arch = NV20A; 1174 sprintf(si->adi.name, "Varisys GeForce4 Ti 4200"); 1175 sprintf(si->adi.chipset, "NV25"); 1176 status = nvxx_general_powerup(); 1177 break; 1178 default: 1179 LOG(8,("POWERUP: Failed to detect valid card 0x%08x\n",CFGR(DEVID))); 1180 return B_ERROR; 1181 } 1182 1183 return status; 1184 } 1185 1186 static status_t test_ram() 1187 { 1188 uint32 value, offset; 1189 status_t result = B_OK; 1190 1191 /* make sure we don't corrupt the hardware cursor by using fbc.frame_buffer. */ 1192 if (si->fbc.frame_buffer == NULL) 1193 { 1194 LOG(8,("INIT: test_ram detected NULL pointer.\n")); 1195 return B_ERROR; 1196 } 1197 1198 for (offset = 0, value = 0x55aa55aa; offset < 256; offset++) 1199 { 1200 /* write testpattern to cardRAM */ 1201 ((uint32 *)si->fbc.frame_buffer)[offset] = value; 1202 /* toggle testpattern */ 1203 value = 0xffffffff - value; 1204 } 1205 1206 for (offset = 0, value = 0x55aa55aa; offset < 256; offset++) 1207 { 1208 /* readback and verify testpattern from cardRAM */ 1209 if (((uint32 *)si->fbc.frame_buffer)[offset] != value) result = B_ERROR; 1210 /* toggle testpattern */ 1211 value = 0xffffffff - value; 1212 } 1213 return result; 1214 } 1215 1216 /* NOTE: 1217 * This routine *has* to be done *after* SetDispplayMode has been executed, 1218 * or test results will not be representative! 1219 * (CAS latency is dependant on NV setup on some (DRAM) boards) */ 1220 status_t nv_set_cas_latency() 1221 { 1222 status_t result = B_ERROR; 1223 uint8 latency = 0; 1224 1225 /* check current RAM access to see if we need to change anything */ 1226 if (test_ram() == B_OK) 1227 { 1228 LOG(4,("INIT: RAM access OK.\n")); 1229 return B_OK; 1230 } 1231 1232 /* check if we read PINS at starttime so we have valid registersettings at our disposal */ 1233 if (si->ps.pins_status != B_OK) 1234 { 1235 LOG(4,("INIT: RAM access errors; not fixable: PINS was not read from cardBIOS.\n")); 1236 return B_ERROR; 1237 } 1238 1239 /* OK. We might have a problem, try to fix it now.. */ 1240 LOG(4,("INIT: RAM access errors; tuning CAS latency if prudent...\n")); 1241 1242 switch(si->ps.card_type) 1243 { 1244 default: 1245 LOG(4,("INIT: RAM CAS tuning not implemented for this card, aborting.\n")); 1246 return B_OK; 1247 break; 1248 } 1249 if (result == B_OK) 1250 LOG(4,("INIT: RAM access OK. CAS latency set to %d cycles.\n", latency)); 1251 else 1252 LOG(4,("INIT: RAM access not fixable. CAS latency set to %d cycles.\n", latency)); 1253 1254 return result; 1255 } 1256 1257 void setup_virtualized_heads(bool cross) 1258 { 1259 if (cross) 1260 { 1261 head1_interrupt_enable = (crtc_interrupt_enable) nv_crtc2_interrupt_enable; 1262 head1_update_fifo = (crtc_update_fifo) nv_crtc2_update_fifo; 1263 head1_validate_timing = (crtc_validate_timing) nv_crtc2_validate_timing; 1264 head1_set_timing = (crtc_set_timing) nv_crtc2_set_timing; 1265 head1_depth = (crtc_depth) nv_crtc2_depth; 1266 head1_dpms = (crtc_dpms) nv_crtc2_dpms; 1267 head1_set_display_pitch = (crtc_set_display_pitch) nv_crtc2_set_display_pitch; 1268 head1_set_display_start = (crtc_set_display_start) nv_crtc2_set_display_start; 1269 head1_cursor_init = (crtc_cursor_init) nv_crtc2_cursor_init; 1270 head1_cursor_show = (crtc_cursor_show) nv_crtc2_cursor_show; 1271 head1_cursor_hide = (crtc_cursor_hide) nv_crtc2_cursor_hide; 1272 head1_cursor_define = (crtc_cursor_define) nv_crtc2_cursor_define; 1273 head1_cursor_position = (crtc_cursor_position) nv_crtc2_cursor_position; 1274 head1_stop_tvout = (crtc_stop_tvout) nv_crtc2_stop_tvout; 1275 head1_start_tvout = (crtc_start_tvout) nv_crtc2_start_tvout; 1276 1277 head1_mode = (dac_mode) nv_dac2_mode; 1278 head1_palette = (dac_palette) nv_dac2_palette; 1279 head1_set_pix_pll = (dac_set_pix_pll) nv_dac2_set_pix_pll; 1280 head1_pix_pll_find = (dac_pix_pll_find) nv_dac2_pix_pll_find; 1281 1282 head2_interrupt_enable = (crtc_interrupt_enable) nv_crtc_interrupt_enable; 1283 head2_update_fifo = (crtc_update_fifo) nv_crtc_update_fifo; 1284 head2_validate_timing = (crtc_validate_timing) nv_crtc_validate_timing; 1285 head2_set_timing = (crtc_set_timing) nv_crtc_set_timing; 1286 head2_depth = (crtc_depth) nv_crtc_depth; 1287 head2_dpms = (crtc_dpms) nv_crtc_dpms; 1288 head2_set_display_pitch = (crtc_set_display_pitch) nv_crtc_set_display_pitch; 1289 head2_set_display_start = (crtc_set_display_start) nv_crtc_set_display_start; 1290 head2_cursor_init = (crtc_cursor_init) nv_crtc_cursor_init; 1291 head2_cursor_show = (crtc_cursor_show) nv_crtc_cursor_show; 1292 head2_cursor_hide = (crtc_cursor_hide) nv_crtc_cursor_hide; 1293 head2_cursor_define = (crtc_cursor_define) nv_crtc_cursor_define; 1294 head2_cursor_position = (crtc_cursor_position) nv_crtc_cursor_position; 1295 head2_stop_tvout = (crtc_stop_tvout) nv_crtc_stop_tvout; 1296 head2_start_tvout = (crtc_start_tvout) nv_crtc_start_tvout; 1297 1298 head2_mode = (dac_mode) nv_dac_mode; 1299 head2_palette = (dac_palette) nv_dac_palette; 1300 head2_set_pix_pll = (dac_set_pix_pll) nv_dac_set_pix_pll; 1301 head2_pix_pll_find = (dac_pix_pll_find) nv_dac_pix_pll_find; 1302 } 1303 else 1304 { 1305 head1_interrupt_enable = (crtc_interrupt_enable) nv_crtc_interrupt_enable; 1306 head1_update_fifo = (crtc_update_fifo) nv_crtc_update_fifo; 1307 head1_validate_timing = (crtc_validate_timing) nv_crtc_validate_timing; 1308 head1_set_timing = (crtc_set_timing) nv_crtc_set_timing; 1309 head1_depth = (crtc_depth) nv_crtc_depth; 1310 head1_dpms = (crtc_dpms) nv_crtc_dpms; 1311 head1_set_display_pitch = (crtc_set_display_pitch) nv_crtc_set_display_pitch; 1312 head1_set_display_start = (crtc_set_display_start) nv_crtc_set_display_start; 1313 head1_cursor_init = (crtc_cursor_init) nv_crtc_cursor_init; 1314 head1_cursor_show = (crtc_cursor_show) nv_crtc_cursor_show; 1315 head1_cursor_hide = (crtc_cursor_hide) nv_crtc_cursor_hide; 1316 head1_cursor_define = (crtc_cursor_define) nv_crtc_cursor_define; 1317 head1_cursor_position = (crtc_cursor_position) nv_crtc_cursor_position; 1318 head1_stop_tvout = (crtc_stop_tvout) nv_crtc_stop_tvout; 1319 head1_start_tvout = (crtc_start_tvout) nv_crtc_start_tvout; 1320 1321 head1_mode = (dac_mode) nv_dac_mode; 1322 head1_palette = (dac_palette) nv_dac_palette; 1323 head1_set_pix_pll = (dac_set_pix_pll) nv_dac_set_pix_pll; 1324 head1_pix_pll_find = (dac_pix_pll_find) nv_dac_pix_pll_find; 1325 1326 head2_interrupt_enable = (crtc_interrupt_enable) nv_crtc2_interrupt_enable; 1327 head2_update_fifo = (crtc_update_fifo) nv_crtc2_update_fifo; 1328 head2_validate_timing = (crtc_validate_timing) nv_crtc2_validate_timing; 1329 head2_set_timing = (crtc_set_timing) nv_crtc2_set_timing; 1330 head2_depth = (crtc_depth) nv_crtc2_depth; 1331 head2_dpms = (crtc_dpms) nv_crtc2_dpms; 1332 head2_set_display_pitch = (crtc_set_display_pitch) nv_crtc2_set_display_pitch; 1333 head2_set_display_start = (crtc_set_display_start) nv_crtc2_set_display_start; 1334 head2_cursor_init = (crtc_cursor_init) nv_crtc2_cursor_init; 1335 head2_cursor_show = (crtc_cursor_show) nv_crtc2_cursor_show; 1336 head2_cursor_hide = (crtc_cursor_hide) nv_crtc2_cursor_hide; 1337 head2_cursor_define = (crtc_cursor_define) nv_crtc2_cursor_define; 1338 head2_cursor_position = (crtc_cursor_position) nv_crtc2_cursor_position; 1339 head2_stop_tvout = (crtc_stop_tvout) nv_crtc2_stop_tvout; 1340 head2_start_tvout = (crtc_start_tvout) nv_crtc2_start_tvout; 1341 1342 head2_mode = (dac_mode) nv_dac2_mode; 1343 head2_palette = (dac_palette) nv_dac2_palette; 1344 head2_set_pix_pll = (dac_set_pix_pll) nv_dac2_set_pix_pll; 1345 head2_pix_pll_find = (dac_pix_pll_find) nv_dac2_pix_pll_find; 1346 } 1347 } 1348 1349 void set_crtc_owner(bool head) 1350 { 1351 if (si->ps.secondary_head) 1352 { 1353 if (!head) 1354 { 1355 /* note: 'OWNER' is a non-standard register in behaviour(!) on NV11's, 1356 * while non-NV11 cards behave normally. 1357 * 1358 * Double-write action needed on those strange NV11 cards: */ 1359 /* RESET: needed on NV11 */ 1360 CRTCW(OWNER, 0xff); 1361 /* enable access to CRTC1, SEQ1, GRPH1, ATB1, ??? */ 1362 CRTCW(OWNER, 0x00); 1363 } 1364 else 1365 { 1366 /* note: 'OWNER' is a non-standard register in behaviour(!) on NV11's, 1367 * while non-NV11 cards behave normally. 1368 * 1369 * Double-write action needed on those strange NV11 cards: */ 1370 /* RESET: needed on NV11 */ 1371 CRTC2W(OWNER, 0xff); 1372 /* enable access to CRTC2, SEQ2, GRPH2, ATB2, ??? */ 1373 CRTC2W(OWNER, 0x03); 1374 } 1375 } 1376 } 1377 1378 static status_t nvxx_general_powerup() 1379 { 1380 LOG(4, ("INIT: NV powerup\n")); 1381 LOG(4,("POWERUP: Detected %s (%s)\n", si->adi.name, si->adi.chipset)); 1382 1383 /* setup cardspecs */ 1384 /* note: 1385 * this MUST be done before the driver attempts a card coldstart */ 1386 set_specs(); 1387 1388 /* only process BIOS for finetuning specs and coldstarting card if requested 1389 * by the user; 1390 * note: 1391 * this in fact frees the driver from relying on the BIOS to be executed 1392 * at system power-up POST time. */ 1393 if (!si->settings.usebios) 1394 { 1395 /* Make sure we are running in PCI (not AGP) mode: 1396 * This is a requirement for safely coldstarting cards! 1397 * (some cards reset their AGP PLL during startup which makes acceleration 1398 * engine DMA fail later on. A reboot is needed to overcome that.) 1399 * Note: 1400 * This may only be done when no transfers are in progress on the bus, so now 1401 * is probably a good time.. */ 1402 nv_agp_setup(false); 1403 1404 LOG(2, ("INIT: Attempting card coldstart!\n")); 1405 /* update the cardspecs in the shared_info PINS struct according to reported 1406 * specs as much as is possible; 1407 * this also coldstarts the card if possible (executes BIOS CMD script(s)) */ 1408 parse_pins(); 1409 } 1410 else 1411 { 1412 LOG(2, ("INIT: Skipping card coldstart!\n")); 1413 } 1414 1415 unlock_card(); 1416 1417 /* get RAM size, detect TV encoder and do fake panel startup (panel init code 1418 * is still missing). */ 1419 fake_panel_start(); 1420 1421 /* log the final card specifications */ 1422 dump_pins(); 1423 1424 /* dump config space as it is after a possible coldstart attempt */ 1425 if (si->settings.logmask & 0x80000000) nv_dump_configuration_space(); 1426 1427 /* setup CRTC and DAC functions access: determined in fake_panel_start */ 1428 setup_virtualized_heads(si->ps.crtc2_prim); 1429 1430 /* do powerup needed from pre-inited card state as done by system POST cardBIOS 1431 * execution or driver coldstart above */ 1432 return nv_general_bios_to_powergraphics(); 1433 } 1434 1435 /* this routine switches the CRTC/DAC sets to 'connectors', but only for analog 1436 * outputs. We need this to make sure the analog 'switch' is set in the same way the 1437 * digital 'switch' is set by the BIOS or we might not be able to use dualhead. */ 1438 status_t nv_general_output_select(bool cross) 1439 { 1440 /* make sure this call is warranted */ 1441 if (si->ps.secondary_head) 1442 { 1443 /* NV11 cards can't switch heads (confirmed) */ 1444 if (si->ps.card_type != NV11) 1445 { 1446 if (cross) 1447 { 1448 LOG(4,("INIT: switching analog outputs to be cross-connected\n")); 1449 1450 /* enable head 2 on connector 1 */ 1451 /* (b8 = select CRTC (head) for output, 1452 * b4 = ??? (confirmed not to be a FP switch), 1453 * b0 = enable CRT) */ 1454 DACW(OUTPUT, 0x00000101); 1455 /* enable head 1 on connector 2 */ 1456 DAC2W(OUTPUT, 0x00000001); 1457 } 1458 else 1459 { 1460 LOG(4,("INIT: switching analog outputs to be straight-through\n")); 1461 1462 /* enable head 1 on connector 1 */ 1463 DACW(OUTPUT, 0x00000001); 1464 /* enable head 2 on connector 2 */ 1465 DAC2W(OUTPUT, 0x00000101); 1466 } 1467 } 1468 else 1469 { 1470 LOG(4,("INIT: NV11 analog outputs are hardwired to be straight-through\n")); 1471 } 1472 return B_OK; 1473 } 1474 else 1475 { 1476 return B_ERROR; 1477 } 1478 } 1479 1480 /* this routine switches CRTC/DAC set use. We need this because it's unknown howto 1481 * switch digital panels to/from a specific CRTC/DAC set. */ 1482 status_t nv_general_head_select(bool cross) 1483 { 1484 /* make sure this call is warranted */ 1485 if (si->ps.secondary_head) 1486 { 1487 /* invert CRTC/DAC use to do switching */ 1488 if (cross) 1489 { 1490 LOG(4,("INIT: switching CRTC/DAC use to be cross-connected\n")); 1491 si->crtc_switch_mode = !si->ps.crtc2_prim; 1492 } 1493 else 1494 { 1495 LOG(4,("INIT: switching CRTC/DAC use to be straight-through\n")); 1496 si->crtc_switch_mode = si->ps.crtc2_prim; 1497 } 1498 /* update CRTC and DAC functions access */ 1499 setup_virtualized_heads(si->crtc_switch_mode); 1500 1501 return B_OK; 1502 } 1503 else 1504 { 1505 return B_ERROR; 1506 } 1507 } 1508 1509 static void unlock_card(void) 1510 { 1511 /* power-up all nvidia hardware function blocks */ 1512 /* bit 28: OVERLAY ENGINE (BES), 1513 * bit 25: CRTC2, (> NV04A) 1514 * bit 24: CRTC1, 1515 * bit 20: framebuffer, 1516 * bit 16: PPMI, 1517 * bit 12: PGRAPH, 1518 * bit 8: PFIFO, 1519 * bit 4: PMEDIA, 1520 * bit 0: TVOUT. (> NV04A) */ 1521 NV_REG32(NV32_PWRUPCTRL) = 0x13111111; 1522 1523 /* select colormode CRTC registers base adresses */ 1524 NV_REG8(NV8_MISCW) = 0xcb; 1525 1526 /* enable access to primary head */ 1527 set_crtc_owner(0); 1528 /* unlock head's registers for R/W access */ 1529 CRTCW(LOCK, 0x57); 1530 CRTCW(VSYNCE ,(CRTCR(VSYNCE) & 0x7f)); 1531 if (si->ps.secondary_head) 1532 { 1533 /* enable access to secondary head */ 1534 set_crtc_owner(1); 1535 /* unlock head's registers for R/W access */ 1536 CRTC2W(LOCK, 0x57); 1537 CRTC2W(VSYNCE ,(CRTCR(VSYNCE) & 0x7f)); 1538 } 1539 } 1540 1541 /* basic change of card state from VGA to enhanced mode: 1542 * Should work from VGA BIOS POST init state. */ 1543 static status_t nv_general_bios_to_powergraphics() 1544 { 1545 /* let acc engine make power off/power on cycle to start 'fresh' */ 1546 NV_REG32(NV32_PWRUPCTRL) = 0x13110011; 1547 snooze(1000); 1548 NV_REG32(NV32_PWRUPCTRL) = 0x13111111; 1549 1550 unlock_card(); 1551 1552 /* turn off both displays and the hardcursors (also disables transfers) */ 1553 head1_dpms(false, false, false, true); 1554 head1_cursor_hide(); 1555 if (si->ps.secondary_head) 1556 { 1557 head2_dpms(false, false, false, true); 1558 head2_cursor_hide(); 1559 } 1560 1561 if (si->ps.secondary_head) 1562 { 1563 /* switch overlay engine and TV encoder to CRTC1 */ 1564 /* bit 17: GPU FP port #1 (confirmed NV25, NV28, confirmed not on NV34), 1565 * bit 16: GPU FP port #2 (confirmed NV25, NV28, NV34), 1566 * bit 12: overlay engine (all cards), 1567 * bit 9: TVout chip #2 (confirmed on NV18, NV25, NV28), 1568 * bit 8: TVout chip #1 (all cards), 1569 * bit 4: both I2C busses (all cards) */ 1570 NV_REG32(NV32_2FUNCSEL) &= ~0x00001100; 1571 NV_REG32(NV32_FUNCSEL) |= 0x00001100; 1572 } 1573 si->overlay.crtc = false; 1574 1575 /* enable 'enhanced' mode on primary head: */ 1576 /* enable access to primary head */ 1577 set_crtc_owner(0); 1578 /* note: 'BUFFER' is a non-standard register in behaviour(!) on most 1579 * NV11's like the GeForce2 MX200, while the MX400 and non-NV11 cards 1580 * behave normally. 1581 * Also readback is not nessesarily what was written before! 1582 * 1583 * Double-write action needed on those strange NV11 cards: */ 1584 /* RESET: don't doublebuffer CRTC access: set programmed values immediately... */ 1585 CRTCW(BUFFER, 0xff); 1586 /* ... and use fine pitched CRTC granularity on > NV4 cards (b2 = 0) */ 1587 /* note: this has no effect on possible bandwidth issues. */ 1588 CRTCW(BUFFER, 0xfb); 1589 /* select VGA mode (old VGA register) */ 1590 CRTCW(MODECTL, 0xc3); 1591 /* select graphics mode (old VGA register) */ 1592 SEQW(MEMMODE, 0x0e); 1593 /* select 8 dots character clocks (old VGA register) */ 1594 SEQW(CLKMODE, 0x21); 1595 /* select VGA mode (old VGA register) */ 1596 GRPHW(MODE, 0x00); 1597 /* select graphics mode (old VGA register) */ 1598 GRPHW(MISC, 0x01); 1599 /* select graphics mode (old VGA register) */ 1600 ATBW(MODECTL, 0x01); 1601 /* enable 'enhanced mode', enable Vsync & Hsync, 1602 * set DAC palette to 8-bit width, disable large screen */ 1603 CRTCW(REPAINT1, 0x04); 1604 1605 /* enable 'enhanced' mode on secondary head: */ 1606 if (si->ps.secondary_head) 1607 { 1608 /* enable access to secondary head */ 1609 set_crtc_owner(1); 1610 /* select colormode CRTC2 registers base adresses */ 1611 NV_REG8(NV8_MISCW) = 0xcb; 1612 /* note: 'BUFFER' is a non-standard register in behaviour(!) on most 1613 * NV11's like the GeForce2 MX200, while the MX400 and non-NV11 cards 1614 * behave normally. 1615 * Also readback is not nessesarily what was written before! 1616 * 1617 * Double-write action needed on those strange NV11 cards: */ 1618 /* RESET: don't doublebuffer CRTC2 access: set programmed values immediately... */ 1619 CRTC2W(BUFFER, 0xff); 1620 /* ... and use fine pitched CRTC granularity on > NV4 cards (b2 = 0) */ 1621 /* note: this has no effect on possible bandwidth issues. */ 1622 CRTC2W(BUFFER, 0xfb); 1623 /* select VGA mode (old VGA register) */ 1624 CRTC2W(MODECTL, 0xc3); 1625 /* select graphics mode (old VGA register) */ 1626 SEQW(MEMMODE, 0x0e); 1627 /* select 8 dots character clocks (old VGA register) */ 1628 SEQW(CLKMODE, 0x21); 1629 /* select VGA mode (old VGA register) */ 1630 GRPHW(MODE, 0x00); 1631 /* select graphics mode (old VGA register) */ 1632 GRPHW(MISC, 0x01); 1633 /* select graphics mode (old VGA register) */ 1634 ATB2W(MODECTL, 0x01); 1635 /* enable 'enhanced mode', enable Vsync & Hsync, 1636 * set DAC palette to 8-bit width, disable large screen */ 1637 CRTC2W(REPAINT1, 0x04); 1638 } 1639 1640 /* enable palettes */ 1641 DACW(GENCTRL, 0x00100100); 1642 if (si->ps.secondary_head) DAC2W(GENCTRL, 0x00100100); 1643 1644 /* enable programmable PLLs */ 1645 /* (confirmed PLLSEL to be a write-only register on NV04 and NV11!) */ 1646 if (si->ps.secondary_head) 1647 DACW(PLLSEL, 0x30000f00); 1648 else 1649 DACW(PLLSEL, 0x10000700); 1650 1651 /* turn on DAC and make sure detection testsignal routing is disabled 1652 * (b16 = disable DAC, 1653 * b12 = enable testsignal output */ 1654 //fixme note: b20 ('DACTM_TEST') when set apparantly blocks a DAC's video output 1655 //(confirmed NV43), while it's timing remains operational (black screen). 1656 //It feels like in some screen configurations it can move the output to the other 1657 //output connector as well... 1658 DACW(TSTCTRL, (DACR(TSTCTRL) & 0xfffeefff)); 1659 /* turn on DAC2 if it exists 1660 * (NOTE: testsignal function block resides in DAC1 only (!)) */ 1661 if (si->ps.secondary_head) DAC2W(TSTCTRL, (DAC2R(TSTCTRL) & 0xfffeefff)); 1662 1663 /* NV40 and NV45 need a 'tweak' to make sure the CRTC FIFO's/shiftregisters get 1664 * their data in time (otherwise momentarily ghost images of windows or such 1665 * may appear on heavy acceleration engine use for instance, especially in 32-bit 1666 * colordepth) */ 1667 if ((si->ps.card_type == NV40) || (si->ps.card_type == NV45)) 1668 { 1669 /* clear b15: some framebuffer config item (unknown) */ 1670 NV_REG32(NV32_PFB_CLS_PAGE2) &= 0xffff7fff; 1671 } 1672 1673 /* tweak card GPU-core and RAM speeds if requested (hoping we'll survive)... */ 1674 if (si->settings.gpu_clk) 1675 { 1676 LOG(2,("INIT: tweaking GPU clock!\n")); 1677 1678 set_pll(NV32_COREPLL, si->settings.gpu_clk); 1679 snooze(1000); 1680 } 1681 if (si->settings.ram_clk) 1682 { 1683 LOG(2,("INIT: tweaking cardRAM clock!\n")); 1684 1685 set_pll(NV32_MEMPLL, si->settings.ram_clk); 1686 snooze(1000); 1687 } 1688 1689 /* setup AGP: 1690 * Note: 1691 * This may only be done when no transfers are in progress on the bus, so now 1692 * is probably a good time.. */ 1693 nv_agp_setup(true); 1694 1695 return B_OK; 1696 } 1697 1698 /* Check if mode virtual_size adheres to the cards _maximum_ contraints, and modify 1699 * virtual_size to the nearest valid maximum for the mode on the card if not so. 1700 * Also: check if virtual_width adheres to the cards granularity constraints, and 1701 * create mode slopspace if not so. 1702 * We use acc or crtc granularity constraints based on the 'worst case' scenario. 1703 * 1704 * Mode slopspace is reflected in fbc->bytes_per_row BTW. */ 1705 status_t nv_general_validate_pic_size (display_mode *target, uint32 *bytes_per_row, bool *acc_mode) 1706 { 1707 uint32 video_pitch; 1708 uint32 acc_mask, crtc_mask; 1709 uint32 max_crtc_width, max_acc_width; 1710 uint8 depth = 8; 1711 1712 /* determine pixel multiple based on acceleration engine constraints */ 1713 /* note: 1714 * because of the seemingly 'random' variations in these constraints we take 1715 * a reasonable 'lowest common denominator' instead of always true constraints. */ 1716 switch (si->ps.card_arch) 1717 { 1718 case NV04A: 1719 /* confirmed for: 1720 * TNT1 (NV04), TNT2 (NV05), TNT2-M64 (NV05M64), GeForce2 MX400 (NV11), 1721 * GeForce4 MX440 (NV18), GeForceFX 5200 (NV34) in PIO acc mode; 1722 * confirmed for: 1723 * TNT1 (NV04), TNT2 (NV05), TNT2-M64 (NV05M64), GeForce4 Ti4200 (NV28), 1724 * GeForceFX 5200 (NV34) in DMA acc mode. */ 1725 switch (target->space) 1726 { 1727 case B_CMAP8: acc_mask = 0x0f; depth = 8; break; 1728 case B_RGB15: acc_mask = 0x07; depth = 16; break; 1729 case B_RGB16: acc_mask = 0x07; depth = 16; break; 1730 case B_RGB24: acc_mask = 0x0f; depth = 24; break; 1731 case B_RGB32: acc_mask = 0x03; depth = 32; break; 1732 default: 1733 LOG(8,("INIT: unknown color space: 0x%08x\n", target->space)); 1734 return B_ERROR; 1735 } 1736 break; 1737 default: 1738 /* confirmed for: 1739 * GeForce4 Ti4200 (NV28), GeForceFX 5600 (NV31) in PIO acc mode; 1740 * confirmed for: 1741 * GeForce2 MX400 (NV11), GeForce4 MX440 (NV18), GeForcePCX 5750 (NV36), 1742 * GeForcePCX 6600 GT (NV43) in DMA acc mode. */ 1743 switch (target->space) 1744 { 1745 case B_CMAP8: acc_mask = 0x3f; depth = 8; break; 1746 case B_RGB15: acc_mask = 0x1f; depth = 16; break; 1747 case B_RGB16: acc_mask = 0x1f; depth = 16; break; 1748 case B_RGB24: acc_mask = 0x3f; depth = 24; break; 1749 case B_RGB32: acc_mask = 0x0f; depth = 32; break; 1750 default: 1751 LOG(8,("INIT: unknown color space: 0x%08x\n", target->space)); 1752 return B_ERROR; 1753 } 1754 break; 1755 } 1756 1757 /* determine pixel multiple based on CRTC memory pitch constraints: 1758 * -> all NV cards have same granularity constraints on CRTC1 and CRTC2, 1759 * provided that the CRTC1 and CRTC2 BUFFER register b2 = 0; 1760 * 1761 * (Note: Don't mix this up with CRTC timing contraints! Those are 1762 * multiples of 8 for horizontal, 1 for vertical timing.) */ 1763 switch (si->ps.card_type) 1764 { 1765 default: 1766 // case NV04: 1767 /* confirmed for: 1768 * TNT1 always; 1769 * TNT2, TNT2-M64, GeForce2 MX400, GeForce4 MX440, GeForce4 Ti4200, 1770 * GeForceFX 5200: if the CRTC1 (and CRTC2) BUFFER register b2 = 0 */ 1771 /* NOTE: 1772 * Unfortunately older cards have a hardware fault that prevents use. 1773 * We need doubled granularity on those to prevent the single top line 1774 * from shifting to the left! 1775 * This is confirmed for TNT2, GeForce2 MX200, GeForce2 MX400. 1776 * Confirmed OK are: 1777 * GeForce4 MX440, GeForce4 Ti4200, GeForceFX 5200. */ 1778 switch (target->space) 1779 { 1780 case B_CMAP8: crtc_mask = 0x0f; break; /* 0x07 */ 1781 case B_RGB15: crtc_mask = 0x07; break; /* 0x03 */ 1782 case B_RGB16: crtc_mask = 0x07; break; /* 0x03 */ 1783 case B_RGB24: crtc_mask = 0x0f; break; /* 0x07 */ 1784 case B_RGB32: crtc_mask = 0x03; break; /* 0x01 */ 1785 default: 1786 LOG(8,("INIT: unknown color space: 0x%08x\n", target->space)); 1787 return B_ERROR; 1788 } 1789 break; 1790 // default: 1791 /* confirmed for: 1792 * TNT2, TNT2-M64, GeForce2 MX400, GeForce4 MX440, GeForce4 Ti4200, 1793 * GeForceFX 5200: if the CRTC1 (and CRTC2) BUFFER register b2 = 1 */ 1794 /* switch (target->space) 1795 { 1796 case B_CMAP8: crtc_mask = 0x1f; break; 1797 case B_RGB15: crtc_mask = 0x0f; break; 1798 case B_RGB16: crtc_mask = 0x0f; break; 1799 case B_RGB24: crtc_mask = 0x1f; break; 1800 case B_RGB32: crtc_mask = 0x07; break; 1801 default: 1802 LOG(8,("INIT: unknown color space: 0x%08x\n", target->space)); 1803 return B_ERROR; 1804 } 1805 break; 1806 */ } 1807 1808 /* set virtual_width limit for accelerated modes */ 1809 /* note: 1810 * because of the seemingly 'random' variations in these constraints we take 1811 * a reasonable 'lowest common denominator' instead of always true constraints. */ 1812 switch (si->ps.card_arch) 1813 { 1814 case NV04A: 1815 /* confirmed for: 1816 * TNT1 (NV04), TNT2 (NV05), TNT2-M64 (NV05M64) in both PIO and DMA acc mode. */ 1817 switch(target->space) 1818 { 1819 case B_CMAP8: max_acc_width = 8176; break; 1820 case B_RGB15: max_acc_width = 4088; break; 1821 case B_RGB16: max_acc_width = 4088; break; 1822 case B_RGB24: max_acc_width = 2720; break; 1823 case B_RGB32: max_acc_width = 2044; break; 1824 default: 1825 LOG(8,("INIT: unknown color space: 0x%08x\n", target->space)); 1826 return B_ERROR; 1827 } 1828 break; 1829 default: 1830 /* confirmed for: 1831 * GeForce4 Ti4200 (NV28), GeForceFX 5600 (NV31) in PIO acc mode; 1832 * GeForce2 MX400 (NV11), GeForce4 MX440 (NV18), GeForceFX 5200 (NV34) can do 1833 * 16368/8184/8184/5456/4092, so a bit better in PIO acc mode; 1834 * confirmed for: 1835 * GeForce2 MX400 (NV11), GeForce4 MX440 (NV18), GeForcePCX 5750 (NV36), 1836 * GeForcePCX 6600 GT (NV43) in DMA acc mode; 1837 * GeForce4 Ti4200 (NV28), GeForceFX 5200 (NV34) can do 1838 * 16368/8184/8184/5456/4092, so a bit better in DMA acc mode. */ 1839 switch(target->space) 1840 { 1841 case B_CMAP8: max_acc_width = 16320; break; 1842 case B_RGB15: max_acc_width = 8160; break; 1843 case B_RGB16: max_acc_width = 8160; break; 1844 case B_RGB24: max_acc_width = 5440; break; 1845 case B_RGB32: max_acc_width = 4080; break; 1846 default: 1847 LOG(8,("INIT: unknown color space: 0x%08x\n", target->space)); 1848 return B_ERROR; 1849 } 1850 break; 1851 } 1852 1853 /* set virtual_width limit for unaccelerated modes */ 1854 switch (si->ps.card_type) 1855 { 1856 default: 1857 // case NV04: 1858 /* confirmed for: 1859 * TNT1 always; 1860 * TNT2, TNT2-M64, GeForce2 MX400, GeForce4 MX440, GeForce4 Ti4200, 1861 * GeForceFX 5200: if the CRTC1 (and CRTC2) BUFFER register b2 = 0 */ 1862 /* NOTE: 1863 * Unfortunately older cards have a hardware fault that prevents use. 1864 * We need doubled granularity on those to prevent the single top line 1865 * from shifting to the left! 1866 * This is confirmed for TNT2, GeForce2 MX200, GeForce2 MX400. 1867 * Confirmed OK are: 1868 * GeForce4 MX440, GeForce4 Ti4200, GeForceFX 5200. */ 1869 switch(target->space) 1870 { 1871 case B_CMAP8: max_crtc_width = 16368; break; /* 16376 */ 1872 case B_RGB15: max_crtc_width = 8184; break; /* 8188 */ 1873 case B_RGB16: max_crtc_width = 8184; break; /* 8188 */ 1874 case B_RGB24: max_crtc_width = 5456; break; /* 5456 */ 1875 case B_RGB32: max_crtc_width = 4092; break; /* 4094 */ 1876 default: 1877 LOG(8,("INIT: unknown color space: 0x%08x\n", target->space)); 1878 return B_ERROR; 1879 } 1880 break; 1881 // default: 1882 /* confirmed for: 1883 * TNT2, TNT2-M64, GeForce2 MX400, GeForce4 MX440, GeForce4 Ti4200, 1884 * GeForceFX 5200: if the CRTC1 (and CRTC2) BUFFER register b2 = 1 */ 1885 /* switch(target->space) 1886 { 1887 case B_CMAP8: max_crtc_width = 16352; break; 1888 case B_RGB15: max_crtc_width = 8176; break; 1889 case B_RGB16: max_crtc_width = 8176; break; 1890 case B_RGB24: max_crtc_width = 5440; break; 1891 case B_RGB32: max_crtc_width = 4088; break; 1892 default: 1893 LOG(8,("INIT: unknown color space: 0x%08x\n", target->space)); 1894 return B_ERROR; 1895 } 1896 break; 1897 */ } 1898 1899 /* check for acc capability, and adjust mode to adhere to hardware constraints */ 1900 if (max_acc_width <= max_crtc_width) 1901 { 1902 /* check if we can setup this mode with acceleration */ 1903 *acc_mode = true; 1904 /* virtual_width */ 1905 if (target->virtual_width > max_acc_width) *acc_mode = false; 1906 /* virtual_height */ 1907 /* (NV cards can even do more than this(?)... 1908 * but 4096 is confirmed on all cards at max. accelerated width.) */ 1909 if (target->virtual_height > 4096) *acc_mode = false; 1910 1911 /* now check virtual_size based on CRTC constraints */ 1912 if (target->virtual_width > max_crtc_width) target->virtual_width = max_crtc_width; 1913 /* virtual_height: The only constraint here is the cards memory size which is 1914 * checked later on in ProposeMode: virtual_height is adjusted then if needed. 1915 * 'Limiting here' to the variable size that's at least available (uint16). */ 1916 if (target->virtual_height > 65535) target->virtual_height = 65535; 1917 1918 /* OK, now we know that virtual_width is valid, and it's needing no slopspace if 1919 * it was confined above, so we can finally calculate safely if we need slopspace 1920 * for this mode... */ 1921 if (*acc_mode) 1922 { 1923 /* the mode needs to adhere to the largest granularity imposed... */ 1924 if (acc_mask < crtc_mask) 1925 video_pitch = ((target->virtual_width + crtc_mask) & ~crtc_mask); 1926 else 1927 video_pitch = ((target->virtual_width + acc_mask) & ~acc_mask); 1928 } 1929 else /* unaccelerated mode */ 1930 video_pitch = ((target->virtual_width + crtc_mask) & ~crtc_mask); 1931 } 1932 else /* max_acc_width > max_crtc_width */ 1933 { 1934 /* check if we can setup this mode with acceleration */ 1935 *acc_mode = true; 1936 /* (we already know virtual_width will be no problem) */ 1937 /* virtual_height */ 1938 /* (NV cards can even do more than this(?)... 1939 * but 4096 is confirmed on all cards at max. accelerated width.) */ 1940 if (target->virtual_height > 4096) *acc_mode = false; 1941 1942 /* now check virtual_size based on CRTC constraints */ 1943 if (*acc_mode) 1944 { 1945 /* note that max_crtc_width already adheres to crtc_mask */ 1946 if (target->virtual_width > (max_crtc_width & ~acc_mask)) 1947 target->virtual_width = (max_crtc_width & ~acc_mask); 1948 } 1949 else /* unaccelerated mode */ 1950 { 1951 if (target->virtual_width > max_crtc_width) 1952 target->virtual_width = max_crtc_width; 1953 } 1954 /* virtual_height: The only constraint here is the cards memory size which is 1955 * checked later on in ProposeMode: virtual_height is adjusted then if needed. 1956 * 'Limiting here' to the variable size that's at least available (uint16). */ 1957 if (target->virtual_height > 65535) target->virtual_height = 65535; 1958 1959 /* OK, now we know that virtual_width is valid, and it's needing no slopspace if 1960 * it was confined above, so we can finally calculate safely if we need slopspace 1961 * for this mode... */ 1962 if (*acc_mode) 1963 { 1964 /* the mode needs to adhere to the largest granularity imposed... */ 1965 if (acc_mask < crtc_mask) 1966 video_pitch = ((target->virtual_width + crtc_mask) & ~crtc_mask); 1967 else 1968 video_pitch = ((target->virtual_width + acc_mask) & ~acc_mask); 1969 } 1970 else /* unaccelerated mode */ 1971 video_pitch = ((target->virtual_width + crtc_mask) & ~crtc_mask); 1972 } 1973 1974 LOG(2,("INIT: memory pitch will be set to %d pixels for colorspace 0x%08x\n", 1975 video_pitch, target->space)); 1976 if (target->virtual_width != video_pitch) 1977 LOG(2,("INIT: effective mode slopspace is %d pixels\n", 1978 (video_pitch - target->virtual_width))); 1979 1980 /* now calculate bytes_per_row for this mode */ 1981 *bytes_per_row = video_pitch * (depth >> 3); 1982 1983 return B_OK; 1984 } 1985